JPH01137841A - Data processing procedure for information communication equipment between vehicles on road - Google Patents
Data processing procedure for information communication equipment between vehicles on roadInfo
- Publication number
- JPH01137841A JPH01137841A JP29525687A JP29525687A JPH01137841A JP H01137841 A JPH01137841 A JP H01137841A JP 29525687 A JP29525687 A JP 29525687A JP 29525687 A JP29525687 A JP 29525687A JP H01137841 A JPH01137841 A JP H01137841A
- Authority
- JP
- Japan
- Prior art keywords
- information
- data
- road
- information communication
- data processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Traffic Control Systems (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Communication Control (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明の路車間の情報通信装置に係り、特に限られた回
数の受信情報のデータ変換処理に好適なデータ処理手段
に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a road-to-vehicle information communication device, and particularly relates to a data processing means suitable for data conversion processing of information received a limited number of times.
従来の装置は、例えば、特開昭61−230532に記
載のように通信のHDLC規格に対応させるためNMO
8の専用LSIを用いていた。しかし、このLSIは、
高価でかつ消費電力が比較的大きいものであった。For example, conventional devices are equipped with NMO in order to comply with the HDLC communication standard as described in Japanese Patent Application Laid-Open No. 61-230532.
8 dedicated LSI was used. However, this LSI
It was expensive and had relatively large power consumption.
上記従来技術は受信装置の省力化の点について配慮がさ
れておらず、高コスト、高消費電力の問題があった′。The above-mentioned conventional technology does not give consideration to the power saving of the receiving device, and has problems of high cost and high power consumption.
本発明の目的は専用LSIを使用せずに、マイクロコン
ピュータのソフトウェアで安定した情報受信をすること
にある。しかし、ソフト処理することにより受信開始か
らデータのチエツク終了まで処理時間がかかり、データ
にエラーが検出された時には、情報通信エリアを通過し
ていることが考えられる。An object of the present invention is to stably receive information using microcomputer software without using a dedicated LSI. However, due to software processing, processing time is required from the start of reception to the end of checking the data, and when an error is detected in the data, it is possible that the data has passed through the information communication area.
上記目的は、情報受信エリアではできるだけ多くの回数
を記憶し、その後、データ変換処理を行ない、データエ
ラーが検出されれば別の記憶データにより同様処理を行
なって、正常データの取り逃しのない様にすることによ
り、達成される。The above purpose is to store as many times as possible in the information receiving area, then perform data conversion processing, and if a data error is detected, perform the same processing with other stored data to avoid missing normal data. This is achieved by doing so.
情報受信エリアを通過時はメモリ容量の許す限りデータ
を記憶するように動作する。データの変換は受信エリア
通過後もしくはメモリがいっばいになった時より行なう
。それによって、受信データは、複数個記憶されるよう
になるので、データの1つに誤りが検出されても、他の
データを引用することができるようになるので、1つの
データが誤っていたことが判った時次の情報が得られな
い様なことがない。When passing through the information receiving area, it operates to store as much data as the memory capacity allows. Data conversion is performed after passing through the reception area or when the memory is full. As a result, multiple pieces of received data will be stored, so even if an error is detected in one of the data, other data can be cited, so if one data is incorrect. When you find out something, there's no chance that you won't be able to get the next piece of information.
以下、本発明の一実施例を第1図により説明する。 An embodiment of the present invention will be described below with reference to FIG.
路上に設けられた送信装置1より連続的に情報が繰り返
し送信され、受信エリア5内を通過する車両10のアン
テナ3と受信装置4により伝達される。第2図は送受信
の情報フレームと受信側の処理を示す。繰り返し送信さ
れる情報20のフレームに対し、非同期で受信が開始さ
れ、その中でフレームとして成立する情報21が得られ
る。従来の受信側処理は、HDLC規格のLSIと同様
に、1フレームの情報21を受信処理22aにより受信
しその後ゼロデリートなどのHDLC規格のデータ変換
23aを行ない、CRCコードを生成しエラーチエツク
24aを行なう。しかし、以上をソフトウェアにより実
行するため、その処理時間によりエラーチエツク24a
でエラーが発生した場合に、本受信機が通信エリアから
ぬけていると、その後対応が出来なくなる。本発明は、
得られる限りの情報は22b、22cの受信処理により
メモリ記録し、メモリがFULLになるか又は受信エリ
ア5を通過後にデータ変換23bとエラーチエツク24
bの処理を開始する。第3図に受信側の処理フローを示
す。受信エリア5到達前は受信信号有32の判定により
受信待ちのアイドル状態となる。データが一旦受信され
ると、そのデータの記録33が行なわれ、受信信号有3
4とメモリFULL35の判定により、受信信号が無く
なるか又はメモリがFULLになるまでデータ記録33
が繰り返される。その後記録したデータに対しゼロデリ
ートのHDLC規格のデータ変換36及びCRCコード
によるエラーチエツク37を行ない、情報に誤り38が
あれば次フレームのデータ39を示し同様の処理を繰り
返す。誤りが無ければ終了となる。Information is continuously and repeatedly transmitted from a transmitting device 1 installed on the road, and transmitted by an antenna 3 and a receiving device 4 of a vehicle 10 passing within a receiving area 5. FIG. 2 shows transmitted and received information frames and processing on the receiving side. Reception is started asynchronously with respect to frames of information 20 that are repeatedly transmitted, and information 21 that is established as a frame is obtained. Conventional receiving side processing, similar to the HDLC standard LSI, receives one frame of information 21 by a reception process 22a, then performs HDLC standard data conversion 23a such as zero deletion, generates a CRC code, and performs an error check 24a. Let's do it. However, since the above is executed by software, the error check 24a may be delayed due to the processing time.
If an error occurs and this receiver is out of the communication area, it will no longer be possible to respond. The present invention
As much information as can be obtained is recorded in the memory by the reception processing of 22b and 22c, and after the memory becomes full or the data passes through the reception area 5, data conversion 23b and error check 24 are performed.
Start processing b. FIG. 3 shows the processing flow on the receiving side. Before reaching the receiving area 5, it is determined that there is a received signal 32 and is in an idle state waiting for reception. Once the data is received, a recording 33 of the data is performed and a received signal 33 is recorded.
4 and memory FULL 35, data recording 33 continues until the received signal disappears or the memory becomes FULL.
is repeated. Thereafter, the recorded data is subjected to zero-delete HDLC standard data conversion 36 and error check 37 using a CRC code, and if there is an error 38 in the information, the next frame data 39 is indicated and the same process is repeated. If there are no errors, the process ends.
本実施例によれば、限られた回数受信されたフレームデ
ータに対しエラーが発見されなくなるまで情報のエラー
チエツクを繰り返すため、データ変換やエラーチエツク
の処理時間遅れによる、ソフトウェア上の問題を回避す
る効果がある。According to this embodiment, error checking of information is repeated until no errors are found for frame data that has been received a limited number of times, thereby avoiding software problems due to processing time delays in data conversion and error checking. effective.
本発明によれば、HDLC規格の専用LSIを使用せず
に、受信エリア内を通過した時得られた情報を確実にエ
ラーチエツクすることができるので専用LSIを廃止で
き、これに伴い低コスト化。According to the present invention, since it is possible to reliably check for errors in the information obtained when passing through the reception area without using a dedicated LSI of the HDLC standard, the dedicated LSI can be abolished, resulting in cost reduction. .
低消費電力化を図れる効果がある。This has the effect of reducing power consumption.
第1図は本発明の一実施例の路車間情報通信装置のシス
テム図、第2図は情報の送受信フレームと受信側処理順
序を示す図、第3図は受信側の情報処理フロー図である
。
1・・・送信装置、3・・・受信アンテナ、4・・・受
信装置、10・・・車両、20・・・送側情報フレーム
、29・・・受信エリア到達前処理、30・・・受信エ
リア通過中処理、31・・・受信エリア通過後処理。FIG. 1 is a system diagram of a road-to-vehicle information communication device according to an embodiment of the present invention, FIG. 2 is a diagram showing information transmission/reception frames and the processing order on the receiving side, and FIG. 3 is a flowchart of information processing on the receiving side. . DESCRIPTION OF SYMBOLS 1... Transmitting device, 3... Receiving antenna, 4... Receiving device, 10... Vehicle, 20... Sending side information frame, 29... Reception area arrival pre-processing, 30... Processing while passing through the receiving area, 31... Processing after passing through the receiving area.
Claims (1)
載された情報受信装置より成る情報通信装置において、
繰り返し送信される情報を数多く記憶することを特徴す
る路車間の情報通信装置のデータ処理手順。1. In an information communication device consisting of a moving vehicle, an information transmitting device installed on the roadside, and an information receiving device mounted on the vehicle,
A data processing procedure for a road-to-vehicle information communication device characterized by storing a large amount of repeatedly transmitted information.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29525687A JPH01137841A (en) | 1987-11-25 | 1987-11-25 | Data processing procedure for information communication equipment between vehicles on road |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29525687A JPH01137841A (en) | 1987-11-25 | 1987-11-25 | Data processing procedure for information communication equipment between vehicles on road |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01137841A true JPH01137841A (en) | 1989-05-30 |
Family
ID=17818234
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP29525687A Pending JPH01137841A (en) | 1987-11-25 | 1987-11-25 | Data processing procedure for information communication equipment between vehicles on road |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01137841A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06291782A (en) * | 1993-03-31 | 1994-10-18 | Sanyo Electric Co Ltd | Memory control circuit of FM multiplex broadcast receiver |
-
1987
- 1987-11-25 JP JP29525687A patent/JPH01137841A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06291782A (en) * | 1993-03-31 | 1994-10-18 | Sanyo Electric Co Ltd | Memory control circuit of FM multiplex broadcast receiver |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5247163A (en) | IC card having a monitor timer and a reset signal discrimination circuit | |
| KR880010366A (en) | Microcomputer for communication control | |
| US5228129A (en) | Synchronous communication interface for reducing the effect of data processor latency | |
| JPH01137841A (en) | Data processing procedure for information communication equipment between vehicles on road | |
| US5398240A (en) | Multiplex transmission apparatus and multiplex transmission method | |
| JP2616398B2 (en) | Command execution device | |
| JP2690284B2 (en) | Data signal error correction method | |
| JPS61123244A (en) | Data communication processor | |
| JPS648864B2 (en) | ||
| KR940002722A (en) | Data transfer and synchronization method between CPUs in a system consisting of two CPUs | |
| JPS619743A (en) | Logging control method | |
| JPH0234518B2 (en) | ||
| US7574543B2 (en) | Method for operating a processor bus | |
| KR100308146B1 (en) | Method for processing message in speech recognition system | |
| JPS6247020B2 (en) | ||
| JPH01109837A (en) | Fifo device for frame reception | |
| JPH0421149A (en) | Dma data transmitting equipment | |
| JPH03163654A (en) | Data communication system | |
| JPS6482164A (en) | Communication system | |
| JPS581235A (en) | Transfer system for communication bus data | |
| JPS63260235A (en) | Transmission control method | |
| JPS6422142A (en) | Packet transfer processing system | |
| JPH0359752A (en) | connection control device | |
| JPH0693226B2 (en) | Interrupt reporting device | |
| JPH0496455A (en) | Loop back test system for communication protocol processing device |