JPH01138792A - Ceramic multilayer circuit substrate - Google Patents
Ceramic multilayer circuit substrateInfo
- Publication number
- JPH01138792A JPH01138792A JP29714887A JP29714887A JPH01138792A JP H01138792 A JPH01138792 A JP H01138792A JP 29714887 A JP29714887 A JP 29714887A JP 29714887 A JP29714887 A JP 29714887A JP H01138792 A JPH01138792 A JP H01138792A
- Authority
- JP
- Japan
- Prior art keywords
- holes
- multilayer circuit
- paste
- powder
- green sheet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 title claims abstract description 38
- 239000000758 substrate Substances 0.000 title abstract description 5
- 229910052751 metal Inorganic materials 0.000 claims abstract description 18
- 239000002184 metal Substances 0.000 claims abstract description 18
- 230000003647 oxidation Effects 0.000 claims abstract description 10
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 10
- 229910052763 palladium Inorganic materials 0.000 claims abstract description 8
- 229910052709 silver Inorganic materials 0.000 claims abstract description 8
- 238000010304 firing Methods 0.000 claims description 19
- 239000000843 powder Substances 0.000 abstract description 17
- 239000004020 conductor Substances 0.000 abstract description 11
- 238000000034 method Methods 0.000 abstract description 6
- 230000032798 delamination Effects 0.000 abstract description 5
- 230000004584 weight gain Effects 0.000 abstract description 5
- 235000019786 weight gain Nutrition 0.000 abstract description 5
- 239000001856 Ethyl cellulose Substances 0.000 abstract description 3
- ZZSNKZQZMQGXPY-UHFFFAOYSA-N Ethyl cellulose Chemical compound CCOCC1OC(OC)C(OCC)C(OCC)C1OC1C(O)C(O)C(OC)C(CO)O1 ZZSNKZQZMQGXPY-UHFFFAOYSA-N 0.000 abstract description 3
- 229910001252 Pd alloy Inorganic materials 0.000 abstract description 3
- WUOACPNHFRMFPN-UHFFFAOYSA-N alpha-terpineol Chemical compound CC1=CCC(C(C)(C)O)CC1 WUOACPNHFRMFPN-UHFFFAOYSA-N 0.000 abstract description 3
- SQIFACVGCPWBQZ-UHFFFAOYSA-N delta-terpineol Natural products CC(C)(O)C1CCC(=C)CC1 SQIFACVGCPWBQZ-UHFFFAOYSA-N 0.000 abstract description 3
- 229920001249 ethyl cellulose Polymers 0.000 abstract description 3
- 235000019325 ethyl cellulose Nutrition 0.000 abstract description 3
- 229940116411 terpineol Drugs 0.000 abstract description 3
- 238000001354 calcination Methods 0.000 abstract 1
- 238000000975 co-precipitation Methods 0.000 abstract 1
- 239000000203 mixture Substances 0.000 description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 4
- 239000011230 binding agent Substances 0.000 description 4
- 230000000052 comparative effect Effects 0.000 description 4
- YXFVVABEGXRONW-UHFFFAOYSA-N Toluene Chemical compound CC1=CC=CC=C1 YXFVVABEGXRONW-UHFFFAOYSA-N 0.000 description 3
- 239000003638 chemical reducing agent Substances 0.000 description 3
- 238000002156 mixing Methods 0.000 description 3
- 230000001376 precipitating effect Effects 0.000 description 3
- 239000004925 Acrylic resin Substances 0.000 description 2
- 229920000178 Acrylic resin Polymers 0.000 description 2
- OAKJQQAXSVQMHS-UHFFFAOYSA-N Hydrazine Chemical compound NN OAKJQQAXSVQMHS-UHFFFAOYSA-N 0.000 description 2
- LRHPLDYGYMQRHN-UHFFFAOYSA-N N-Butanol Chemical compound CCCCO LRHPLDYGYMQRHN-UHFFFAOYSA-N 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 2
- 239000012266 salt solution Substances 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000007606 doctor blade method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009429 electrical wiring Methods 0.000 description 1
- 238000005242 forging Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 238000004898 kneading Methods 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 150000002823 nitrates Chemical class 0.000 description 1
- -1 nitrates Chemical class 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 239000004014 plasticizer Substances 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 150000003839 salts Chemical class 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Conductive Materials (AREA)
Abstract
Description
【発明の詳細な説明】
歪ユ」ｌ朋！口１碧−
［産業上の利用分腎コ
本発明は電子機器に使用されるセラミック多層回路基板
に関する。[Detailed description of the invention] Distortion Yu'l friend! Technical Field The present invention relates to a ceramic multilayer circuit board used in electronic equipment.
［従来の技術］
一般にセラミック多層回路基板はＷまたはＭｏを導体と
する高アルミナ系の高温焼成（１５００℃以上）の多層
回路基板を使用されているが、アルミナは誘電率が高く
、導通抵抗も高いため、信号伝播遅延時間も長くなりコ
ンピュータ等の高速化、高性能化および高密度化の障害
となっていた。[Prior Art] Ceramic multilayer circuit boards are generally high-alumina-based multilayer circuit boards that are fired at high temperatures (1500°C or higher) and have W or Mo as conductors, but alumina has a high dielectric constant and low conduction resistance. As a result, the signal propagation delay time becomes long, which is an obstacle to increasing the speed, performance, and density of computers.
このため、高温焼成多層回路基板に代わるものとして、
基板材料は、例えば特開昭６０−２６０４６５号公報、
特開昭６０−２２７３１１号公報等には低融点ガラスに
アルミナを添加したセラミックやＡ１□０ｇ−８ｉ０２
−ＣａＯ−ＭｇＯ−ＢｚＯｓ系セラミック等を用い、さ
らに導体は、例えばＡｇ 、Ａｇ−Ｐｄ 、 Ｃｕ等の
低抵抗金属を用い、これらを多層に積層した低温焼成セ
ラミック多層回路基板の開発が進められている。Therefore, as an alternative to high-temperature fired multilayer circuit boards,
The substrate material is, for example, Japanese Patent Application Laid-open No. 60-260465,
Japanese Unexamined Patent Publication No. 60-227311 discloses ceramics made by adding alumina to low-melting glass, and A1□0g-8i02.
-CaO-MgO-BzOs-based ceramics are used, and conductors are made of low-resistance metals such as Ag, Ag-Pd, Cu, etc., and the development of low-temperature fired ceramic multilayer circuit boards in which these are laminated in multiple layers is progressing. There is.
この一般的な製造方法は第２図にフローチャートとして
示した。そこで使用されているスルホール用導体ペース
トは■導通抵抗が低いこと、■セラミックの焼成は８０
０℃〜１０００℃で焼結可能なこと、■できるだけ安価
なこと等を考慮して金属成分が決められている。こうし
た要求を満足させるものとして、例えば酸化雰囲気（空
気）焼成ではＡｇ−Ｐｄが開発され広く用いられるよう
になっている。This general manufacturing method is shown as a flowchart in FIG. The conductor paste for through-holes used there has ■low conduction resistance, and ■ceramic firing rate is 80%.
The metal components are determined taking into consideration the following factors: sinterability at 0°C to 1000°C, and (1) being as inexpensive as possible. To satisfy these requirements, for example, Ag--Pd has been developed and widely used for firing in an oxidizing atmosphere (air).
［発明が解決しようとする問題点］
しかし、スルホール用としては、セラミックグリンシー
トの焼成体積収縮率と適合させるために、Ａｇ／Ｐｄの
組成重量比率を調整する必要がある０通常セラミックグ
リンシートの焼成体積収縮率は３５％Ｓ５０％の範囲に
ある。一方Ａｇ−Ｐｄの焼成体積収縮率はＡｇ／Ｐｄの
比率により変化する。特に、Ｐｄは酸化し易く、３００
℃〜７００℃の焼成温度域で酸化してＰｄＯを生成し、
その際体積膨張を起こす、−方、この温度域ではセラミ
ックグリンシートの結合剤としての有機バインダーはす
でに大部分は飛散しているし、セラミックグリンシート
の焼結は進んでいない状態であるため、結合強度は小さ
く、スルホール中のＡｇ−Ｐｄの体積膨張により、セラ
ミック部にクラックが発生したり、スルホール部で積層
したセラミックグリンシートが押し上げられてデラミネ
ーションを起こす、特に、スルホールの穴径が大きい、
および／または隣接するスルホールの間隔が短い場合に
、スルホールとスルホールの間にクラックが発生する。[Problems to be Solved by the Invention] However, for through holes, it is necessary to adjust the composition weight ratio of Ag/Pd in order to match the firing volume shrinkage rate of the ceramic green sheet. The firing volume shrinkage is in the range of 35%S50%. On the other hand, the firing volume shrinkage rate of Ag-Pd changes depending on the Ag/Pd ratio. In particular, Pd is easily oxidized and
It oxidizes in the firing temperature range of ℃ to 700℃ to generate PdO,
At that time, volume expansion occurs; however, in this temperature range, most of the organic binder as a binder for the ceramic green sheet has already been scattered, and the sintering of the ceramic green sheet has not progressed. The bonding strength is small, and the volumetric expansion of Ag-Pd in the through-hole can cause cracks in the ceramic part, and the laminated ceramic green sheets can be pushed up in the through-hole part, causing delamination.Especially when the diameter of the through-hole is large. ,
And/or when the distance between adjacent through holes is short, cracks occur between the through holes.
そのため、隣接するスルホールの間隔を長くする必要が
あって、高密度化できないという欠点を持っていた。Therefore, it is necessary to increase the distance between adjacent through holes, which has the disadvantage that high density cannot be achieved.
本発明は、前述の欠点を防止し、高信頼性であり、生産
性にも優れ、高密度化が可能なセラミック多層回路基板
を低温焼成で得ることを目的とする。An object of the present invention is to prevent the above-mentioned drawbacks, and to obtain a ceramic multilayer circuit board that is highly reliable, has excellent productivity, and can be made to have a high density by firing at a low temperature.
ジー Ｂ（７’［【
［問題点を解決するための手段１
本発明はセラミックグリンシートにスルホール形成し、
前記スルホール内を金属成分ＡｇおよびＰｄと有機ビヒ
クルよりなるペーストで充填した後、焼成して製造され
るセラミック多層回路基板において、前記金属成分１０
０重量部に対して、Ｐｄは８重量部〜３０重量部で且つ
焼成中の酸化増量は１．０重量部以下となる組成である
ことを特徴とするセラミック多層回路基板である。G B (7'[[Means for solving the problem 1 The present invention forms through holes in a ceramic green sheet,
In a ceramic multilayer circuit board manufactured by filling the through holes with a paste made of metal components Ag and Pd and an organic vehicle and then firing the metal component 10,
The ceramic multilayer circuit board is characterized in that the Pd content is 8 to 30 parts by weight, and the weight gain by oxidation during firing is 1.0 parts by weight or less.
またスルホールをペーストで充填したセラミックグリン
シートの焼成温度は８００℃〜１０００℃であることを
特徴とする。Further, the firing temperature of the ceramic green sheet in which through holes are filled with paste is 800°C to 1000°C.
［作用］
本発明においてセラミックグリンシートと同一の焼成体
積収縮率を得る範囲はＡｇ／Ｐｄの重量比率で９２７８
〜７０／３０の範囲である。すなわち、Ｐｄ分は８％〜
３０％の範囲である。[Function] In the present invention, the range in which the firing volume shrinkage rate is the same as that of the ceramic green sheet is 9278 in terms of Ag/Pd weight ratio.
~70/30 range. In other words, the Pd content is 8%~
It is in the range of 30%.
Ｐｄの酸化による酸化増量１．０％以下のＡｇ−Ｐｄ金
属成分は、Ａｇ−Ｐｄ共沈粉末やＡｇ−Ｐｄ合金粉末等
を用いることにより達成される。このＡｇ−Ｐｄ共沈粉
末は、一般的にはＡｇ、Ｐｄのそれぞれの塩、例えば硝
酸塩を所望の割合で混合し、その水溶液中に還元剤、例
えばヒドラジンを加え、沈殿させ水分を取り除き作製さ
れる。またＡｇ−Ｐｄ合金粉末は、−鍛的にはＡｇとＰ
ｄの酸化物を所望の割合で混合した後、水素中で加熱還
元させる方法で作製される。An Ag-Pd metal component having an oxidation weight increase of 1.0% or less due to Pd oxidation can be achieved by using Ag-Pd co-precipitated powder, Ag-Pd alloy powder, or the like. This Ag-Pd co-precipitated powder is generally produced by mixing Ag and Pd salts, such as nitrates, in desired proportions, adding a reducing agent, such as hydrazine, to the aqueous solution, and precipitating it to remove water. Ru. In addition, Ag-Pd alloy powder is - Ag and P in terms of forging.
It is produced by mixing the oxides of d in a desired ratio and then reducing the mixture by heating in hydrogen.
この金属粉末を有機ビヒクル、例えばエチルセルロース
をテレピネオールに溶解したものを用いて、三本ロール
でよく混合混線してペースト化される。This metal powder is thoroughly mixed and mixed with an organic vehicle such as ethyl cellulose dissolved in terpineol using a three-roll roll to form a paste.
［実施例１ 本発明の実施例１−４を示す。[Example 1 Examples 1-4 of the present invention are shown.
実施例１−４のいずれも、低温焼成セラミック基板はＣ
ａＯ−Ａ１２０３−３ｉ０２−Ｂ２０Ｓ系ガラスとアル
ミナ粉の混合物を用いた。In all of Examples 1-4, the low-temperature fired ceramic substrate was C
A mixture of aO-A1203-3i02-B20S glass and alumina powder was used.
セラミックグリンシートは前記混合物と有機バイダー（
アクリル樹脂）、可塑剤（フタル酸ジプチル）、溶剤（
トルエンとブタノール混合）をボールミルで混合し、ド
クターブレード法で厚み０．４ ａｒｍのセラミックグ
リンシートを作製した。Ceramic green sheet is made of the above mixture and organic binder (
acrylic resin), plasticizer (diptylphthalate), solvent (
A mixture of toluene and butanol) was mixed in a ball mill, and a ceramic green sheet with a thickness of 0.4 arm was produced using a doctor blade method.
導体ペーストは前述のＡｇ−Ｐｄ共沈粉およびＡｇ−Ｐ
ｄ合金粉のほかに金属塩溶液から還元剤を用いて金属粉
末を沈殿させる等の方法で作製された球状あるいは粒状
のＡｇ粉およびＰｄ粉を用いて第１表に示した重量比率
の金属粉末と有機バインダー（エチルセルロース、また
はアクリル樹脂）と溶剤（テレピネオール）との混合物
を三本ロールでよく混合混練してペースト化して作製し
た。The conductor paste is made of the above-mentioned Ag-Pd co-precipitated powder and Ag-P
In addition to d alloy powder, spherical or granular Ag powder and Pd powder prepared by a method such as precipitating metal powder from a metal salt solution using a reducing agent are used to prepare metal powder at the weight ratio shown in Table 1. A paste was prepared by thoroughly mixing and kneading a mixture of an organic binder (ethyl cellulose or acrylic resin) and a solvent (terpineol) using a three-roll roll.
セラミックグリンシートのスルホール形成は金型を用い
て、穴径帆５■φの大きさに打ち抜き、隣接するスルホ
ールの間隔は１．５ｍｍとし、スルホール内へのペース
トの充填はスクリーン印刷法で行った。それぞれのスル
ホール間はＡｇペーストで配線し、第１図に示したよう
に、こうして作製されたセラミックグリンシートを第１
１！ｌとして、２゜３ＪＷはスルホールのないセラミッ
クグリンシートとして加熱圧着してｆ！！層し、焼成を
９００℃で２０分保持して試験片を作製した。Through-holes in the ceramic green sheet were formed using a mold and punched into holes with a diameter of 5 mm, the distance between adjacent through-holes was 1.5 mm, and paste was filled into the through-holes using a screen printing method. . Wiring is done between each through hole using Ag paste, and the ceramic green sheet thus produced is connected to the first
1! As l, 2°3JW is heat-pressed as a ceramic green sheet without through holes and f! ! A test piece was prepared by layering and firing at 900° C. for 20 minutes.
焼成後のセラミック多層回路基板のクラックおよびデラ
ミネションの有無やスルホールの断線の有無を検査し、
結果を第１表に示した。Inspect the ceramic multilayer circuit board after firing for cracks and delamination, and for through-hole disconnections.
The results are shown in Table 1.
なお、酸化湯量の測定は熱天秤装置を用いて、スルホー
ル内へ充填したペーストを焼成温度３００℃〜７００℃
の範囲で行ったもので、第１表にその結果を示した。The amount of oxidized water was measured using a thermobalance device, and the paste filled into the through holes was heated at a firing temperature of 300°C to 700°C.
The results are shown in Table 1.
なお、比較のため金属塩溶液から還元剤を用いて金属粉
末を沈殿させる等の方法で作製されたＡｇ、Ｐｄの球状
あるいは粒状金属粉末を第１表に示したそれぞれの金属
成分割合で作製した。For comparison, spherical or granular metal powders of Ag and Pd were prepared by a method such as precipitating metal powder from a metal salt solution using a reducing agent, with the respective metal component ratios shown in Table 1. .
実施例の１４はスルホール周辺のクラック、またデラミ
ネーションは見られなかった。一方、比較例の１．２は
スルホール周辺にクラックが発生した。ただし、比較例
３にはクラックは発生しなかったが収縮率の不適合のた
めスルホールでの断線という欠陥が生じた。勿論、実施
例１−４にはスルホールの断線はなかった。In Example 14, no cracks or delamination were observed around the through holes. On the other hand, in Comparative Example 1.2, cracks occurred around the through holes. However, although no cracks occurred in Comparative Example 3, a defect of wire breakage at a through-hole occurred due to the incompatibility of the shrinkage rate. Of course, there was no through-hole disconnection in Examples 1-4.
酸化増量は実施１３’１ｌ−４の全て１．Ｏｘ以下であ
る。The oxidation weight gain was 1. all in Example 13'1l-4. Ox or less.
比較例１，２は、１．０ｚ以上の酸化増量を示した。た
だし、比較例３はＰｄ量が少なく酸化増量は１．０％以
下であったが、前述のようにスルホール断線という欠陥
があった。Comparative Examples 1 and 2 showed an oxidation weight gain of 1.0z or more. However, although Comparative Example 3 had a small amount of Pd and the oxidation weight gain was 1.0% or less, it had the defect of through-hole disconnection as described above.
加熱圧着前に必要に応じて内外層の電気配線はＡｇ、Ａ
ｇ−Ｐｄ 、 Ａｕなどの低抵抗導電材料やＲｕＯ２、
Ｂｉ２Ｒｕ２Ｏ７などの抵抗材料を用いて印刷形成する
こともできる。ただし、外Ｎ（表面）の導体や抵抗体は
焼成後形成することも可能である。なお、本発明はスル
ホール導体を形成す必要があるセラミック多層回路基板
を作製する全てに利用できる。Electrical wiring on the inner and outer layers is made of Ag or A as required before heat and pressure bonding.
Low resistance conductive materials such as g-Pd and Au, RuO2,
It can also be formed by printing using a resistive material such as Bi2Ru2O7. However, it is also possible to form the outer N (surface) conductor and resistor after firing. It should be noted that the present invention can be used for all manufacturing ceramic multilayer circuit boards that require the formation of through-hole conductors.
また、セラミックグリンシートの代わりにセラミック絶
縁体ペーストを用いて多層化する、いわゆる印刷積層多
層回路基板にも応用できる。It can also be applied to so-called printed laminated multilayer circuit boards that are multilayered using ceramic insulating paste instead of ceramic green sheets.
ヘエｌ匪へ１１
本発明によれば、スルホール導体の周辺にＰｄの酸化に
よる体積膨張は小さく、従ってクラックやデラミネーシ
ョンの発生のない高信頼性で且つ生産性に優れ、隣接す
るスルホールの間隔も短く、回路の高密度化が可能なセ
ラミック多層回路基板を低温焼成で得られる効果がある
。According to the present invention, the volume expansion due to the oxidation of Pd around the through-hole conductor is small, and therefore, there is no cracking or delamination, resulting in high reliability and excellent productivity, and the spacing between adjacent through-holes is also small. This has the effect of producing a ceramic multilayer circuit board that is short and capable of high-density circuits by firing at a low temperature.
第１図は本発明の１実施例を示すセラミック多層回路基
板の断面図
第２図はセラミック多層回路基板の工程のフローチャー
ト
ド・・セラミックグリンシート ２・・・スルホール３
・・・外層導体 ４・・・内層導体特許出願
人 鳴海製陶株式会社
第１図Fig. 1 is a sectional view of a ceramic multilayer circuit board showing one embodiment of the present invention Fig. 2 is a flowchart of the process of a ceramic multilayer circuit board...Ceramic green sheet 2...Through hole 3
...Outer layer conductor 4...Inner layer conductor patent applicant Narumi Seito Co., Ltd. Figure 1
Claims (2)
記スルホール内を金属成分ＡｇおよびＰｄと有機ビヒク
ルよりなるペーストで充填した後、焼成して製造される
セラミック多層回路基板において、前記金属成分１００
重量部に対して、Ｐｄは８重量部〜３０重量部で且つ焼
成中の酸化増量は１．０重量部以下となる組成であるこ
とを特徴とするセラミック多層回路基板。(1) A ceramic multilayer circuit board manufactured by forming through holes in a ceramic green sheet, filling the insides of the through holes with a paste consisting of metal components Ag and Pd and an organic vehicle, and then firing it.
1. A ceramic multilayer circuit board, characterized in that the Pd content is 8 to 30 parts by weight, and the amount increased by oxidation during firing is 1.0 parts by weight or less.
クグリンシートの焼成温度は８００℃〜１０００℃であ
ることを特徴とする特許請求の範囲第１項記載のセラミ
ック多層回路基板。(2) The ceramic multilayer circuit board according to claim 1, wherein the firing temperature of the ceramic green sheet whose through holes are filled with the paste is 800°C to 1000°C.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29714887A JPH01138792A (en) | 1987-11-25 | 1987-11-25 | Ceramic multilayer circuit substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29714887A JPH01138792A (en) | 1987-11-25 | 1987-11-25 | Ceramic multilayer circuit substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01138792A true JPH01138792A (en) | 1989-05-31 |
Family
ID=17842822
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP29714887A Pending JPH01138792A (en) | 1987-11-25 | 1987-11-25 | Ceramic multilayer circuit substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01138792A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0584726A1 (en) * | 1992-08-21 | 1994-03-02 | Sumitomo Metal Ceramics Inc. | Method of fabricating ceramic circuit substrate |
| JPH07176864A (en) * | 1993-12-21 | 1995-07-14 | Fujitsu Ltd | Method for manufacturing multilayer ceramic substrate |
| KR100343903B1 (en) * | 1999-11-02 | 2002-07-19 | 주식회사 디에이피 | Manufacturing method for blind via hole of multi-layer printed circuit board |
| EP1083578A4 (en) * | 1999-03-30 | 2007-01-10 | Matsushita Electric Industrial Co Ltd | CONDUCTIVE PASTE, MULTI-LAYER CERAMIC SUBSTRATE AND METHOD OF MANUFACTURING THE SAME |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5878496A (en) * | 1981-10-14 | 1983-05-12 | 日本電気株式会社 | Multilayer ceramic board |
| JPS61108192A (en) * | 1984-10-31 | 1986-05-26 | 日本電気株式会社 | Low temperature sintered multilayer ceramic substrate |
-
1987
- 1987-11-25 JP JP29714887A patent/JPH01138792A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5878496A (en) * | 1981-10-14 | 1983-05-12 | 日本電気株式会社 | Multilayer ceramic board |
| JPS61108192A (en) * | 1984-10-31 | 1986-05-26 | 日本電気株式会社 | Low temperature sintered multilayer ceramic substrate |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0584726A1 (en) * | 1992-08-21 | 1994-03-02 | Sumitomo Metal Ceramics Inc. | Method of fabricating ceramic circuit substrate |
| US5456778A (en) * | 1992-08-21 | 1995-10-10 | Sumitomo Metal Ceramics Inc. | Method of fabricating ceramic circuit substrate |
| JPH07176864A (en) * | 1993-12-21 | 1995-07-14 | Fujitsu Ltd | Method for manufacturing multilayer ceramic substrate |
| EP1083578A4 (en) * | 1999-03-30 | 2007-01-10 | Matsushita Electric Industrial Co Ltd | CONDUCTIVE PASTE, MULTI-LAYER CERAMIC SUBSTRATE AND METHOD OF MANUFACTURING THE SAME |
| KR100343903B1 (en) * | 1999-11-02 | 2002-07-19 | 주식회사 디에이피 | Manufacturing method for blind via hole of multi-layer printed circuit board |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS5852900A (en) | Method of producing ceramic multilayer circuit board | |
| JP3571957B2 (en) | Conductive paste and method of manufacturing ceramic multilayer substrate | |
| JP3422233B2 (en) | Conductive paste for via hole and method for manufacturing multilayer ceramic substrate using the same | |
| JPH06100377A (en) | Method for manufacturing multilayer ceramic substrate | |
| JPH01138793A (en) | Ceramic multilayer circuit substrate | |
| JPH02277279A (en) | Simultaneously baked ceramic circuit board | |
| JP2615970B2 (en) | Method for manufacturing an AＮN multilayer substrate in which conductors and resistors are wired inside | |
| JP2002016345A (en) | Conductive paste and conductive powder composition, green sheet, ceramic multilayer circuit board and method for producing the same | |
| JPH088505A (en) | Low temperature fired ceramic circuit board and manufacture thereof | |
| JPH0680897B2 (en) | Method for manufacturing ceramic copper multilayer wiring board | |
| JPH08134388A (en) | Conductive ink | |
| JPS61289691A (en) | metallization composition | |
| JPH0632379B2 (en) | Method for manufacturing ceramic wiring board | |
| JP2003323816A (en) | Conductor composition | |
| JPH0613756A (en) | Conductor paste composition | |
| JP3151920B2 (en) | Manufacturing method of ceramic multilayer substrate | |
| JPS6085598A (en) | Multilayer circuit board | |
| JP3071514B2 (en) | Multilayer circuit board | |
| JPH066038A (en) | Method for manufacturing low temperature fired ceramic multilayer substrate | |
| JPH11220260A (en) | Manufacture of low-temperature baked ceramic multilayered board | |
| JPH05347484A (en) | Via formation paste and via formation method | |
| JPS60165795A (en) | Multilayer board and method of producing same | |
| JPH10341067A (en) | Inorganic multilayered substrate and conductor paste for via holes | |
| JPH1116419A (en) | Electrically conductive paste and manufacture of ceramic multilayer substrate using this | |
| JPS58207698A (en) | Hybrid integrated circuit board |