JPH01147943A - Data reception circuit - Google Patents

Abstract

PURPOSE:To prevent distortion in the pulse width by connecting the secondary output of a reception transformer to one input of the differential input of a reception circuit and feeding back a DC signal output to the other differential input via a low pass filter and a switching circuit. CONSTITUTION:When a signal is received from a transmission line 10 via a transformer 10, a binary signal appears at an output 28 accordingly. Since the time constant R1.C of a low pass filter composed of a resistor R1 and a capacitor C is set sufficiently larger than the period of an AC signal coming from the transmission line 10, the capacitor C is not completely charged by the input signal. Thus, a transistor Q keeps the interruption state and the binary DC signal outputted from the output 28 is sent to the next stage without being disturbed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to data transmission, particularly to a data reception circuit applied to a data transmission system having a transformer-coupled transmission line.

BACKGROUND TECHNOLOGY In a communication system having a transformer coupling, such as a transmission system such as a star LAN, a received AC signal is transferred to a differential input receiving circuit, such as AMD model Am28LS32 or Intel model SN? 51
It is common to use a differential input receiver such as 75 to convert the signal into a binary DC signal such as a TTL level. These devices typically have hysteresis so that once the output reaches a certain level, it remains there during standby, ie, in the absence of a received signal. However, there is a problem in that it is uncertain whether the level will be high or low depending on the startup state when the power is turned on, the last transition state of the previous received signal, etc.

In order to solve this problem, conventional methods have been used to stabilize the output by applying a DC bias between the differential inputs to the register/register. However, in this method, pulse width distortion occurs in the output signal pulse.

Therefore, it is particularly disadvantageous for systems such as long-distance transmission using multi-stage coupling.

OBJECTS It is an object of the present invention to eliminate the drawbacks of the prior art and to provide a data receiving circuit that stabilizes the DC output level at a desired level in a standby state.

Configuration In order to achieve the above object, the present invention has a transformer whose primary side is connected to a data transmission line, and a pair of differential inputs, and whose secondary side is connected to a single differential input, There is a receiving circuit that converts the signal received from the data transmission path via a transformer into a DC signal and outputs it, and the receiving circuit is connected to the output of the receiving circuit and passes the output DC signal through a low-pass filter and then through a switching circuit. The data receiving circuit is characterized by having a feedback circuit that feeds back to the other differential input. Hereinafter, a detailed explanation will be given based on one embodiment of the present invention.

Prior to a detailed explanation of the present invention, the state of a conventional communication signal transmission path will be explained with reference to FIG. 3 to help understand the present invention. This is a data transmission line 10 such as a star LAN.
It is often used in For example, model 26LS31 manufactured by AND Corporation or model SN manufactured by Intel Corporation? A transformer 14 is driven by a transmitter 12 such as a 5174, and two signals are sent from a data transmitting side 16 to a transmission line 10.

The transmitted signal is transmitted through a transformer 20 at the data receiving side 18 to, for example, model A+s2θL manufactured by AMII.
S32 or Intel SN? The signal is received by a receiver 22 such as 51?5, and converted into the original two signals.

In standby mode, that is, in a state where there is no signal, the receiver 2
The two differential inputs 24 and 28 have approximately the same potential. Therefore, it is uncertain whether the output 28 will be at a high level or a low level. Conventionally, to solve this problem,
As shown in FIG. 4, a method was used in which a DC bias was applied to the input side of the receiver 22. However, this method had a problem in that the bias caused pulse width distortion in the signal. FIG. 5 shows the differential input signal Vl-V2 of the lucifer 22 and the output signal v when no bias is applied.
6 shows the relationship between the differential input signal Vl-V2 and the output signal vO in the configuration shown in FIG. 4 when bias is applied so that the output during standby is fixed at a low level. Show relationships.

Here, it is assumed that the received signal waveforms in FIGS. 5 and 6 are the same. As you can easily see by comparing the two figures,
When no bias is applied, the duty of the output signal is 5.
It was 0%. However, when bias is applied, this duty becomes smaller than this. Furthermore, when biasing in the opposite direction, this duty increases.

The present invention is intended to fix the output level during standby to a desired level without causing pulse width distortion of the output signal. An embodiment thereof will be explained with reference to FIG. In this figure, elements similar to those shown in FIG. 3 are designated by the same reference numerals. For example, star L
The input side, that is, the primary side of the transformer 20 is connected to a transmission line IO such as an AN. The secondary side of the transformer 20 is grounded through resistors R3 and R4 as shown, and is also connected to the non-inverting input terminal 24 of the receiver 22. A signal received from the data transmission line 10 via the transformer 20 is input to the non-inverting input terminal 24 of the receiver 22 as an alternating current signal that oscillates in positive and negative directions with respect to a reference level, for example, the ground level. Further, the output 28 of the receiver 22 passes through a parallel circuit of a low-pass filter consisting of a resistor R1 and a capacitor C and a diode D, and further passes through a buffer circuit consisting of a transistor Q and a resistor R2 to an inverting input terminal 30 of the receiver 22. In this example, a low-pass filter consisting of resistor R1 and capacitor C is connected.

The time constant R1·C is set to be sufficiently large compared to the period of the input signal arriving from the transmission path IO.

Suppose now that the output 28 of the receiver 22 becomes high level during standby. This high level charges capacitor C through resistor R1, thereby causing transistor Q
conducts. The receiver 22 then has an inverting input terminal voltage higher than a non-inverting input terminal voltage, and the output 28 goes to a low level. When output 28 goes low, capacitor C
The charge stored in the transistor Q is discharged, the transistor Q becomes non-conducting, and the low level of the output 28 is stabilized.

By the way, when a signal is received from the transmission line IO via the transformer 20, a binary signal appears at the output 28 in response. In this embodiment, the time constant R1·C of the low-pass filter consisting of the resistor R1 and the capacitor C is set to be sufficiently large compared to the period of the AC signal arriving from the transmission line 10, so that the capacitor C is connected to the input signal. Therefore, the transistor Q remains cut off and the binary DC signal output from the output 28 is transmitted undisturbed to the next stage. Here, the diode D is provided to quickly discharge the charge stored in the capacitor C and improve responsiveness. Moreover, if the value of the resistor R2 is set so that the impedance seen from the non-inverting input terminal 24 side and the impedance seen from the inverting input side match, more stable operation without offset can be obtained.

Another embodiment of the invention is shown in FIG. In the configuration of this embodiment, a non-inverting buffer circuit 32 is inserted between the low-pass filter consisting of the resistor R1 and the capacitor C of the output 28 and the base electrode of the transistor Ql, as shown. Also, the two input terminals of receiver 22 are connected inversely to the embodiment of FIG. 1, and the polarity of transistor Q1 is opposite. According to this, 'output 2 of receiver 22
8 goes low, the output 34 of the non-inverting buffer circuit 32 goes low, so transistor Q1 becomes conductive and current flows through resistor R2. Therefore, the receiver 22
The voltage at the non-inverting input terminal 30 becomes higher than the voltage at the inverting input terminal 24. As a result, output 28 of receiver 22 goes high. When the output 28 goes high, the output 34 of the non-inverting buffer circuit 32 goes high, turning off transistor Q1 and fixing the output 28 of the receiver 22 at a high level.

肱-1 According to the present invention, the secondary output of the transformer that receives the signal from the transmission line is connected to the differential input of the receiving circuit, and the DC signal output is connected to the low-pass filter and the switching circuit. is fed back to the other differential input via. Therefore, it is possible to prevent pulse width distortion as seen in the conventional method. Therefore, a multi-stage transmission path can be constructed using transformer coupling, and highly reliable long-distance transmission can be realized.

[Brief explanation of the drawing]

FIG. 1 is a functional circuit diagram showing an embodiment of a data receiving circuit according to the present invention. FIG. 2 is a circuit diagram similar to FIG. 1 showing another embodiment of the present invention; FIG. 3 is a functional circuit diagram showing a conventional communication signal transmission path to which the present invention is applicable; 5 is a functional circuit diagram showing a method of applying a DC bias to the input side of the receiver according to the conventional method, and FIG. Figure 6 is a graph showing the relationship, and Figure 5 is a graph showing the relationship between the differential input signal and output signal when bias is applied so that the standby output is fixed at a low level in the configuration shown in Figure 4. This is a similar graph. Explanation of the number in the end part 10, ... Transmission line 20, ...) Lance 22, ..., Receiver C06, Capacitor R1, ..., Resistor Q, ...) Transistor 32, ..., Non-inverting puff 2A circuit

Claims (1)

[Claims] 1. A transformer having a primary side connected to a data transmission line and a pair of differential inputs, the secondary side of the transformer being connected to one of the differential inputs, a receiving circuit that converts the signal received from the data transmission path into a DC signal and outputs it; and a switching circuit that is connected to the output of the receiving circuit and passes the output DC signal through a low-pass filter. and a feedback circuit that feeds back to the other one of the differential inputs through the data receiving circuit. 2. The data receiving circuit according to claim 1, wherein impedances seen from each of the differential inputs are set to be equal to each other.