JPH01165172A - Manufacturing method of thin film transistor - Google Patents

Abstract

PURPOSE:To reduce the variation of gate electrode dimensions and stabilize the characteristics by a method wherein a blocking layer which blocks impurity diffusion into the gate electrode is formed after the gate electrode is formed. CONSTITUTION:After a semiconductor active layer 2, a gate oxide film 3 and an Si semiconductor film 4 for a gate electrode are successively formed on an insulating substrate 1, the Si semiconductor film 4 is doped with impurity ions (for instance P<+>) to reduce its resistance. After the low resistance film 4 is patterned to form a gate electrode 4' and resist 5 is removed, the gate oxide film 3 is etched to form a gate oxide layer 3'. Then an SiO2 layer 6 is built up on the gate electrode 4' and the exposed parts of the active layer 2 and the whole surface is etched so as to leave the SiO2 layer 6 on the gate electrode 4 and a blocking layer 6' is formed. Then, after source and drain regions 7 are formed in the active layer 2 and an SiO2 interlayer insulating film 8 and contact holes are formed with a conventional constitution, metal electrodes 9 are formed.

Description

Detailed Description of the Invention The present invention provides a method for manufacturing a thin film transistor, which includes a blocking layer formation step for preventing impurity diffusion into the gate electrode when forming source/drain regions of a conductivity type opposite to that of the gate electrode. Regarding.

Conventionally, when manufacturing a thin film transistor having a source/drain region of a conductivity type opposite to that of a gate electrode in a Si semiconductor active layer, polySi, a is first deposited on an insulating substrate such as a glass plate by a conventional method. -5i (amorphous Si)
After forming a Si semiconductor active layer such as, thermally oxidizing its surface to form a gate oxide film, forming a Si semiconductor film for a gate electrode on it, and lowering the resistance of the Si semiconductor film by diffusion of impurities, A blocking film (a film for preventing impurity diffusion to the gate electrode) such as SiO□ is formed on the entire surface, and then the blocking film, Si semiconductor film, and gate oxide film are successively patterned by photophosphorographic etching method. Then, a blocking layer, a gate electrode, and a gate oxide layer were formed, respectively, and finally, an SiO2 interlayer insulating film, a contact hole, and an AQ electrode were formed by a conventional method.

However, in the continuous patterning process, three stages of etching are performed continuously, which causes variations in the dimensions of the formed gate electrode (such as thinning), resulting in unstable transistor characteristics and a decrease in product yield. It became.

(5) It is an object of the present invention to provide a method for manufacturing a thin film transistor that has less variation in characteristics and therefore improves product yield.

The method of the present invention involves sequentially forming a Si semiconductor active layer, a gate oxide layer, and a gate electrode on an insulating substrate, and then coating the active layer with a conductivity type opposite to that of the gate electrode using a coating diffusion method or a vapor phase diffusion method. A method for manufacturing a thin film transistor including a step of forming source/drain regions, characterized in that after forming a gate electrode, a blocking layer of Sin is formed around the gate electrode, and then the source/drain regions are formed. .

As described above, the method of the present invention aims to reduce the variation in the dimensions of the gate electrode by performing the step of forming the blocking layer after forming the gate electrode.

To explain the method of the present invention with reference to the drawings, in FIG. 1, first, poly-3L is
, a-3L, etc., by low pressure CVD method (e.g. S
For example, the Si semiconductor film is deposited to a thickness of about 2,000 layers under conditions such as iH4 flow rate of 50 sccm, vacuum degree of 0.5 torr, and temperature of 630° C.), and the resulting Si semiconductor film is patterned using a photophosphorographic etching method to activate the Si semiconductor. Layer 2 is formed [FIG. 1(a)].

Next, the two sides of the active layer are thermally oxidized (e.g. H210, in an atmosphere,
A gate oxide film 3 having a thickness of, for example, about 1,500 layers is formed at a temperature of 950 DEG C. (FIG. 1(b)). Subsequently, in the same manner as described above, a Si semiconductor is deposited to a thickness of about 4,000 layers using the low pressure CVD method to form the Si semiconductor film 4 for the gate electrode [FIG. 1(C)], and then coated and diffused. The resistance is lowered by doping with impurities (for example, Pl) by a method or a vapor phase diffusion method [FIG. 1(d)].

Next, this low resistance film 4 is patterned to form a gate electrode 4.
After removing the resist 5 [FIG. 1(e)], the gate oxide film 3 is etched to form a gate oxide layer 3' [FIG. 1(f)]. After that, a blocking layer, which is a feature of the present invention, is formed as follows.
By diffusing impurities into the Si semiconductor active layer 2, the source
In forming the drain region, it is preferable to first form a blocking layer by thermal oxidation and etching. For example, when thermal oxidation is carried out at a temperature of 850° C. in a H, 10 atmosphere, a 0-gain in26 film with a thickness of about 1,500 nanometers is grown on the gate electrode 4', and a 0-gain in26 film with a thickness of about 300 nanometers is grown on the exposed portion of the active layer 2. Since SiO26 with a degree of 0 grows [first
(g)], next, the SiO2 layer 6 on the active layer 2 is completely removed, but the entire surface of the SiO□ layer 6 on the gate electrode 4' is etched (e.g., with HF) so that a thickness of 500 Å or more remains, for example.
Etching is carried out for 120 seconds with a 2% aqueous solution of. Through this process, a blocking layer 6' of Sun is formed around the gate electrode 4' (FIG. 1(h)). Thereafter, the gate electrode 4' is formed by coating diffusion or vapor phase diffusion according to a conventional method.
The source/drain regions 7 are formed in the active layer 2 by doping an impurity with a conductivity type opposite to that of the active layer 2 (for example, B'') [Fig. 1(i)].
), an interlayer insulating film 8 of 5un2 was formed [FIG. 1 (j
)) After forming the contact hole, a metal electrode 9 such as Afl is further formed to obtain the thin film transistor of the present invention.

Summer - Since then, according to the method of the present invention, by forming a blocking layer that prevents impurity diffusion into the gate electrode after forming the gate electrode, variations in gate electrode dimensions can be reduced, thus manufacturing thin film transistors with high yield and stable characteristics. can do.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a manufacturing process diagram of an example of a thin film transistor of the present invention. 1... Insulating substrate 2... Si semiconductor active layer 3
...Gate oxide film 4...Si semiconductor crotch 4'...
・Gate electrode 5...Resist 6...Sin2 layer 6'...Blocking layer 7...Source/drain region 8...Interlayer insulating film 9...Metal electrode film 1 Figure

Claims (1)

[Claims] 1. After sequentially forming a Si semiconductor active layer, a gate oxide layer, and a gate electrode on an insulating substrate, source/drain regions of a conductivity type opposite to that of the gate electrode are formed in the active layer by a coating diffusion method or a vapor phase diffusion method. In a thin film transistor manufacturing method including a step of forming a gate electrode, a blocking layer of SiO_2 is formed around the gate electrode, and then a blocking layer of SiO_2 is formed around the gate electrode.
A method for manufacturing a thin film transistor, the method comprising forming a drain region.