JPH01181545A - Semiconductor device - Google Patents

Abstract

PURPOSE:To need no contact holes and to make a direct exposure of a portion melted off easily, by using a silicide layer or a high melting point metal layer as the portion melted off. CONSTITUTION:A field oxide film 1 is formed on a P-type silicon substrate 8 by selective oxidation method. On a part of the substrate 8, an n<+> diffusion layer 7 is formed by thermal diffusion of phosphorus. Then, a layer-to-layer insulating film 2 is formed on the field oxide film 1. Nextly, a two-layer wiring structure made of an aluminium wiring 4 and a silicide layer 3 is formed on the layer-to-layer insulating film 2 so that it is connected to the n<+> diffusion layer 7. For formation of a silicide portion for melting off in a part of the silicide layer 3, aluminum is removed from the specified area. Then, an SiO2 cover film 6 is formed except for the silicide portion. Since there is only the SiO2 cover film 6 on the silicide wiring 3 for melting off, the cover film 6 has only to be removed from the specified area for exposure of silicide of the position melted off 10. By this method, there is no need of contact holes and a direct exposure of silicide of the portion melted off can be made easily.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and more particularly to a programmable element of a semiconductor memory device having redundant bits.

[Conventional technology]

Semiconductor memory devices in recent years have been rapidly increasing in capacity, and as the memory capacity per chip increases, there is a demand for smaller memory elements.In order to improve yields,
Redundant circuit configuration techniques are being adopted. Furthermore, as a countermeasure against migration and an increase in contact resistance due to silicon precipitation at the contact portion, a technique of forming a silicide layer under the aluminum wiring has been used.

An example of a conventional programmable element of a semiconductor memory device having redundant bits is shown in FIGS. 2(a) and 2(b). A field oxide film 1 is formed on a P-type silicon substrate 8 by a selective oxidation method, an n+ diffusion layer 7 is formed by thermally diffusing phosphorus, and a polycrystalline silicon wiring 5 is used as a wiring for a fusing part 10. . This polycrystalline silicon wiring 5 connects to the silicide layer 3 through the contact hole 11 and connects to the aluminum wiring. It is connected to the two-layer wiring with fs4, and interlayer insulation J[2 is formed under the silicide WJ3 and above the polycrystalline silicon 5. Furthermore, a cover film 6 is formed to prevent contamination and moisture from entering from the outside. The polycrystalline silicon 5, which becomes the fusing portion 10, is fused by irradiating a laser beam or by flowing a large current through the polycrystalline silicon wiring 5.

[Problem that the invention seeks to solve]

The conventional programmable element of the semiconductor memory device having the redundant bits described above has the disadvantage that the programmable element becomes large because it has the contact hole 11. Further, it is preferable that the polycrystalline silicon wiring 5 of the fusing part 10 be exposed in order to facilitate fusing, but in order to prevent an increase in the number of steps, there is usually a step in which the cover film 6 on the bonding pad for bonding is removed. At the same time, polycrystalline silicon is placed for fusing! There is a drawback that only the cover M6 on the 35 is removed, complicating the manufacturing process to completely expose the polycrystalline silicon for fusing.

An object of the present invention is to eliminate these drawbacks and provide a semiconductor device having a structure in which a silicide layer or a high-melting point metal layer is used as a fusing part, thereby eliminating the need for a contact hole and making it easy to directly expose a fusing part. Our goal is to provide the following.

[Means for solving problems]

The structure of the semiconductor device of the present invention is such that the metal wiring has a two-layer structure of a metal layer and a silicide layer or a high-melting point metal layer, and the fusing wiring of a programmable element having a redundant circuit is a part of the two-layer structure. It is characterized by consisting of a silicide layer or a high melting point metal layer.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) and 1(b) are a partial sectional view and a plan view of an embodiment of the present invention. A field oxide film 1 having a thickness of 1 μm is formed on a P-type silicon substrate 8 by selective oxidation, and an n0 diffusion layer 7 is formed by thermally diffusing phosphorus into a part of the substrate 8. Further, on the field oxide film 1, a glabellar insulating film 2 made of a PSG film with a thickness of 1 μm is formed. By using photo-etching technology, a two-layer wiring structure of an aluminum wiring 4 and a silicide layer 3 is formed on the interlayer insulating film 2, connected to the n+ diffusion layer 7.

A part of the silicide part for fusing of the silicide layer 3 is formed by removing only the aluminum in a predetermined region, and a 5-ins cover film 6 with a thickness of 1 μm is formed except for this silicide part. Since there is only a 5i02 cover film 6 with a thickness of 1 μm on the silicide wiring 3 for fusing, the silicide in the fusing part 10 can be completely exposed by the process of removing the cover film 6 in a predetermined area necessary for bonding. Can be done.

Note that the same effect can be obtained even if this silicide layer 3 is replaced with a high-melting point metal K. [Effects of the Invention] As explained above, the present invention provides a silicide layer 3 formed under aluminum wiring of a semiconductor memory device having redundant bits. By drawing out the silicide layer as a fusing part, there is no contact hole, and the area of the programmable element can be reduced, and a programmable element suitable for one large-scale design can be formed. Furthermore, since the silicide serving as the fusing portion can be easily exposed directly, there is an effect that fusing can be easily performed.

[Brief explanation of the drawing]

FIGS. 1(a) and (b) are a partial sectional view and a plan view thereof of an embodiment of the present invention, and FIGS. 2(a) and (b) are a partial sectional view and a plan view of an example of a conventional programmable element. It is a diagram. DESCRIPTION OF SYMBOLS 1... Field oxide film, 2... Interlayer insulating film, 3... Silicide layer or high melting point metal, 4... Aluminum wiring, 5... ...Polycrystalline silicon wiring, 6...Cover film, 7...
. . . n10 diffusion layer, 8 . . . P-type silicon substrate,
10... Fusing part, 11... Contact hole. Agent Patent Attorney Oto Uchihara

Claims (1)

[Claims] The metal wiring has a two-layer structure of a metal layer and a silicide layer or a high-melting point metal layer, and the fusing wiring of a programmable element having a redundant circuit consists of a part of the silicide layer or high-melting point metal layer of the two-layer structure. A semiconductor device characterized by: