JPH01202009A - Dc compensating circuit - Google Patents

Abstract

PURPOSE:To sufficiently reduce low interrupting distortion and to easily execute control by providing a feedback circuit with a fixed IIR filter to constitute a quantizing feedback circuit and compensating the compensation residual of the quantizing feedback circuit by an adaptive FIR filter. CONSTITUTION:The title circuit has the addpative FIR filter 9 to which an input signal is supplied, an adder 3 inputting the output of the filter 9 to one adding input, an identification circuit 6 to which a sum output from the adder 3 is supplied, and the fixed IIR filter 11 for supplying an output signal to the other adding input of the adder 3. The input signal passing the filter 9 is added to an compensating signal outputted from the filter 11 in the feedback circuit by the adder 3 and the output signal from the adder 3 is supplied to the filter 11 by fixing the circuit 6. Even when a characteristic deviation is generated in a subscriber's line or a subscriber's transmission equipment, low interrupting distortion is sufficiently reduced and only one position is applied to addaptive control.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a DC compensation circuit that reduces waveform distortion due to low-frequency cutoff of a transmission line in a digital subscriber transmission system.

(Prior Art) As a conventional DC compensation circuit of this type, there is, for example, a quantized Jmm pear-shaped DC compensation circuit as shown in FIG. In this circuit, an input signal 2 supplied from an input terminal 1 is supplied to one addition input of an addition circuit 3, and a compensation signal 18 output from an adaptive FIR filter 17 provided in a feedback circuit is added. It is supplied to the other input of the circuit 3, and an output signal 4, which is the sum of the input signal 2 and the compensation signal 18, is output from the output terminal 5 and is also supplied to the identification circuit 6. The two output identification results 7 of the identification circuit 6 are delayed by one time slot in the delay circuit 8 and are supplied to the adaptive FIR filter 17. Then, the compensation signal 18 output from the adaptive FIR filter 17 is added to the input signal 2 by the adder circuit 3, and is output as an output signal 4.

(Problem to be Solved by the Invention) In the conventional DC compensation circuit as shown in FIG. 6, in order to sufficiently reduce low-frequency cutoff distortion, it is necessary to increase the number of taps of the adaptive FIR filter 17. Hardware scale increases. Further, since the adaptive FIR filter 17 of the DC compensation circuit and the line equalization circuit have adaptive control points, it is difficult to control the transmission circuit as a whole, and there are problems with stability and convergence.

The present invention has been made in view of the above, and an object thereof is to provide a DC compensation circuit that has a small hardware scale, sufficiently reduces low-frequency cutoff distortion, and is easy to control.

[Structure of the Invention] (Means for Solving the Problems) In order to achieve the above object, the DC compensation circuit of the present invention is a DC compensation circuit that reduces waveform distortion due to low-frequency cutoff of a transmission line, and an adaptive FIR filter to which the output of the adaptive FIR filter is supplied, an adder circuit to which one addition input is supplied with the output of the adaptive FIR filter, an identification circuit to which the sum output from the adder circuit is supplied, and an output of the identification circuit. and a fixed IIR filter that supplies an output signal to the other addition input of the addition circuit.

Further, the DC compensation circuit of the present invention is a DC compensation circuit that reduces waveform distortion due to low-frequency cutoff of a transmission line, and includes an adder circuit to which an input signal is supplied to one adder input, and a summation circuit from the adder circuit. an adaptive FIR filter provided with an output;
The present invention is characterized in that it has an identification circuit to which the output of the adaptive FIR filter is supplied, and a fixed IIR filter to which the output of the identification circuit is supplied and which supplies an output signal to the other addition input of the addition circuit.

(Function) In the DC compensation circuit of the present invention, the input signal that has passed through the adaptive FIR filter is added to the compensation signal from the fixed IIR filter of the feedback circuit in the adder circuit and outputted, and this output signal is also identified. Fix the circuit and fix it II
It is supplied to the R filter.

Further, in the DC compensation circuit of the present invention, the input signal is added to the compensation signal from the fixed IIR filter of the feedback circuit in the adder circuit, and the added sum output signal is outputted via the adaptive FIR filter. is supplied to a fixed IIR filter via a.

(Example) Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is a circuit block diagram of a DC compensation circuit according to an embodiment of the present invention. In this DC compensation circuit, an input signal 2 supplied from an input terminal 1 is supplied to one addition input of an addition circuit 3 via an adaptive FIR filter 9, and a fixed IIR filter provided in a feedback circuit. The compensation signal 10 output from the adder circuit 3 is supplied to the other input of the adder circuit 3, and output signal 4, which is the sum of the input signal 2 and the compensation signal 10, is output from the output terminal 5.
It is supplied to R16. The identification result 7, which is the output of the identification circuit 6, is supplied to a fixed IIR filter 11. Then, the compensation signal 10 output from the fixed ITR filter 11 is added to the input signal 2 by the adder circuit 3, and is output as the output signal 4.

Here, the fixed IIR filter 11 is designed as follows. The low-frequency cutoff characteristic of the transmission line targeted by the DC compensation circuit is expressed as H(z), the fixed IIR filter 11 and the adaptive FIR
The transfer functions of filter 9 are expressed as G(Z) and F+(
Z), complete DC compensation can be achieved when the following equation (1) holds.

H(Z)F+(Z)+G(Z)=1-(1)
The low-frequency cutoff characteristic H(z) of a transmission line varies depending on the subscriber line and subscriber line transmission equipment, but its standard characteristic HO(Z)
The fixed IIR filter 11 is designed accordingly. When the low cutoff characteristic H(z) is equal to the standard characteristic HO(Z) (
H(Z)=Ho(z)), and if the transfer function Fl(Z) of the adaptive FIR filter 9 is a constant, (F+
(Z)=Ct>, Formula (1)%Formula% Here, if the general formula for the standard characteristic Ho(z) is...(3), then the transfer function G(z) of the fixed IIR filter 11
can be done as shown in the following formula.

...(4) Here, ai = (αl+1 /α0+β1+1) ...
(5) bi = βi
...(6), and the constant C
I is C+=1/α0 (7) Specifically, the fixed IIR filter 11 may be configured as shown in FIG. 2, where 22°26.30.31
．． 34 is an adder circuit, 23.27 is a delay circuit, 24.25
．． 28.29 and 32.33 are coefficient multipliers. In addition,
When the low-frequency cutoff characteristic (T) (2) deviates from the standard characteristic Ha (Z), the transmission interval number F + (Z) of the adaptive FIR filter 9
) is no longer a constant CI due to adaptive control.

With the above configuration, complete DC compensation can be achieved for a transmission line with standard low-cut characteristics, and the adaptive FIR filter 9 can provide sufficient DC compensation even for a transmission line with characteristics that deviate from the standard. It can be done. Furthermore, since the adaptive FIR filter 9 can share the hardware with the line equalizer, the hardware scale can be reduced. This is advantageous in terms of stability and convergence because adaptive control only needs to be performed in one place.

Next, the effect will be explained by simulation. In this simulation, a four-level code was taken up as a column, and the low-frequency cutoff was made into a quadratic characteristic expressed by the following equation (8).

......(8) Here, f cl = f c2 = f o/80 (f
o is the pulse repetition frequency) as a standard characteristic, equation (8) was SZ-transformed by bilinear transformation, and the tap coefficients of the fixed IIR filter 11 were determined by equations (5) and (6). Furthermore, the adaptive FIR filter 9 was subjected to 16-tap MSE control, and deviations in cutoff characteristics were given by changing fcl. Figures 3 and 4 show simulation results. Figure 3 shows 1 when fcl = fc2 = fo /80.
The input and output waveforms span 000 time slots. The effect of low-frequency cutoff distortion is so large that no eye can be observed in the input waveform, whereas in the output waveform, the eye is almost completely open. FIG. 4 is a diagram showing the relationship between cutoff characteristics and strain. Even if fcl is changed significantly, distortion in the output can be kept extremely small.

FIG. 5 is a circuit block diagram of another embodiment of the present invention.

The embodiment shown in FIG. 1 is similar to the embodiment shown in FIG.
The only difference is that the filter 9 is provided on the output side of the adder circuit 3.

The fixed IIR filter 11 in this case can be designed in the same manner as the embodiment shown in FIG. In this case, the conditions for complete DC compensation are as shown in the following equation instead of equation (1).

F2 (Z) (H (z) + G (Z)) = 1 = (
9) Here, F2(Z) is the transfer function of the adaptive FIR filter 9. When H(Z)=Ho(Z), and F2(Z)=C2(constant), formula (9)
is C2(Ha(Z)+G(Z))
=1-(10), and the transfer function G(Z) of the standard characteristic HO and the fixed IIR filter 11 is expressed by the formula %bi = βi
...(12) may be used. Further, the constant 02 is C2=1/α0 (13).

Therefore, this embodiment has the same effect as the embodiment shown in FIG. 1.

[Effects of the Invention] As described above, according to the present invention, a fixed IIR filter is provided in the feedback circuit to configure a quantization feedback circuit, and the compensation residual of the quantization feedback circuit is compensated by an adaptive FIR filter. For example, even if there is a characteristic deviation in the subscriber line or subscriber line transmission equipment, the low-frequency cut-off distortion can be sufficiently reduced, DC compensation can be sufficiently performed, and the hardware scale is small, making it more adaptable. Control can be done in one place, is easy, and has good stability and convergence.

[Brief explanation of the drawing]

1 is a circuit block diagram of a DC compensation circuit according to an embodiment of the present invention, FIG. 2 is a circuit diagram of a fixed IIR filter used in the DC compensation circuit of FIG. 1, and FIG. 3 is a circuit diagram of a fixed IIR filter used in the DC compensation circuit of FIG. Figure 1 is an input/output waveform diagram of the DC compensation circuit, and Figure 5 is a characteristic diagram showing the relationship between the interruption characteristics and distortion of the DC compensation circuit in Figure 1.
This figure is a circuit block diagram of another embodiment of the present invention, and FIG. 6 is a circuit block diagram of a conventional quantization feedback DC compensation circuit. 3... Addition circuit 6... Identification circuit 9... Adaptive FIR filter 11... Fixed IIR filter Agent Patent attorney Yasuo Miyoshi 1st Figure 2 Figure 3 Figure 40 5th Co. Voluntary action to amend Figure 6 procedures) May 10, 1986

Claims (2)

[Claims] (1) A DC compensation circuit that reduces waveform distortion due to low-frequency cutoff of a transmission line, and is an adaptive FI that is supplied with an input signal.
an R filter, an adder circuit whose one addition input is supplied with the output of the FIR filter; a discriminator circuit which is supplied with the sum output from the adder circuit; and a fixed IIR filter that supplies an output signal to the other addition input of the addition circuit. (2) A DC compensation circuit that reduces waveform distortion due to low-frequency cutoff of a transmission line, which is an adaptive type that includes an adder circuit in which an input signal is supplied to one adder input, and a sum output from the adder circuit. an FIR filter, an identification circuit fed with the output of the adaptive FIR filter, and a fixed IIR filter fed with the output of the identification circuit and providing an output signal to the other summing input of the summing circuit. Characteristic DC compensation circuit.