JPH0120547B2 - - Google Patents

Info

Publication number
JPH0120547B2
JPH0120547B2 JP55170409A JP17040980A JPH0120547B2 JP H0120547 B2 JPH0120547 B2 JP H0120547B2 JP 55170409 A JP55170409 A JP 55170409A JP 17040980 A JP17040980 A JP 17040980A JP H0120547 B2 JPH0120547 B2 JP H0120547B2
Authority
JP
Japan
Prior art keywords
region
collector
conductivity type
main surface
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55170409A
Other languages
Japanese (ja)
Other versions
JPS5793570A (en
Inventor
Hiroshi Hasegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP55170409A priority Critical patent/JPS5793570A/en
Publication of JPS5793570A publication Critical patent/JPS5793570A/en
Publication of JPH0120547B2 publication Critical patent/JPH0120547B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/30Devices controlled by electric currents or voltages
    • H10D48/32Devices controlled by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H10D48/34Bipolar devices
    • H10D48/345Bipolar transistors having ohmic electrodes on emitter-like, base-like, and collector-like regions

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)

Description

【発明の詳細な説明】 本発明は、改良された横方向型トランジスタに
関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improved lateral transistor.

横方向型トランジスタは、周波数特性が縦型ト
ランジスタに比べ劣るとか、あるいはベース領域
の不純物濃度が低い為、比較的小さいコレクタ電
流からその電流増幅率が低下しはじめる等の欠点
がある反面、特に半導体集積回路においては、特
別な工程を付加せずに実現できること、マルチコ
レクタ構造とすれば、それぞれのコレクタ電流の
比を、平面寸法の設計により任意に変えることが
できるという長所を具備している。しかし、当然
のことながら、このようなコレクタ電流の比を決
めるコレクタ面積を、後で変更したいと思つても
変更不可能という不便さがあつた。本発明の目的
は、従来設計段階で固定されてしまつたコレクタ
面積を、実際の動作要求に応じ配線操作だけで任
意に変えられるようにした、多様な使用条件に応
じ得る新規な横方向型トランジスタを提供するに
ある。本発明の横方向トランジスタは、第1導電
型半導体基体の主面内にそれぞれ選択的に設けら
れた第2導電型領域からなるエミツタ領域及び前
記エミツタ領域の一部と対向しているコレクタ領
域と、前記第1導電型半導体基体の前記エミツタ
領域と前記コレクタ領域とで挟まれた部分を主要
部とする活性ベース領域と、前記コレクタ領域直
上部からその周辺にかけて、絶縁膜を介して前記
主面上に設けられた導電膜からなる独立電極と、
前記独立電極直下の前記主面に反転層を誘起して
コレクタ面積を増加させる電圧印加手段とを含む
という構成を有する。
Horizontal transistors have disadvantages, such as their frequency characteristics being inferior to vertical transistors, or their current amplification factor starting to decline from a relatively small collector current due to the low impurity concentration in the base region. An integrated circuit has the advantage that it can be realized without adding any special process, and that if it has a multi-collector structure, the ratio of each collector current can be changed arbitrarily by designing the planar dimensions. However, as a matter of course, there is the inconvenience that the collector area, which determines the collector current ratio, cannot be changed even if one wishes to do so later. The object of the present invention is to provide a novel lateral transistor that can adapt to a variety of usage conditions, in which the collector area, which has conventionally been fixed at the design stage, can be changed arbitrarily just by wiring operations according to actual operational requirements. is to provide. The lateral transistor of the present invention includes an emitter region consisting of a second conductivity type region selectively provided in the main surface of a first conductivity type semiconductor substrate, and a collector region facing a part of the emitter region. , an active base region whose main portion is a portion sandwiched between the emitter region and the collector region of the first conductivity type semiconductor substrate; an independent electrode made of a conductive film provided thereon;
and voltage application means for inducing an inversion layer on the main surface immediately below the independent electrode to increase the collector area.

つぎに本発明を実施例により説明する。 Next, the present invention will be explained by examples.

第1図は本発明の一実施例の断面図である。図
において、1015cm-3程度の不純物濃度を有するN
型シリコン基体1に、公知の写真蝕刻技術および
拡散技術を用いて、P型エミツタ領域3、P型コ
レクタ領域2、および、ベース領域を形成するN
型基体1のベース電極コンタクト用のコンタクト
領域4を形成し、さらに、絶縁膜8にあけられた
コンタクトホールを通してそれぞれの該当領域に
接触がとられた、コレクタ電極5、エミツタ電極
6、ベース電極7の金属配線を、例えばアルミニ
ウムの蒸着膜等により形成する。その際、コレク
タ拡散領域2に一部が重なり、残りの部分がN型
基体上1に延在する金属膜からなる独立電極9を
同時に形成する。
FIG. 1 is a sectional view of an embodiment of the present invention. In the figure, N with an impurity concentration of about 10 15 cm -3
A P-type emitter region 3, a P-type collector region 2, and a base region are formed on a silicon substrate 1 using known photolithography and diffusion techniques.
A contact region 4 for the base electrode contact of the mold substrate 1 is formed, and a collector electrode 5, an emitter electrode 6, and a base electrode 7 are connected to the corresponding regions through contact holes formed in the insulating film 8. The metal wiring is formed using, for example, a vapor-deposited film of aluminum. At this time, an independent electrode 9 made of a metal film is formed at the same time, with a portion overlapping the collector diffusion region 2 and the remaining portion extending over the N-type substrate 1.

このような構造の横方向型トランジスタにおい
ては、例えば、トランジスタの実動作中に、独立
電極9に、ベース領域に対し十分低い電位を与え
ることにより、ベース領域表面にコレクタ領域に
つながる反転層10が生じ、ベース・コレクタ接
合の実効面積が増加する。
In a lateral transistor having such a structure, for example, by applying a sufficiently low potential to the independent electrode 9 with respect to the base region during actual operation of the transistor, an inversion layer 10 connected to the collector region is formed on the surface of the base region. This increases the effective area of the base-collector junction.

以上説明したように本発明は、横方向型トラン
ジスタのコレクタ領域直上部からその周辺にかけ
て独立電極を設けて、その独立電極に電圧を印加
して反転層を生ぜしめることにより、ベース・コ
レクタ接合の実効面積を増加させることにより、
コレクタ面積を電気的に変化させ多様な使用条件
応じることが可能となる。
As explained above, the present invention provides an independent electrode from just above the collector region of a lateral transistor to its periphery, and applies a voltage to the independent electrode to generate an inversion layer, thereby forming a base-collector junction. By increasing the effective area,
It is possible to electrically change the collector area to meet various usage conditions.

以上実施例にはPNP型横方向型トランジスタ
の場合を記述したが、NPN型においても実現で
きることは明らかであり、又半導体材料としても
シリコンに限らないことも言うまでもない。
Although the above embodiments have described the case of a PNP type lateral transistor, it is clear that an NPN type can also be realized, and it goes without saying that the semiconductor material is not limited to silicon.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の1実施例の断面図である。 1……N型半導体基体、2……P型コレクタ領
域、3……P型エミツタ領域、4……ベース電極
取出部、5……コレクタ電極、6……エミツタ電
極、7……ベース電極、8……絶縁膜、9……独
立電極、10……反転層。
FIG. 1 is a sectional view of one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... N-type semiconductor substrate, 2... P-type collector region, 3... P-type emitter region, 4... base electrode extraction part, 5... collector electrode, 6... emitter electrode, 7... base electrode, 8... Insulating film, 9... Independent electrode, 10... Inversion layer.

Claims (1)

【特許請求の範囲】[Claims] 1 第1導電型半導体基体の主面内にそれぞれ選
択的に設けられた第2導電型領域からなるエミツ
タ領域及び前記エミツタ領域の一部と対向してい
るコレクタ領域と、前記第1導電型半導体基体の
前記エミツタ領域と前記コレクタ領域とで挟まれ
た部分を主要部とする活性ベース領域と、前記コ
レクタ領域直上部からその周辺にかけて、絶縁膜
を介して前記主面上に設けられた導電膜からなる
独立電極と、前記独立電極直下の前記主面に反転
層を誘起してコレクタ面積を増加させる電圧印加
手段とを含むことを特徴とする横方向型トランジ
スタ。
1. An emitter region consisting of a second conductivity type region selectively provided in the main surface of the first conductivity type semiconductor substrate, a collector region facing a part of the emitter region, and the first conductivity type semiconductor. an active base region whose main portion is a portion sandwiched between the emitter region and the collector region of the base body; and a conductive film provided on the main surface from directly above the collector region to its periphery via an insulating film. 1. A lateral transistor comprising: an independent electrode; and voltage applying means for inducing an inversion layer on the main surface directly under the independent electrode to increase a collector area.
JP55170409A 1980-12-03 1980-12-03 Lateral type transistor Granted JPS5793570A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55170409A JPS5793570A (en) 1980-12-03 1980-12-03 Lateral type transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55170409A JPS5793570A (en) 1980-12-03 1980-12-03 Lateral type transistor

Publications (2)

Publication Number Publication Date
JPS5793570A JPS5793570A (en) 1982-06-10
JPH0120547B2 true JPH0120547B2 (en) 1989-04-17

Family

ID=15904381

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55170409A Granted JPS5793570A (en) 1980-12-03 1980-12-03 Lateral type transistor

Country Status (1)

Country Link
JP (1) JPS5793570A (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51117578A (en) * 1975-04-09 1976-10-15 Fujitsu Ltd Semiconductor equipment
JPS52104075A (en) * 1976-02-27 1977-09-01 Toshiba Corp Semiconductor element
JPS5320872U (en) * 1976-08-02 1978-02-22

Also Published As

Publication number Publication date
JPS5793570A (en) 1982-06-10

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