JPH01228263A - Printing device - Google Patents

Abstract

PURPOSE:To accelerate printing without increasing the capacity of an image memory by dividing a virtual page into plural blocks, and deciding whether the block is a null block or an effective block at every block. CONSTITUTION:The virtual page 61 is divided into the plural blocks 62. A block decision part 41 decides whether the block 62 is the null block consisting of only null data or the effective block including effective data. When an address is generated from an address generation part 43, a memory block allocation control part 42 reads out data in sequence of the addresses, and performs no write on the image memory if it is the null block based on the decision result of the block decision part 41, and if it is the effective block, the memory block allocation part 42 performs the write of the data on a prescribed address in the image memory 30 by referring to the memory of an address conversion part 44.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a printing device that stores print data in an image memory and prints on paper while reading the data.

(Prior Art) Various devices are known for printing print data created by a host control device such as a computer or a word processor onto paper, such as electrophotographic printers, thermal printers, and wire dot printers. It is being

FIG. 2 shows a block diagram of a printing apparatus that employs a conventional electrophotographic method.

In this device, a processor 4, a program memory 5, a working memory 6, a font memory 7, an image memory 8, and a print engine interface 9 are connected to a system bus 3 connected to a host control device 1 via an interface 2. It is of composition. A print engine 10 is connected to the print engine interface 9.

The host device 1 is a device such as a computer, word processor, or image reading device that creates print data. The interface 2 is a known circuit composed of a so-called R5232C interface, a parallel interface, or the like. The processor 4 is a circuit that controls the entire printing apparatus, and its execution program is stored in the program memory 5. The working memory 6 is a memory for storing and managing data transmitted and received by the interface 2. The font memory 7 is connected to the upper control device 1.
This is a memory that converts character codes and other codes sent from the printer into font data for printing.

The image memory 8 is composed of a random access memory that stores, for example, one page of print data that has been edited and turned into an image.

The print engine 10 is a device that prints on paper for printing based on the print data stored in the image memory 8, and is the device 5 that includes a paper conveyance system, an electrophotographic process, and the like. The print engine interface 9 receives print data 9a from the image memory 8 according to instructions from the processor 4.
This is an interface circuit that reads and transfers the signal to the print engine 10, or receives the print control signal 9b output from the print engine 10, and transmits it to the processor 4, etc.

The above-described printing device temporarily stores control commands, character codes, graphic commands, bit image data, etc. received from the host control device 1 via the interface 2 in the working memory 6 as needed, and then outputs them to the processor. 4, imaged printing data is created on the image memory 8.

The print data in the image memory 8 created in this way is
It is processed as follows.

FIG. 3 is a conceptual diagram illustrating the operation of reading print output from a conventional image memory.

As shown in the figure, when the read address 8a is input to the image memory 8, each raster ■,
The data corresponding to ■, ■, ■... are read out in order,
This will be printed in that order (■, ■, ■, ■...)
A printout 20 is obtained. That is, the data read from the image memory 8 is converted into a bit stream for each raster and sent to the print engine 10 shown in FIG. is obtained. Note that data is normally read from the image memory 8 not in bits but in words.

FIG. 4 is an explanatory diagram showing more specifically a conventional method of reading print output from an image memory.

As shown in the figure, the image memory is divided into units of one word (for example, 8 bits) for each raster (2), (2), and so on. The data is written in this word order (1)
, (2), (3)... are read out,
You will get a printout like the one shown on the right.

As can be seen from this figure, there is a complete one-to-one correspondence between the data stored in the image memory 8 and its print output 20. Normally, the image memory 8 is set to a memory capacity that can print out about one page 20, and even if the amount of information being printed is very small, it is always necessary to
Printing data for pages is stored in the image memory 8, and then printing is performed.

(Problem to be Solved by the Invention) Incidentally, in an electrophotographic printing apparatus, a photosensitive drum having a photoreceptor layer formed on its outer periphery is rotated at a constant speed, and a static image corresponding to printing data is placed on the photoreceptor. It forms an electric latent image. The electrostatic latent image is developed using toner, transferred and fixed onto the paper, and this printing process is performed in a continuous operation and cannot be interrupted. Therefore, normally, after the printing data has been completely edited in the image memory 8, the conveyance of the paper is started and the printing process is started.

FIG. 5 is an explanatory diagram of the operation of the print engine that executes such a printing process.

In the figure, paper 12 to be printed is stored in trays 11a and llb. This paper 12 is pulled out by a hopping roller 13a or 13b,
It is transported on the transport path 14.

In front of the conveyance path 14, a photosensitive drum 15 and a writing device 16 that electrostatically writes a replacement image on the outer periphery of the photosensitive drum 15 are arranged. This writing device 16 is composed of, for example, a light emitting diode array or a laser head.

In this device, the paper 12 is transported along the transport path 14, and when it reaches the transfer position W0, the toner on the photosensitive drum 15 is transferred, fixed by a fixing device (not shown), and discharged. Normally, at one point WP on the conveyance path, the paper 12 is temporarily stopped from being conveyed by a registration roller or the like (not shown) and then waits, and conveyance is resumed at the same time as the writing device 16 starts writing the electrostatic latent image. That is, the temperature of the photosensitive drum 15 is .degree. While the paper 12 rotates by an angle a
is ℃. ' and just reaches the transfer position Wo.

In order to control such timing, the timing at which printing data is transferred from the image memory 8 to the writing device 16 in FIG. This is after transporting f21 by 2 times.

FIG. 6 is a time chart showing the timing of writing data to the image memory and the timing of reading data.

As shown in the figure, at time t. When writing of the first page print data to the image memory is completed at time t1, the hopping roller 13 in FIG.
a or 13b starts conveying the paper 12. Thereafter, after waiting until time t3, reading of the print data for the first page from the image memory is started. Time t
2 to t3, the tray 11a shown in FIG.

The paper 12 pulled out from 11b is
It is transported to point W. Then, it is transported toward the transfer position W0 (FIG. 5) at the same timing by registration rollers or the like. In this way, the printing process for the first page is advanced. .

On the other hand, if printing data is written into and read out from the image memory alternately, the waiting time on the print engine side increases.

Therefore, in order to speed up processing, reading of the first page data is started, and before the reading is finished,
Writing of data for the second page is started. Time t3
The time from t3' to time t3' is the time from which reading of the first page is started to securing a certain memory area for writing data of the second page. Normally, as shown in the figure, when comparing the time to read data from image memory and the time to write data to image memory, in the case of writing, time is required for checking the write margin, calculating the write address, accessing the font memory, etc. Therefore, the total processing time will be slightly longer.

Considering these points, conventionally, when trying to utilize the image memory to the maximum extent possible, it is necessary to set the operation timing based on the write operation.

FIG. 7 is a timing chart showing the timing of a conventional image memory write operation.

As shown in the figure, if each write operation for one page to the image memory is marked with ■, ■, ■...■, then there is a waiting time of tXl between each write operation. It is necessary to provide

This waiting time is the time t1 to t3' shown in FIG.
This is the time to wait for the paper to be conveyed and a certain amount of data to be read from the image memory. Therefore,
In a printing apparatus in which the memory capacity of the image memory is one page, the timing shown in FIG. 7 is the timing of maximum efficiency, and no further increase in speed could be achieved.

On the other hand, if two pages of image memory are provided, while reading and printing data from one page of image memory, data can be written to another page of image memory. The waiting time t shown in Figure 7
Xl~txs can be eliminated.

FIG. 8 is a timing chart showing such a most desirable image memory write operation.

As shown in this figure, printing speed can be increased by increasing the capacity of the image memory. However, increasing the capacity of the image memory causes an increase in the cost of the device.

In particular, as the resolution of printed images increases, a larger capacity image memory is required, and the price difference between a printing device with an image memory capacity of one page and a device with an image memory capacity of two pages is large. It gets bigger and bigger.

The present invention has been made in view of the above points, and it is an object of the present invention to provide a printing device that can speed up printing without increasing the capacity of an image memory.

(Means for Solving the Problems) A printing apparatus of the present invention includes an image memory for storing printing data, a printing charger and controller for writing the printing data into the image memory, and a printing unit for writing the printing data from the image memory. and a printing unit that prints while reading, and the print control unit divides a virtual page consisting of one page of images virtually set corresponding to print output into a plurality of blocks, and prints the blocks. a block determining unit that determines for each block whether it is a blank block consisting only of blank data or a valid block containing valid data, and selecting only the valid blocks based on the determination result of the determining unit, a write control unit that writes data to the image memory in units of blocks; associates a block address of the valid block in the virtual page with a block address of the image memory to which the valid block is written;
and an address conversion unit storing a mapping flag that identifies the valid block and the blank block in the virtual page, and a page identification flag that identifies the virtual page to which the valid block written in the image memory belongs. It is characterized by having the following.

(Function) Even if the device described above has an image memory with a capacity for one page, for example, it is possible to store data for several pages depending on the content of the print data.

First, a virtual page is set on the processor side for each page to be printed. This virtual page is then divided into multiple blocks. Among these blocks, blank blocks consisting only of blank data are excluded, and only valid blocks containing valid data are written into the image memory.

For virtual pages with many blank spaces, this effective number of blocks will be very small. Therefore, it is possible to store several virtual pages in the image memory for one page.

In order to store valid data in a predetermined block of the image memory in this manner, or to read and print data stored in the image memory, an address conversion section is provided.

The print control unit refers to the block addresses and flags stored in the address conversion unit, identifies valid blocks and blank blocks of each virtual page, and stores the valid blocks of which virtual page in which block address of the image memory. Recognize what is being done. And when reading data,
The print control unit generates blank data for the blank block portion, and reads only valid data from the image memory at a predetermined timing.

Thereby, a printout corresponding to the virtual page is obtained.

(Example) Hereinafter, the present invention will be specifically explained with reference to Examples.

FIG. 1 is a block diagram showing an embodiment of a printing apparatus of the present invention. The overall configuration of this device is similar to that shown in FIG. 2, but in this device, writing and reading of data in the image memory 30 is controlled by a print control section 40 as shown in the figure.

This device includes a block determination section 41 that receives print data 60, a memory block allocation control section 42 that assigns a write address for the data to the image memory 30, and a block address generation section 43 that generates a block address. , an address converting section 44 that performs predetermined address conversion, a connection switching circuit 45 that switches the output route for manually writing data to the image memory 30 or for reading data, and a printing section 50.

Before explaining the detailed operation of this apparatus, first, the principle operation of the apparatus of the present invention will be explained using FIG.

In FIG. 9, this example shows a case where printing of two virtual pages (2) and (3) is requested.

First, the virtual pages ``■'' and ``■'' are each divided into a plurality of blocks 62 and 62'. For example, each block has a 128×128 bit configuration. When a virtual page is divided into a plurality of blocks in this manner, each block is classified into a blank block 62' consisting only of blank data and a valid block 62 containing valid data. Then, the print control unit 40 shown in FIG.
Only the valid block 62 containing the valid data of (2) is written. In this way, each virtual page ■
, ■ will be disassembled into pieces, but two pages worth of effective blocks 62 will be stored with sufficient margin in the image memory 30 with a capacity of one page.

After writing the print data to the image memory 30 in this way, print outputs as shown on the right side of FIG.
In order to obtain , the first block of the virtual page ■ (
It is determined whether the block at coordinates (0,0)) is a blank block 62', and if it is a blank block, the memory block allocation control unit 42 of FIG. If it is a valid block 62, the data corresponding to the valid block is read out from the picture frame memory 30 and output to the printing unit 50.

This makes it possible to reproduce print outputs ■ and print outputs ■ corresponding to virtual pages ■ and ■.

Also, while printing the printout ■ of the virtual page ■,
The printing data of the virtual page (2) can be written to the image memory 30 in parallel, and the processing speed can be increased.

Returning to FIG. 1 again, the specific operation of the apparatus of the present invention will be described.

In FIG. 1, print data 60 is divided into a large number of blocks 62 when viewed from a virtual page 61. As shown in FIG.

When performing a write operation, the data is input to the block determining section 41 and the connection switching circuit 45 in units of one word (for example, 8 bits). The block determining unit 41 is a circuit that determines whether each block 62 constituting the virtual page 61 is a blank block or a valid block. That is, the write data and the reference value 41a (data set to the level of blank data) are input to the comparator 41b provided in the block determination section 41. After performing this comparison for one block of data, the determination result is output to the memory block allocation control section 42.

The memory block allocation control unit 42 controls the image memory 30
This is a circuit composed of a microprocessor and the like that controls writing of data to the computer. Based on the determination result output by the comparator 41b, the memory block allocation control unit 42 prevents the data from being written to the image memory 30 if all blocks of the virtual page 61 are blank blocks consisting of only blank data. However, in the case of a valid block containing valid data, control is performed so that the write data manually input to the image memory 30 is written to a predetermined address via the connection switching circuit 45.

The address generation unit 43 is a circuit that generates an address and outputs it to the memory block allocation control unit 42 in order to read data of the virtual page 61 word by word.

The address conversion unit 44 performs a process for associating a mapping flag T that identifies whether each block is a valid block or a blank block in the order of the block addresses of the virtual page 61 with a block address RM of the image memory 30 into which each valid block is written. It has an address conversion memory 44a. This address translation memory 44a has a capacity capable of storing flags and the like for a plurality of virtual pages.

In addition, in the order of the block addresses of the image memory 30, empty blocks are used to store a page identification flag Pl""Px that identifies which virtual page's valid block is written to that block address. It is equipped with an instruction memory 44b.

The memory block allocation control unit 42 writes data of each virtual page to the image memory 30 in the manner shown in FIG. 9 while referring to the address conversion unit 44.
The data is then read out to the printing section 50 via the connection switching circuit 45. The printing unit 50 is a print engine having a mechanism as explained in FIG.

The printing apparatus of the present invention having the above configuration operates as follows.

First, when the address generation unit 43 generates the address of the virtual page, the memory block allocation control unit 42 reads out the data of the virtual page 61 word by word in the order of this address, and based on the determination result obtained by the block determination unit 41. If the data constitutes a blank block, it is not written to the image memory 30, and if it constitutes a valid block, it is written to the image memory 30. When the determination result that the read data is data included in a valid block is manually input to the memory block allocation control unit 42, the memory block allocation control unit 42 transfers the address conversion memory 44 of the address conversion unit 44 to the memory block allocation control unit 42.
See a.

FIG. 10 shows a detailed operational explanatory diagram of the address translation section.

This address conversion memory 44a stores a mapping flag T indicating which block contains the currently read data (whether a blank block is a valid block) and a block address RM of the image memory 30 into which the block is written. has been done. When storing the first data constituting a valid block in the image memory 30, the mapping flag has an initial value of zero, and the block address RM of the image memory 30
is also undecided. Therefore, in this case, the mapping flag is set to 1, the first block address of the image memory 30 is written to the block address RM of the image memory 30, and then the data for one word is written to that block of the image memory 30. Write to address.

Following that one word of data, l blocks of data that are successively read from the virtual page 61 are all contained in the same valid block, and when the mapping flag T is referenced, it is 1. Since this indicates that mapping has been completed, the data is written to the block address RM already written in the address conversion memory 44a. It is assumed that the image memory 30 is provided with an address pointer (not shown), which is incremented every time 1 to 8 data is written to control the write address.

On the other hand, when a predetermined valid block of the virtual page 61 is written to a predetermined block address of the image memory 30, the free block instruction memory 44b of the address conversion unit 44 stores information about which block address for each block address of the image memory 30. A page identification flag is written to identify whether data of a virtual page has been stored. Similar to the mapping flag, this page identification flag is 1 if the page is mapped, and 0 if the page is not mapped. Therefore, for each block in the image memory 30, if all the page identification flags are zero, it is known that the block has not been mapped to anything, and if any page identification flag is 1, the block has already been mapped. It turns out to be a block. When determining a block address for writing a new valid block, this empty block designation memory 44b is referred to.

In this way, the memory block allocation control unit 42 receives one address for the 3-month page of the address generation unit 4 in FIG.
, one page of virtual page image memory 3
Data writing to 0 is completed. Then, data for the next virtual page is written.

In parallel with this, printing of already written pages can be carried out. In this case, first, the address generation unit 43 in FIG. 1 generates an address in one direction of the virtual page 61. Memory block allocation control unit 42
refers to the address translation memory 44a of the address translation unit 44 based on this address.

Here, if the mapping flag T corresponding to the block address is 1, the valid data is read from the image memory 30 by referring to the corresponding block address RM of the image memory 30, and the valid data is read out from the image memory 30 via the connection switching circuit 45. The printing data is output to the printing unit 50. Further, referring to the address conversion memory 44a, if the mapping flag T is zero, the memory block allocation control unit 42 generates blank data by itself, and transfers this to the printing unit 50 via the connection switching circuit 45. Output to.

If you perform this operation one block at a time,
As shown in FIG. 9, the image on the virtual page 61 can be reproduced as a printout. When the reading is completed, all mapping flags T of that virtual page are cleared to zero, making it possible to write the next virtual page.

The present invention is not limited to the above embodiments.

The address conversion unit 44 associates the block address of the valid block in the virtual page 61 with the address of the image memory 30 into which the valid block has been written, as described above,
Furthermore, a mapping flag may be provided to identify valid blocks and blank blocks in the virtual page, and a page identification flag may be provided to identify the virtual page to which the valid block written in the image memory belongs.

Therefore, as shown in FIG. 1, it is not necessarily necessary to separately provide the address conversion memory 44a and the free block instruction memory 44b.

FIG. 1 shows a modification of the address translation section.

This address translation unit sets a page identification flag P+ corresponding to the virtual page block address.

P2. P3. P4, mapping flag T, and image memory block address RM are stored.

Here, the address conversion section is constructed on the assumption that, for example, four virtual pages (for normal images, the limit is about four pages at most) are stored in the image memory. That is, the page identification flag is 4 bits P1 to P4, the mapping flag T is 1 bit, and the remaining 11 bits.
A bit block address RM is prepared.

If such a table is stored in the memory of the address translation section 44, the processing explained in FIG. 1 will be executed.

By combining the table data into one in this way, the control signals can be simplified and the memory capacity can also be reduced, making it possible to highly integrate this circuit (LSI). Furthermore, if the mapping flag T is coded, four pages of mapping lag can be displayed in 2 bits.

Also, if the content of the virtual page is simpler, more virtual pages can be written to the image memory 30 for one page.
It becomes possible for

FIG. 2 shows a modification of the address translation unit when writing a large number of virtual pages in this way.

The data width of the address conversion section is 16, which is the same as that in Figure 1.
Here, the required number of bits are taken from the page identification flags P1 to Px, and then 1 bit is taken from the mapping flag T, and the block address RM is divided into two parts, including the next 16 bits of data. I am trying to display one block address. In this case, it goes without saying that virtual page block addresses are set every other page.

By such a method, the configuration of the address translation section 44 itself can be simplified, and the operation of the memory block allocation control section 42 can be simplified.

The present invention is not limited to the above embodiments.

The configuration of the printing section is not limited to electrophotography, but may be of any type such as a thermal printer type or a wire dot type. Further, the printing control section may be replaced with various circuits having similar performance.

(Effects of the Invention) According to the printing apparatus of the present invention described above, printing data for two or more pages can be stored using a relatively small-capacity image memory, for example, for one page, and the waiting time can be reduced. This enables high-speed printing processing without any pinching. Furthermore, the cost of the printing device can be reduced by reducing the memory capacity.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the printing apparatus of the present invention;
FIG. 2 is a block diagram of a conventional printing device, FIG. 3 is a conceptual diagram illustrating control of reading print output from a conventional image memory, and FIG. 4 is a specific example of the operation of reading print output from a conventional image memory. An explanatory diagram explaining an example, FIG. 5 is an explanatory diagram of the operation of the print carrot, FIG. 6 is a time chart explaining the writing/reading timing of a conventional image memory, and FIG. 7 is an explanation of the writing operation of a conventional image memory. 8 is a time chart illustrating a desirable image memory writing operation, FIG. 9 is an explanatory diagram illustrating the operating principle of the printing device of the present invention, and FIG. 10 is a time chart illustrating the address conversion section of the device of the present invention. Detailed operation diagram, 11th
12 and 12 are explanatory diagrams showing modified examples of the address translation section of the present invention. 30... Image memory, 40... Print control unit, 41.
...Block determination unit, 42...Memory block allocation control unit, 43...
Address generation section, 44...Address conversion section, 44a.
...Memory for address conversion, 44b...Memory for empty block instruction, 45...Connection switching circuit, 50...Print section, 60...Print data, 61...Virtual page, 62...・Brock, T.
...Mapping flag, RM...Image memory block address, P,,'P2...Px...Page identification flag. Patent applicant Oki Electric Industry Co., Ltd.

Claims (1)

[Scope of Claims] An image memory that stores print data, a print control unit that writes print data to the image memory, and a print unit that performs printing while reading print data from the image memory, The print control unit divides a virtual page consisting of one page of images virtually set in correspondence with print output into a plurality of blocks, and divides each block into blocks consisting only of blank data. a block determining unit that determines whether the block is a blank block or a valid block containing valid data; and based on the determination result of the determining unit, selecting only the valid block and writing data to the image memory in units of blocks. a write control unit that associates a block address of the valid block in the virtual page with a block address of the image memory to which the valid block is written, and A printing apparatus comprising: an address conversion section storing a mapping flag for identifying the blank block and a page identification flag for identifying a virtual page to which the valid block written in the image memory belongs.