JPH01236731A - Complementary analog switch - Google Patents

Abstract

PURPOSE:To prevent the malfunction by providing a protecting device including a switch element which is inserted between a signal line connecting two complementary transistor TR gates and a specific potential supply terminal and is controlled to be made conductive for nonconduction of gates. CONSTITUTION:If a positive excessive input signal is applied to a terminal 10 when CMOS gates 150 and 160 are turned off and the circuit between an analog signal input/output terminal 10 and a common terminal 1 is in the non- connection state, source electrodes 112 and 121 of FET switches 110 and 120 are pulled to a high positive potential together. The PN junction of the switch 110 is forward bias and a partial current flows to a supply voltage terminal VDD by a large positive signal. The absolute value of the voltage between the gate and the source exceeds a threshold voltage by the large positive signal to the source electrode 112 and the switch 110 is made conductive, and a current path is formed between the source electrode 112 and a drain electrode 113. However the potential of a terminal 102 does not rise because an FET 130 goes to the conductive state and is connected to an earth terminal, and FETs 150 and 160 are turned off as they are, and the excessive input signal does not reach the terminal 1.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to complementary analog switches, and particularly relates to monolithic, CMOS analog switches formed on integrated circuits,
Regarding chi.

[Conventional technology]

Conventionally, switch circuits used in analog signal input multiplexers formed on monolithic integrated circuits have been designed to provide a wide input voltage range for analog signal inputs.
Using the MO8 structure, for example, as shown in FIG. 4, each analog signal input/output terminal 10.20. ..., no, respectively, and the control signal 180.2 from the decoder circuit 2
i3o...

pMO8FET switch 150, 250.n80 stamped on the gate. -, n50 and control signal 180°28
Inverter 1 to which 0, ..., n80 are respectively input
70.270. ..., side leg signal 1 which is the output of n70
90,290. . . . nM08 FET switches 160, 260 . . . with n90 stamped on the gate.・.

n60, and a protection device (not shown) using a diode and a resistor is usually attached to each input terminal to protect against static electricity.

FIG. 5 is a schematic diagram showing an example of a case where the switch in the conventional multi-breather shown in FIG. 4 is implemented on an integrated circuit.

N-well 15 placed on p-type integrated LGL circuit board substrate 3
A pMO8FET switch 150 is formed on the substrate 1, and a 1c n MUS FET switch 160 is formed on the substrate 3.

Here, the control signal 180 becomes a simple level, and p, MUS
PET switch 150. 0MO8F'ET 160 is turned off, there is a disconnection between the analog signal input/output terminal 10 and the common terminal 1, the control signal 280 becomes low level, and the pMO8FET switches.

Chi 250. nMO8PET 260 is turned on, and together with analog signal input terminal 20, JI! F&Mc is the opposite of Eko l.
Suppose that when the device is in the prone state, an excessively negative input signal is marked 7JIJ as noise or the like at the analog signal input terminal IO. In the 9M08FET switch 150, a negative excessive input signal is applied to the north pole 152, and in this case, the gate electrode 155 is still at the level, so the pMO8k
'ET Sui, Chi150 doesn't turn on, but - Katana nMO8F
In the ET switch 160, when an excessively negative input signal is applied to the source electrode 161, a forward junction is formed with the p-type substrate 3, and the applied negative signal causes the current to flow to some 1s.
A current flows from the mold board ground point 4. Encased gate electrode 16
3 is at a low level, that is, almost at ground potential, and is 0MO8FET.
The switch 160 was turned off because the gate-source voltage VGII+ was lower than the threshold voltage VTIII, but because the source voltage 44161 became a negative potential,
Vas is VT even though the gate potential is almost the same as the ground potential.
When the voltage becomes larger than R, the nMO8FET switch 160 turns on, and this negative excessive input signal reaches the common terminal 1 too late, giving an adverse effect on the potential of the common terminal 1. - If an excessively positive input signal is applied to the power analog signal input terminal lO, the pMO8PET switch 150 will be turned on, contrary to the above, and will similarly have an adverse effect on the common terminal l. Ta.

[Problem to be solved by the invention J] The conventional 0MOs analog switch described above only has a 0MO8 gate inserted between the two analog signal terminals, the analog signal input/output terminal and the common terminal. The drawback was that excessive voltage applied to the output terminal could cause malfunctions.

An object of the present invention is to provide a complementary analog switch with a biased logic device that prevents malfunctions due to excessive voltage.

[Means to solve the problem]

The 4U sleeve-type analog switch of the present invention comprises complementary transistor gates inserted between at least one analog signal terminal and another analog signal terminal, respectively. another complementary transistor gate inserted in series with the gate, and t of the two complementary transistor gates.
It is inserted between the signal line connecting Lij and the specific potential supply terminal, and the I
It is customary to have a protection device including a switch element which is controlled by a control signal from IIIJ (Incorporated) so that when the gate of the complementary transistor is non-conductive, 1c is advanced.

[Example J Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit diagram of the first practical Rv according to the present invention.

The analog signal input/output terminals 10, 20, . . . are the protection devices 100, 200, . . . of the present invention. ...'s first terminal 101゜2
01, ・K connection gtt,, [d;! MUS P
ET switch (150, 160), (250, 260)
.

. . . are connected in common to their source potentials and to their drain electrodes to form a CMOS gate, and their common source tt poles are connected to the second terminals 102, 202 . ···It is connected to the. 9 MO8FET switches 150 of the protected switches
, 250. The gate electrodes of ... are each connected to the side leg signal line 1.
80,280...K followed by 1 MO8FET switch 160,260... The gate electrodes of ... are each 1
The ljlJ signal lines are 180 and 280 degrees. Protective device 100, 200. pMO8FE comprising...
The gate terminals of the 'l' switches 110, 210°, . . . are connected to the control signal lines 180, 280, . ... is connected to 0MO8FET switch 120°220, +・(1
) goo) 114ik&C+1rllel+signal [190
゜290,..., and these pMcJ:
31? ET switch 110, 210. ... source (
The protection device 100 is connected to the sources of the n-type MOS 1;
．． 200. ...'s first terminal 101, 201°...-
It is touched by @℃. Also to p 10sit'ET switches 110, 210. The drain electric image of... is n hl
O8PET switch 120, 220. Protective devices are installed on the drain electrodes of 10σ, 200°, respectively.
· are connected to terminals 102, 202, etc. of Wc2. Also protective device 100.200. The third MO of...
S PETX A, 0MO8FEAT switch (switch element) 130, 230. ...is protective device 1
00,200. ...'s second terminal 102.202°・
The gate electrode j connected between the control signal lines 180, 280 . ···It is connected to the.

Also protected MUMII'ET switch (CMOS)
Gate) (150, 160), (250; 260)
The common fi electrodes of ... are connected to each other and the common terminal l
(Other analog signal terminals) K-connected.

Here, the CMOS gates (150, 160) and (110
, 120) are turned on/off simultaneously, nMO8F E T
The switch 130 is turned on/off in opposite phase to the CMOS gate (110°120). Therefore, the CMOS gate (1
50, 160) and (110, 120) are off, the second terminal 102 of the protector (MC) SPET switch 130 is on and is low impedance grounded. -Man 〇10S gate (150゜160) and (11
0,120) is on, nMO8FhT switch,
The switch 130 is turned off, and the connection between the analog signal input/output terminal 10 and the common terminal 1 is very cold.

FIG. 2 is a schematic diagram showing an example of the protection device as an integrated circuit.

Now, when the CMOS game) (150, 160) is in a non-#j continuous state between the 1 analog signal input/output leakage lO and the common terminal 1, a positive excessive input signal is printed on the 1 analog signal input/output terminal lOK. Let's say it was 7J11. pMO8PET
The source electrode 121 of the MO8FET switch 120 and the source electrode 121 of the MO8FET switch 110 are both pulled to a large positive potential, and the n-well 1 of the 9M08 NET switch 110 is pulled to a large positive potential.
The PN junction between the electrode 11 and the source electrode 112 becomes biased toward the bile force, and due to the applied large positive signal, some current flows from the contact point 114 to the sore spot VDD. Also, 9MO8l'ET l l O is gate 1! i
The L pole is biased to the power supply potential via the terminal 103 and is normally off, but due to a large positive signal to the source voltage 112, the absolute value of the source-to-source voltage Vas becomes threshold 1 [voltage V
TI (Yoshi also becomes larger and passes through the monument, and an air flow path is formed between it and the drain electrode 113.) Since the 4-electrode type is different in the nMO8PET switch and Chi120 from the pMO8FET switch and Chi110, there are no problems at all. However, the second oB child 102i-!, nMO8FE connected to the MOS PET switch (110, 120)
'rX I, -F-130 is in a conductive state and is connected to the ground terminal, so Lm does not rise to 4 and the MOS)'
The ET switch pair (150° 160) remains off and this positive excessive input signal no longer reaches the common terminal l.

- When a negative excessive input signal is applied to the sword analog input/output 4 child 10, contrary to the above explanation, pMOIFIi:T
Switch 110 does not cause any problems, but nMO8l
Source conductivity 121 at I'E'l' switch 120
There is a bias in the pupil direction between the pupil and the substrate 3, and some of the current flows from the radix point 4), and 0MO8PETx A and 120 are conductive, and the source 1! Pole 121 and drain electrode 1
A 1JL epidemic path is formed between Japan and 22. However, nMO
Since the second terminal 102 is grounded with low impedance by the SFET switch 130, the MO8F'ET switch pair (150, 160) remains off, and this negative excessive input signal cannot reach the common terminal 1. Go away.

Here, the potential of the second terminal 102 is obtained by dividing the input excessive input signal by the on-resistance of the MO8FET switch 110 or 120 and the on-resistance of the MOS1+'ET switch 130, so the potential of the excessive input signal - ') Absolute%
``J It wo V I N sp M (J SiI'
b 'I'' The on-resistance when f110 is turned on is kl, l 10, nMO8FET switch, chi120
The on-resistance when turned on is approximately 120°, and nMO8l'
The off percentage of the ET switch 130 is R130 and f6, and the potential V102 of the second (D4i) element 102 is as follows: In the case of a positive excessive input signal, Vx02 = VtNxRx30/(R110 + R130)
For negative excessive input signal, V102=-VINxR130/(几120+tt13
0).

Therefore, when an excessive input signal is applied, whether it is a positive excessive input signal or a negative excessive input signal, the potential V102 of the second terminal 102 is determined as described above, so nMO8li'ET If the on-resistance of the switch 130 is small, there is no problem at all.

In this first embodiment, the A108FET switch 1 is more effective in the case of a positive excessive input signal than in the case of a negative excessive input signal.
Since the gate-source voltage Vcs of 50 or 160 can be kept small, the effect of protecting against excessively positive input signals is large.

FIG. 3 is a circuit diagram of a second embodiment of the invention.

Although the configuration is almost similar to that of the first embodiment shown in FIG. 1, each protection device 100, 200. In the first embodiment, the switch elements connected to the second terminals 102, 202, etc. of the In the example 9MO8F
'ET Sui, Te140.240. ... is connected to the power supply terminal vDDK.

With this configuration, the first '*: ζ which operates in accordance with the embodiment, however, in this case, contrary to the first embodiment, in the case of a positive excessive input signal, the negative excessive input signal The signal sword is MO8FET switch 150'! Since the gate-source voltage Vcs of 160 or 160 can be suppressed to a small value, the protection effect ρ· against excessive negative input signals is large.

Although the case where the complementary transistor gates have a CMO8 configuration has been described above, it is clear that lateral bipolar transistors may also be used.

[Young fruit of invention]

As explained above, the present invention inserts another sliding bucket gate into a supplementary type f analog switch, and adds a switch element 4 whose other end is connected to the weight terminal or the ground terminal. As a result, excessive positive or negative input signals applied to the input/output terminals (analog signal terminals) may be mistakenly transmitted to the other analog signals. This eliminates the possibility of slippage, and has the effect of preventing the alternating action of the phase M type analog switch.
4. If a sandal hold circuit is connected to the other end of the analog switch, the bold value will be distorted even if an excessive input signal is applied to the input/output circuit in a non-conventional hold state. Not done.

Also, if one end of several analog switches are connected in common to form a multi-branch, even if an excessive input signal is applied to an unselected input/output terminal, the selected switch will not be affected at all. .

As explained above, the analog switch circuit used in combination with the bamboo sandal hold circuit, or the analog switch circuit used in combination with the multi-grip circuit, has a rough effect of preventing the occurrence of 4 left when excessive input occurs. This shows that.

It goes without saying that the present invention may be used in combination with known electrostatic and warning methods, such as fitting a current limiting resistor in the pillar plate leading from the input/output terminal to the protection device.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of the first embodiment of the invention, and Fig. 2 is a circuit diagram of the first embodiment of the invention.
Schematic diagram for explaining the embodiment at the TV level, Part 3
FIG. 4 is a circuit diagram of the second ground V of the present invention, FIG. 4 is a circuit diagram of a conventional example, and FIG. 5 is a schematic diagram for explaining the conventional example at a six-chig level. l...Common terminal, 2...Decoder, 3
・・・・・・Koji circuit base, 4・・・・・・Substrate correction point, 10.20. .... no...Irita power terminal, 100, 200. ...
Protective device, 101.201...First terminal, 1
02, 202... Second terminal, 103, 104
, 203, 204... terminal, 110, 140.
150, 210, 240, 250°...+150...
...9MO8FET switch, 120°130.
160, 220, 230, 260. -n60 ・=--
-n M (JS k' ET switch, 170, 27
0. =-n70...Inverter, 180,19
0,280,290°-n 80, n 90-...
-+tilj11141Fo number or city 111it4+ signal love, 111.151--n well, 112, 113,
121°122.131,132,152,153,1
61°162... Source or drain electrode, 1
15°123.133,155,163...Gate electrode. Agent Masu Buroshi Uchi Hara Shincho 4 Ro

Claims (1)

[Claims] In a complementary analog switch comprising a complementary transistor gate inserted between at least one analog signal terminal and another analog signal terminal, another complementary transistor gate inserted in series with the complementary transistor gate. and a control signal inserted between a signal line connecting the gates of the two complementary transistors and a specific potential supply terminal, and controlling conduction/non-conduction of the gates of the two complementary transistors. A complementary analog switch characterized by having a protection device including a switch element that is controlled to be conductive when conductive.