JPH0124980Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to an automatic phase correction circuit for a receiving device, etc., which detects an antenna tracking error signal using a synchronous detection method.

Conventionally, in a receiving device that detects the tracking error signal as described above, the phase function is changed by changing the receiving frequency due to the relationship between the frequency characteristics of the power supply system that picks up the tracking error signal and the frequency characteristics of the hardware in the receiving device. fluctuates, and one phase adjuster for synchronous detection is required for each receiving frequency. Therefore, when receiving over a plurality of reception frequencies or a wide band, the number of phase adjusters increases and phase adjustment must be performed each time, which is a drawback.

An object of the present invention is to eliminate these drawbacks and provide an automatic phase correction circuit that can easily adjust the phase over a wide band.

The present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, Pi is a signal input terminal, 1 is a front end section, 2 is a continuously variable phase shifter for phase correction, 3 is a tracking error signal detection section, and 4 is a comparison between the tracking error signal detection voltage and a specified reference voltage. This is a detector that detects the phase setting deviation by. In response to the detection output of the detector 4, the first controller 5 instructs the up/down counter 6 to up, down, start, and stop. Up-down counter 6 counts clocks from clock generator 7, and non-volatile memory 8 stores this count in association with parameter information input from terminal 10 corresponding thereto. Further, the memory 8 receives commands such as writing and resetting from the second controller 9. The output digital signal from the memory 8 is sent to the D/A converter 11.
is converted into an analog signal by level converter 1.
2, it is converted into a continuously variable phase shifter control signal for phase correction. The operation of the circuit shown in FIG. 1 will be described in further detail below.

First, when a predetermined parameter (for example, reception frequency information) is input to the parameter information input terminal 10, the clock count number already stored in the nonvolatile memory 8 is output, and the D/A converter 11 and level converter The continuously variable phase shifter 2 is set to have a phase relationship corresponding to the reception frequency. In this state, when a signal set in a certain phase relationship (for example, a tracking error signal) is input from the signal input terminal Pi, this signal passes through the front end section 1 and the continuously variable phase shifter 2, and then Input to error signal detection section 3, error signal (ERROR SIG)
is output as This error signal changes in response to changes in the phase of the front end section, power supply section, etc.

The output error signal is compared with a threshold set in the detector 4, and one of three types of information is given: "greater than" the threshold, "less than" the threshold, or "within the threshold". After being determined, it is input to the first controller 5. Based on this information, the first controller 5 informs a counter 6, which counts the clocks of the clock generator 7, that the clock is greater than the threshold value.
When the countdown is "less than" the threshold
It outputs a count-up control signal when the signal is on, and a stop signal when the value is "within the threshold". After the count from this counter 6 passes through the memory 8,
The signal is converted into an analog signal by a D/A converter 11, and further passes through a level converter 12 to control a continuously variable phase shifter 2. The second controller 9 selects one of two modes for the operation of the memory 8: "through mode" and "write mode". In "through mode", the output of counter 6 is directly output to D/
In the mode connected to the A converter 11, in this case,
From the continuously variable phase shifter 2 and the tracking error signal detection section 3,
A closed loop is formed by the counter 6, memory 8, and level converter 12, and the tracking error signal (ERROR
SIG) is determined by the detector 4 to be "within the threshold" and the counter 6 stops. If the memory 8 is controlled to the "write mode" while the counter 6 is stopped, the count number when the counter 6 stops is stored instead of the already stored count number.

Incidentally, the mode selection of the second controller 9 is normally made at the discretion of the user. Further, the accuracy of the phase control is determined by the relationship between the phase control range and the count number of the counter 6.

As explained above, according to the present invention, it is possible to relatively easily correct and adjust phase changes due to changes in parameters such as frequency information, or long-term phase fluctuations in hardware, thereby eliminating the need for complicated adjustment procedures. It is also possible to shorten the adjustment time accordingly.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention. In the figure, Pi...signal input terminal, 1...
...Front end section, 2... Continuously variable phase shifter for phase correction, 3... Tracking error signal detection section, 4... Phase fluctuation amount detector, 5... First controller for up/down counter, 6... Up-down counter, 7...
Clock generator, 8...Memory, 9...Second controller for memory, 10...Parameter information input terminal,
11...D/A converter, 12...Level converter,
It is.

Claims (1)

[Scope of utility model registration request] a variable phase shifter that receives an input signal and adjusts its phase according to a predetermined control voltage; a phase fluctuation detector that receives the output of the variable phase shifter and detects phase fluctuations of the input signal; and this detector. a counting controller that generates a control signal to compare the output of the output with a predetermined threshold value, stop counting when the output is within the threshold value, and increase or decrease the count when the output is outside the threshold value; A counter whose counting is controlled by the control signal from the counting controller to which a clock is input, and the counting output of this counter and related parameters are stored in association with each other, and output when the counting control signal is within a threshold value. A non-volatile memory that outputs the output of the counter as it is at other times, an A/D converter that converts the output of this memory into an analog value, and a level adjustment of the output of this A/D converter. an automatic phase correction circuit including a level adjuster for creating the control voltage and supplying it to the variable phase shifter.