JPH01269149A - Internal bus control system - Google Patents

Abstract

PURPOSE:To prevent the generation of a transfer error due to a data shortage with a high order agent by including the storing condition of a buffer for transferring the data of the high order agent in the arbitration conditions of the use request of an internal bus. CONSTITUTION:A high order agent 11, when the data storing quantity of a buffer becomes a specified value or below, gives a condition displaying signal 110 to an internal bus control part 14. Based on the condition displaying signal 110 at the internal bus control part 14, a prescribed priority is changed, and with the high order agent 11, in which the data storing quantity becomes the specified value or below, as a first priority, gives an internal bus use permitting signal 130. Thus, it can be prevented that the high order agent generates the transfer error.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention is applied to an internal bus control system of an information processing device.

〔overview〕

In an internal bus control system, the present invention prevents a higher-level agent from causing a transfer error due to lack of data by including the storage state of a higher-level agent's data transfer buffer in the arbitration condition of an internal bus use request. This is how it was done.

[Conventional technology]

Conventionally, an internal bus control system for an information processing device arbitrates requests for use of the internal bus according to a predetermined priority order for each agent on the internal bus.

In an information processing device that continuously sends data to an external device in synchronization with a specific clock, it is necessary to constantly store data in the buffer of the upper agent.
If the data to be transferred to the external device cannot be prepared in the buffer, a transfer error occurs.

[Problem that the invention seeks to solve]

However, in such a conventional internal bus control method, the internal bus was arbitrated only based on the priority of the agents connected to the internal bus, so the transfer capacity of the internal bus, (-the sum of the transfer capacities of each interface) There was a drawback that if a large number of upper level agents were connected to the limit, a transfer error would occur.

[Means for solving problems]

The present invention provides an internal bus control system in which each upper-level agent includes means for providing a status display signal to an internal bus control unit when the amount of data stored in a buffer becomes less than a specified value, and the internal bus control unit The apparatus is characterized in that it includes means for changing a predetermined priority order based on the status display signal so as to give priority to the one with the smaller storage amount.

[Effect]

The upper agent gives a status display signal to the internal bus control unit when the amount of data stored in the buffer becomes less than a specified value. The internal bus control unit changes the predetermined priority order based on this status display signal, and gives top priority to the upper agent whose data storage amount is less than the specified value, and gives an internal bus use permission signal. The above operations can prevent the upper level agent from causing a transfer error.

〔Example〕

Embodiments of the present invention will be described with reference to the drawings. The figure is a block diagram of a plotter of an internal bus control device according to an embodiment of the present invention. In the figure, the internal bus control device 10 includes a plurality of upper level agents 111 to 11. and a lower agent 13 that transfers data via the internal bus 100 to the upper agent 11 that has received the internal bus use permission signal 130 among the plurality of agents, and each of the upper agents 111 to 113 has the following functions: Hara 77 that stores the transfer data of the lower agent 13 (!: LTEFI
FO12+ ~123 and FIFO121~123
The contents of the external device 20. are continuously synchronized with a specific clock. -203 via interfaces 301-303, and internal bus use request signals 1201-120.
and means for outputting a bus use request signal 120.
The internal bus control unit 14 provides an internal bus use permission signal 130 to the upper agent 11 selected based on a predetermined priority order. 7 Here, the feature of the present invention is that each of the upper agents 111 to 113 has PIF0121 to 123, respectively.
includes means for supplying status display signals 1101 to 1103 to the internal bus control section 14 when the amount of data stored therein becomes less than a specified value;
The present invention includes means for changing the predetermined priority order so as to give priority to the one with the smaller storage amount based on the storage amount.

The operation of the internal bus control device having such a configuration will be explained. In the figure, status display signals 1101 to 110 are signals that become "1" when the amount of data stored in each FIFO 12+ to 123 becomes equal to or less than a specified value, and this is a signal that becomes "1" when the amount of data stored in each FIFO 12+ to 123 falls below a specified value. ~20. It is also a warning sign that there is less data to transfer. Internal bus use request signal 120. ~1203 is upper level agent 1
1. -113 is a signal that becomes "1" when ready to receive data from the lower agent 13.

The internal bus control section 14 outputs status display signals 110. ~110
゜ and internal bus use request signals 120 to 1203, and internal bus use permission signals 1301 to 130.
3 is set to "1" to permit use of the internal bus 100.

The priority order of this internal bus arbitration is that the status display signal 110 has the highest priority, followed by the predetermined priority order of each higher-level agent. If the upper level agents 11 to 113 all set the internal bus use request signals 1201 to 1203 and the amount of data stored in the PIFO 123 is small, the conventional internal bus control device
Permission to use 0 is granted to the upper agent 111, then the upper agent 112, and finally to the upper agent 113.
The use of the internal bus 100 was permitted. For this,
The upper level agent 113 was unable to continuously send data to the external device 203, resulting in a transfer error.

However, in the bus control method of this embodiment, in such a state, the internal bus control unit 21 makes a judgment including the notification of the status display signal 1103 and gives permission to use the Nanbu bus 100 to the higher-level agent 113. , upper agency)
11 will not cause a transfer error.

〔Effect of the invention〕

As described above, the present invention has the excellent effect of preventing upper-level agents from causing transfer errors and connecting a large number of higher-level agents to the bus to the maximum transfer capacity of the internal bus.

[Brief explanation of the drawing]

The figure is a block diagram of a bus control device according to an embodiment of the present invention. 10... Internal bus control device, 111-11. ...Upper agent, 12. ~123...FIFO113
...lower agent, 14...internal bus control unit,
201 to 203...external device, 30, to 303...
Interface, 100...Internal bus, 110I~1
103...FIF○ status display signal, 1201-12
03...Internal bus use request signal, 1301 to 1303
...Internal bus use permission signal. Patent applicant: NEC Corporation 2-1 Agent: Patent attorney Naotaka Ide

Claims (1)

[Scope of Claims] 1. The above agent comprises a plurality of higher-level agents and a lower-level agent that transfers data via an internal bus to a higher-level agent among the plurality of higher-level agents that has received an internal bus usage permission signal; Each higher-level agent has a buffer for storing the transfer data of the lower-level agent, a means for continuously transmitting the contents of this buffer to its external device in synchronization with a specific clock, and is ready to receive data. and means for outputting an internal bus use request signal to notify that the internal bus use permission signal is given to a higher-level agent selected based on a predetermined priority order in response to the internal bus use request signal. In an internal bus control system comprising an internal bus control unit, each of the upper level agents includes means for providing a status display signal to the internal bus control unit when the amount of data stored in the buffer becomes less than a specified value; An internal bus control system characterized in that the control section includes means for changing the predetermined priority order so as to give priority to the one with the smaller storage amount based on the status display signal.