JPH01312852A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To suppress hillocks of a semiconductor device with small wiring width or small wiring gap to avoid short circuits of wiring by using a TiN as barrier metal and forming a cap metal layer of TiN, etc., on a wiring metal layer. CONSTITUTION:A barrier metal layer 13 made of titaniumnitride(TiN) is formed on a contact metal layer 2, and an interconnection metal layer 14 is formed on the barrier metal layer 13. Then, a cap metal layer 15 made of transition metal nitride is formed on the interconnection layer 14. Thereby using TiN as the barrier metal layer 13, and forming the cap metal layer 15 of TiN, enlarging and increasing number of hillocks to be formed are suppressed both in vertical and horizontal directions. Therefore, an interconnection short circuit or a layer short circuit of a semiconductor apparatus which requires micro interconnection circuity is avoided, and forming of a through hole becomes easy.

Description

[Detailed Description of the Invention] [Summary of the Invention] In contact formation, titanium nitride (TiN
) is used as a barrier metal to form a semiconductor device suitable for forming wiring in a fine structure. The purpose of the present invention is to provide a method for manufacturing a semiconductor device that facilitates openings such as the following: forming a contact metal layer on a base, and forming a barrier metal layer made of titanium nitride (TiN) on the contact metal layer. a step of forming a wiring metal layer on the barrier metal layer; and a step of forming a cap metal layer made of transition metal nitride on the wiring metal layer. Contains and constitutes a manufacturing method.

[Industrial application field]

The present invention relates to a method for manufacturing a semiconductor device suitable for forming interconnects with a fine structure when titanium nitride (TiN) is used as a barrier metal in contact formation.

[Conventional technology]

Conventionally, wiring materials for large-scale integrated circuits (LSI) include:
Aluminum-silicon (AI-Si) alloy was used, and hillocks occurred, but this did not become a problem because the wiring spacing was not so strict. However, in recent years, with the demand for higher integration of semiconductor devices, elements have become smaller, and conventional A1-Si alloys have
With the miniaturization of e), the contact resistance increases due to epitaxial growth of excess silicon into the contact hole, so-called solid phase epitaxial growth.

■Resistance to stress migration and electromigration deteriorates due to miniaturization of wiring width.

■As interconnect spacing becomes finer, there are problems such as an increase in leakage or short circuits between interconnects due to hillocks.

On the other hand, there is a method of using silicide as a contact metal as a means to solve the above problem.
It cannot be applied to submicron-rule devices because the problem of contact resistance is not sufficiently low and the contact resistance is not very low.

Therefore, in recent years, a wiring structure in which contact is made of titanium (Ti) has been attracting attention.

FIGS. 3(a) and 3(b) are cross-sectional views of conventional wiring portions. In FIG. 1A, a contact metal layer 2 of Ti, a barrier metal layer 3 of TiN, and a wiring metal layer 4 of A2 alloy are sequentially formed on a base 1. In this technique, Ti is used to make contact with the base 1, and TiN is used to form a barrier metal layer 3 that prevents the reaction between Ti and A2. Although this structure is generally effective for the above-mentioned problem (2), there is a problem that the hillocks 5 become large and numerous due to the presence of T i N in the subsequent heat treatment.

Therefore, a method has been proposed in which a titanium (Ti) layer 6 is sandwiched between the barrier metal N3 of TIN and the wiring metal layer 4 of A2 alloy, as shown in FIG. 3(b).
to of Technical Papers
1985 Symposium VLSI Tec
hnology, paper number L7 pp 50-51 M
ay1985). Thereby, the hillock 5 in the upper (vertical) direction can be made smaller.

[Problem B to be Solved by the Invention] However, when conventional TiN is used as the barrier metal layer 3, the vertical hillocks 5 can be reduced by further placing a Ti layer 6 on top of it. , it was not possible to suppress the lateral hillocks 5, resulting in problems such as short circuits between wires when the wire spacing was reduced.

In addition, in the wiring metal layer 4 where the top layer of the wiring is made of A2 alloy,
It is difficult to form through holes to make contact with upper layer wiring due to the high reflectance of A2 alloy.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a method for manufacturing a semiconductor device that can suppress hillocks and prevent short circuits between interconnections when TiN is used as a barrier metal layer, as well as facilitate opening of through holes and the like.

[Means to solve problems]

The above-mentioned problems include a step of forming a contact metal layer on the base, a step of forming a barrier metal layer made of titanium nitride (TiN) on the contact 1-metal layer,
The present invention is solved by a method for manufacturing a semiconductor device, comprising: forming a wiring metal layer on the barrier metal layer; and forming a cap metal layer made of transition metal nitride on the wiring metal layer. be done.

FIG. 1 is a sectional view of a semiconductor device for explaining the present invention in detail. In the figure, 11 is a base for forming a contact, and 12 is molybdenum silicide (MoSiJ) and tungsten silicide (WSix) formed on the base 11.
, silicides such as titanium silicide (TiSix), or adhesive flux metals such as titanium (Ti), molybdenum (Mo), and tungsten (-).
13 is a barrier metal layer typically made of titanium nitride (TiN) formed on the contact metal layer 12, and 14 is an Af layer formed on the barrier metal layer 13. - A wiring metal layer made of Si alloy or the like; 15 a cap metal layer made of TiN or the like formed on the metal distribution layer 14; Reference numeral 16 denotes an interlayer insulating film, and 17 denotes a resist film. Through-hole openings 18 are formed in this resist film 17 as an opening resist pattern, and through-holes are formed using this resist film 17 as a mask.

[Function] In the present invention, by using TiN as the barrier metal layer 13, the hillocks that occur are suppressed in both the vertical and lateral directions by forming the cap metal layer 15 of TiN. In addition, in the case of multilayer wiring, since the TiN cap metal layer 15 has a low reflectance, diffuse reflection by the lower wiring metal of the through-hole forming film with the upper wiring is prevented, and patterning becomes easier.

Therefore, in the case of semiconductor devices that require fine wiring,
Short circuits between wires and between the eyebrows are prevented, and through-holes can be easily formed.

〔Example〕

Hereinafter, the present invention will be specifically explained with reference to an illustrated embodiment.

FIGS. 2(a) to 2(f) are cross-sectional views of the manufacturing process of the wiring portion of the semiconductor device according to the embodiment of the present invention. Note that parts corresponding to those in FIG. 1 are denoted by the same reference numerals.

First, as shown in FIG. 5A, a contact metal layer 12 made of a silicide such as MoSix, WSi, Ti5iX, or a glue flux metal such as Ti, Mo, or W is formed on a base 11 on which a contact is to be formed. The film thickness is approximately 1,000 people.

Next, as shown in FIG. 5B, a barrier metal layer 13 such as TiN is formed on the contact metal layer 12 at a thickness of 500 to 100%.
The film thickness is approximately 500 people.

Next, as shown in the same figure (C), the barrier metal layer 13
On top, a wiring metal layer 14 made of Al-5t alloy or the like is placed at a thickness of 0.
The film is formed to have a thickness of about 5 to 1.0 μm.

Next, as shown in FIG.
The film thickness is approximately 700 people.

Next, as shown in FIG. 4E, the contact metal layer 12, barrier metal layer 13, wiring metal layer 14, and cap metal layer 15 are patterned.

Next, as shown in FIG. 5F, in the case of multilayer wiring, after forming a glabellar insulating film 16 such as an oxide film, a through hole 19 is opened in the interlayer insulating film 16 by etching using a resist film (not shown) as a mask.

According to the above configuration, by forming the TiN cap metal layer 15, hillocks that occur due to the use of TiN as the barrier metal layer 13 are suppressed in the vertical direction, and hillocks in the lateral direction are also suppressed. has been experimentally confirmed. In addition, in the case of multilayer wiring,
Since the TiN cap metal layer 15 has a low reflectance, diffused reflection by the lower wiring metal of the through-hole forming film with the upper wiring is prevented, and patterning is facilitated. Therefore, in the case of a semiconductor device that requires fine wiring, short circuits between wiring lines and short circuits between the eyebrows can be prevented, and the through holes 19 can be easily formed.

Note that in this embodiment, the contact metal layer 12 is T
Although Ti is used, various silicides and other frac metals other than Ti can be used as long as they can make ohmic contact with at least the N-type and P-type diffusion layers of the base 11.

Further, the wiring metal layer 14 is made of aluminum-silicon (Al
-5t), aluminum-copper (A1-Cu), and other alloys containing i as a main component can be used, and it is not necessary to use pure aluminum.

Furthermore, for the cap metal layer 15, transition metal nitride can be used in addition to Ti nitride.

〔Effect of the invention〕

As explained above, according to the present invention, titanium nitride is used as a barrier metal and a cap metal layer such as titanium nitride is formed on a wiring metal layer, thereby enabling a semiconductor device with narrow wiring width and wiring spacing. Also, a wiring can be formed in which hillocks can be suppressed and short-circuits do not occur between wirings. In addition, for multilayer wiring, it prevents diffused reflection from the lower wiring metal, and allows for easy opening of through holes.
It greatly contributes to improving the degree of integration and reliability of semiconductor devices.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a semiconductor device explaining the present invention in detail, FIGS. 2(a) to (f) are cross-sectional views of the manufacturing process of an embodiment of the present invention, and FIGS. 3(a) and (b) are conventional FIG. In the figure, 11 is a base, 12 is a contact metal layer, 13 is a barrier metal layer, 14 is a wiring metal layer, 15 is a cap metal layer, 16 is an interlayer insulating film, 17 is a resist film, 18 is a through-hole opening, 19 indicates a through hole. Patent Applicant Fujitsu Limited Representative Patent Attorney Akimoto Kuki Yoshiyuki Osuga No. 1 'Q 〒27 Tsutsumi Higashi, L Hikoke・Suke 1st page 3r:! J 1-1,000 吃2--KO〉771-Meta 1ν1 3--Pariamek 1→ 4-1 Hai East Ri 1 Shi Cao 5--Jiro 7 b --”IA.

Claims (1)

[Claims] A step of forming a contact metal layer (12) on a base (11), and a step of forming a barrier metal layer (13) made of titanium nitride (TiN) on the contact metal layer (12). and a wiring metal layer (14) on the barrier metal layer (13).
A method for manufacturing a semiconductor device, comprising: forming a cap metal layer (15) made of a transition metal nitride on the wiring metal layer (14).