JPH0140500B2 - - Google Patents

Info

Publication number
JPH0140500B2
JPH0140500B2 JP12265981A JP12265981A JPH0140500B2 JP H0140500 B2 JPH0140500 B2 JP H0140500B2 JP 12265981 A JP12265981 A JP 12265981A JP 12265981 A JP12265981 A JP 12265981A JP H0140500 B2 JPH0140500 B2 JP H0140500B2
Authority
JP
Japan
Prior art keywords
insulating film
wiring
fuse
thickness
fuse part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP12265981A
Other languages
Japanese (ja)
Other versions
JPS5823475A (en
Inventor
Nobuo Sasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56122659A priority Critical patent/JPS5823475A/en
Publication of JPS5823475A publication Critical patent/JPS5823475A/en
Publication of JPH0140500B2 publication Critical patent/JPH0140500B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/49Adaptable interconnections, e.g. fuses or antifuses
    • H10W20/493Fuses, i.e. interconnections changeable from conductive to non-conductive
    • H10W20/494Fuses, i.e. interconnections changeable from conductive to non-conductive changeable by the use of an external beam, e.g. laser beam or ion beam

Landscapes

  • Read Only Memory (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Description

【発明の詳細な説明】 本発明は、配線途中にヒユーズ部分を形成して
おき、それを必要に応じて溶断し、正常なもの或
いは完成されたものとする半導体装置の製造方法
に於ける改良に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention is an improvement in a method for manufacturing a semiconductor device in which a fuse portion is formed in the middle of the wiring, and the fuse portion is blown as necessary to make the device normal or complete. Regarding.

近年、半導体記憶装置は、頓に大容量化の傾向
に在るが、それにつれて製造歩留りの低下も著し
くなる。
In recent years, the capacity of semiconductor memory devices has been rapidly increasing, but the manufacturing yield has also been significantly reduced.

ところで、この種装置は、その製造後に不良で
あることが判明しても再生することは不可能であ
つて、例え一つのメモリ・セル不良であつてもそ
のチツプは廃棄処分にしなければならない。
By the way, even if this type of device is found to be defective after its manufacture, it is impossible to reproduce it, and even if one memory cell is defective, the chip must be discarded.

しかし、それでは極めて不経済であるから、前
記のような場合に、その不良セルの動作を補償
し、そのチツプとして、正常なメモリ作用をさせ
ることが考えられている。即ち、正規のメモリ・
セル・アレイの他に余分のメモリ・セルを形成し
ておき、不良メモリ・セルを含む或る列を余分に
形成したメモリ・セルの列で代替することが行な
われている。
However, since this would be extremely uneconomical, it has been considered to compensate for the operation of the defective cell in the above-mentioned case and allow the chip to function normally as a memory. That is, regular memory
Extra memory cells are formed in addition to the cell array, and a certain column containing a defective memory cell is replaced with the extra memory cell column.

また、或る種の装置では、完成された後、配線
の一部を切断するなどして特別な機能を持たせる
ことができるようにして、少量多品種生産のコス
ト高を解消することも行なわれている。
In addition, after some types of equipment are completed, it is possible to add special functions by cutting some of the wiring, etc., thereby eliminating the high cost of producing a wide variety of products in small quantities. It is.

このようなメモリ・セルの代替、特別な機能付
与は、通常、アルミニウム配線とアルミニウム配
線との間に多結晶シリコン・ヒユーズ部分を設
け、それを電流加熱で溶断することに依つて行な
うものが多い。即ち、これはヒユーズ型のプログ
ラム可能読出し専用メモリ(PROM)に使われ
ている技術をそのまま利用したものである。
Such replacement of memory cells and provision of special functions are usually achieved by providing a polycrystalline silicon fuse section between aluminum wiring lines and blowing it out using electric current heating. . That is, this technology is directly used in fuse-type programmable read-only memories (PROMs).

しかしながら、多結晶シリコンはアルミニウム
に比較して抵抗値が大である為、溶断しないヒユ
ーズ部分の影響で例えばスイツチング・スピード
が低下したり発熱量が大になる等の欠点が在る。
However, since polycrystalline silicon has a higher resistance value than aluminum, it has drawbacks such as reduced switching speed and increased heat generation due to the fuse portion that does not blow out.

そこで、ヒユーズ部分をアルミニウムにするこ
とも考えられるが、アルミニウムは抵抗値が低い
ので、特定の部分、即ち、ヒユーズ部分を電流加
熱で溶断するのは因難である。
Therefore, it is conceivable to use aluminum for the fuse portion, but since aluminum has a low resistance value, it is difficult to blow out a specific portion, that is, the fuse portion, by electric current heating.

この因難を解消する為にはレーザ・ビームで焼
切ることも考えられるが、現在、ヒユーズ部分の
幅としては、高集積化の点から4〔μm〕以下に
されている。これに対し、レーザ・ビームは、そ
のスポツトを最も絞つた状態にしても通常は10
〔μm〕程度であるから、隣接する部分も溶解す
る可能性がある。そして、例え2〔μm〕程度に
絞れたとしても、今後は溶断すべきヒユーズ部分
に狙いをつけることが困難になる。電子ビーム露
光装置の位置決め機構と同様のものを使用すれば
容易であるが、そのような機構は極めて高価であ
る。
To solve this problem, it may be possible to burn it out with a laser beam, but the width of the fuse portion is currently set to 4 [μm] or less from the viewpoint of high integration. In contrast, a laser beam, even at its most focused spot, typically has a
Since it is about [μm], there is a possibility that adjacent parts may also be dissolved. Even if it were possible to narrow down the size to about 2 [μm], it would be difficult to target the fuse that should be blown out in the future. It would be easy to use a positioning mechanism similar to that of an electron beam exposure apparatus, but such a mechanism is extremely expensive.

本発明は、アルミニウム或いは多結晶シリコン
で作られたヒユーズ部分の上の絶縁膜の厚さを適
切に選択し、大径のレーザ・ビームを照射しても
ヒユーズ部分のみを適確に溶断できるようにする
ものであり、以下これを詳細に説明する。
The present invention appropriately selects the thickness of the insulating film on the fuse part made of aluminum or polycrystalline silicon, so that only the fuse part can be blown out properly even when irradiated with a large diameter laser beam. This will be explained in detail below.

本発明では、溶断したい部分、即ち、ヒユーズ
部分の上の絶縁膜(SiO2、PSGなど)の厚さを
反射防止膜の条件である。
In the present invention, the thickness of the insulating film (SiO 2 , PSG, etc.) on the part to be fused, that is, the fuse part, is the condition for the antireflection film.

λ/4+m/2λ に基づいて定める。尚、λは絶縁膜中のレーザ波
長、mは1、2、……の正の整数である。ここ
で、絶縁膜をSiO2とし、λ(SiO2)をSiO2中のレ
ーザ波長とする。
Defined based on λ/4+m/2λ. Note that λ is the laser wavelength in the insulating film, and m is a positive integer of 1, 2, . . . . Here, the insulating film is SiO 2 and λ(SiO 2 ) is the laser wavelength in SiO 2 .

例えばYAGレーザでは、 λ(SiO2)/4=1815〔Å〕 であるが、m=1として、前記絶縁膜の厚さを
5445〔Å〕とし、他の部分の厚さを、 m/2λ(SiO2) より、例えば7260〔Å〕とする。
For example, in a YAG laser, λ(SiO 2 )/4 = 1815 [Å], but if m = 1, the thickness of the insulating film is
The thickness of the other part is m/2λ (SiO 2 ), for example, 7260 [Å].

従つて、図に見られるような半導体装置に於い
て、1をシリコン半導体基板、2を溶断すべきヒ
ユーズ部分、3を溶断しない配線、4を二酸化シ
リコン絶縁膜、L1は絶縁膜4の厚さ、L2はヒユ
ーズ部分2上の絶縁膜4の厚さ、L3は配線3上
の絶縁膜4の厚さとすると、 L1=14500〔Å〕 L2=5445〔Å〕 L3=7260〔Å〕 であり、また、ヒユーズ部分2及び配線3の厚さ
は4000〔Å〕とする。尚、各厚さは±100〔Å〕程
度の誤差は許容される。
Therefore, in a semiconductor device as shown in the figure, 1 is a silicon semiconductor substrate, 2 is a fuse portion that should be blown, 3 is a wiring that is not to be blown, 4 is a silicon dioxide insulating film, and L 1 is the thickness of the insulating film 4. Assuming that L 2 is the thickness of the insulating film 4 on the fuse part 2 and L 3 is the thickness of the insulating film 4 on the wiring 3, L 1 = 14500 [Å] L 2 = 5445 [Å] L 3 = 7260 [Å], and the thickness of the fuse portion 2 and the wiring 3 is 4000 [Å]. Note that an error of about ±100 [Å] is allowed for each thickness.

この状態でYAGレーザを照射すると、レー
ザ・ビーム径が大径であつても、ヒユーズ部分2
及び配線3がアルミニウムの場合、ヒユーズ部分
2のエネルギ吸収率は10〔%〕、配線3及びその他
の部分は5〔%〕となつて、その比は倍になるの
でヒユーズ部分2のみ確実に溶断する。若し、ヒ
ユーズ部分2及び配線3が多結晶シリコンである
とすると、ヒユーズ部分2は95〔%〕、その他の部
分は70〔%〕を吸収するものである。
If the YAG laser is irradiated in this state, even if the laser beam diameter is large, the fuse part 2
If the wiring 3 is made of aluminum, the energy absorption rate of the fuse part 2 is 10%, and that of the wiring 3 and other parts is 5%, so the ratio is doubled, so only the fuse part 2 can be fused. do. If the fuse portion 2 and the wiring 3 are made of polycrystalline silicon, the fuse portion 2 absorbs 95% and the other portions absorb 70%.

このようなエネルギ吸収率の差は、勿論、絶縁
膜3の厚さの差に基因する光の干渉効果に依るも
のである。
Such a difference in energy absorption rate is, of course, due to the light interference effect caused by the difference in the thickness of the insulating film 3.

以上の説明で判るように、本発明に依れば、半
導体装置に於ける配線途中に挿入されたヒユーズ
部分を覆う絶縁膜の厚さを反射防止膜の条件であ
る λ/4+m/2λ λ:絶縁物中のレーザ波長 m:正の整数 に基づいて定め、レーザ光の干渉効果を利用して
ヒユーズ部分のエネルギ吸収を他の部分より大と
なし、例え他の部分にもレーザ光が照射されたと
してもヒユーズ部分のみを選択的に溶断すること
ができ、冗長性あるメモリを有する半導体記憶装
置に於ける不良メモリ・セルと正常メモリ・セル
の代替、半導体装置に対する機能の付与などに適
用して有効である。また、本方法は、ヒユーズ
ROMに対して適用できることももちろんであ
る。
As can be seen from the above explanation, according to the present invention, the thickness of the insulating film covering the fuse part inserted in the middle of the wiring in the semiconductor device is the condition for the anti-reflection film: λ/4+m/2λ λ: Laser wavelength m in an insulator: Determined based on a positive integer, the fuse part absorbs more energy than other parts by utilizing the interference effect of the laser light, even if other parts are irradiated with the laser light. Even if only the fuse part can be selectively blown, it can be applied to replacing defective memory cells with normal memory cells in semiconductor storage devices with redundant memory, and adding functions to semiconductor devices. It is valid. In addition, this method
Of course, it can also be applied to ROM.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明実施例を説明する為の半導体装置の
要部断面説明図である。 図に於いて、1は基板、2はヒユーズ部分、3
は配線、4は絶縁膜である。
The figure is an explanatory cross-sectional view of a main part of a semiconductor device for explaining an embodiment of the present invention. In the figure, 1 is the board, 2 is the fuse part, 3
4 is a wiring, and 4 is an insulating film.

Claims (1)

【特許請求の範囲】 1 半導体基板上の絶縁膜上に配線及びその配線
途中のヒユーズ部分を設け、該配線及びヒユーズ
部分を覆う絶縁膜を設けて、該ヒユーズ部分上の
該絶縁膜厚をヒユーズ溶断用レーザ光の該絶縁膜
中での波長λに対し、λ/4+m/2λ(但し、mは正 の整数)とし、他の配線部分上では前記絶縁膜厚
をm/2λとして、レーザ光照射によりヒユーズ部 分のみ溶断し得るようにしたことを特徴とする半
導体装置。 2 半導体基板の絶縁膜上に配線及びその配線途
中のヒユーズ部分を形成し、該ヒユーズ部分上の
み反射防止膜の条件である λ/4+m/2λ λ:絶縁膜中のレーザ光波長 m:正の整数 を満足する厚さとなした絶縁膜を形成し、該絶縁
膜上からレーザ光を照射して所要のヒユーズ部分
を溶断する工程が含まれることを特徴とする半導
体装置の製造方法。
[Scope of Claims] 1. Wiring and a fuse part in the middle of the wiring are provided on an insulating film on a semiconductor substrate, an insulating film is provided to cover the wiring and the fuse part, and the thickness of the insulating film on the fuse part is reduced by the fuse. The wavelength λ of the laser beam for fusing in the insulating film is set to λ/4+m/2λ (where m is a positive integer), and the thickness of the insulating film on other wiring parts is set to m/2λ. A semiconductor device characterized in that only a fuse portion can be blown by irradiation. 2. The wiring and the fuse part in the middle of the wiring are formed on the insulating film of the semiconductor substrate, and the anti-reflection film is applied only on the fuse part. λ/4+m/2λ λ: Laser light wavelength in the insulating film m: Positive 1. A method of manufacturing a semiconductor device, comprising the steps of: forming an insulating film having a thickness that satisfies an integer; and irradiating a laser beam onto the insulating film to blow out a required fuse portion.
JP56122659A 1981-08-05 1981-08-05 Semiconductor device and its manufacture Granted JPS5823475A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56122659A JPS5823475A (en) 1981-08-05 1981-08-05 Semiconductor device and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56122659A JPS5823475A (en) 1981-08-05 1981-08-05 Semiconductor device and its manufacture

Publications (2)

Publication Number Publication Date
JPS5823475A JPS5823475A (en) 1983-02-12
JPH0140500B2 true JPH0140500B2 (en) 1989-08-29

Family

ID=14841447

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56122659A Granted JPS5823475A (en) 1981-08-05 1981-08-05 Semiconductor device and its manufacture

Country Status (1)

Country Link
JP (1) JPS5823475A (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58115687A (en) * 1981-12-28 1983-07-09 Fujitsu Ltd Writing method of read-only memory
US4853758A (en) * 1987-08-12 1989-08-01 American Telephone And Telegraph Company, At&T Bell Laboratories Laser-blown links
US5070392A (en) * 1988-03-18 1991-12-03 Digital Equipment Corporation Integrated circuit having laser-alterable metallization layer
US5521116A (en) * 1995-04-24 1996-05-28 Texas Instruments Incorporated Sidewall formation process for a top lead fuse
US6372522B1 (en) * 1999-10-05 2002-04-16 Vlsi Technology, Inc. Use of optimized film stacks for increasing absorption for laser repair of fuse links
US6306746B1 (en) 1999-12-30 2001-10-23 Koninklijke Philips Electronics Backend process for fuse link opening

Also Published As

Publication number Publication date
JPS5823475A (en) 1983-02-12

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