JPH0150939B2 - - Google Patents

Description

[Detailed Description of the Invention] [Summary] In a computer system that has peripheral devices that can be accessed from a processor, a system reset signal from the processor (by turning on the power, operating a key on a console, etc.) normally resets the entire system. Focusing on the fact that there is an interface line for clearing the system reset signal and an interface line for interrupting the processor from the peripheral device side, it is possible to set the flag bit set by the system reset signal on the peripheral device side. , and an interrupt generation circuit that is activated by the signal, the processor side can access the flag bit in the interrupt processing that is activated by the interrupt signal from the interrupt generation circuit and output the peripheral device. It is designed to recognize the connections between

[Industrial application field]

The present invention relates to a device connection confirmation method for confirming whether a peripheral device is connected to a processor in a computer system having a peripheral device accessible from a processor.

For example, in computer systems such as microprocessor systems, the number of interface signals between peripheral hardware and processors is increasing as computer systems have become more sophisticated and functional.

Specific examples include parallel data bus transmission,
The number of interface lines has increased due to individual transmission of control signal lines or interrupt signal lines.

This increase in the number of interface lines between processors and peripheral devices has disadvantages in terms of noise countermeasures and costs, considering the line length of the transmission path, and there is a risk of reducing the performance of the computer system. .

However, in computer systems, it is common for multiple peripheral devices to be connected to one processor, and when checking the connections of these peripheral devices, it is necessary to It is necessary to confirm without increasing the number of interface lines between the device and peripheral devices.

[Conventional technology]

FIG. 3 is a block diagram showing a typical configuration of a computer system, such as a microprocessor system, in which a peripheral device 2 is connected to a processor 11 in the main device 1 through a data bus 12.

Here, is a system reset signal line from the reset circuit 14 that is activated when the main unit 1 is powered on, etc. When this signal line is energized, the entire computer system is reset. Also, is an interrupt signal line for interrupting the main device 1 from the peripheral device 2.

In a computer system with such a configuration, conventional methods for the main device 1 to check the connection of the peripheral device 2 include (1) the connection from the peripheral device 2 to the main device 1; By providing an instruction line and setting the signal line to logic "0" or logic "1" on the peripheral device 2 side, when the peripheral device 2 is connected to the main device 1, the main device 1 A method of confirming the connection of the peripheral device 2 by having the processor 11 recognize through the data bus 12 that the control register 14 on the side is set to "0" or "1".

(2) After writing specific data to the memory 23 provided on the peripheral device 2 side through the data bus 12 from the processor 11 on the main device 1 side, the read result is compared with the write data. A method of confirming the connection of the peripheral device 2, particularly by:

There is.

[Problem that the invention seeks to solve]

In such conventional device connection confirmation methods, in method (1), it is necessary to provide a dedicated interface line between the peripheral device 2 and the main device 1 for connection confirmation, as described above. Considering noise countermeasures, etc., there is a problem in that the hardware for the interface line increases and the control becomes complicated.

Also, through the data bus 12 in (2), the peripheral device 2
In the method of writing and reading specific data in the internal memory, if the peripheral device 2 is not connected, the data bus line 12 becomes unstable, so there is a risk of malfunction when writing or reading. There was a problem with the increase in hardware such as the addition of pull-up resistors.

In view of the above conventional drawbacks, the present invention focuses on the fact that data exchange functions such as a system reset line, an interrupt line, and a data bus 12 are conventionally provided between the main unit 1 and the peripheral device 2. death,
The purpose of this invention is to provide a method that allows the connection of the peripheral device 2 from the main device 1 to be confirmed without providing a new interface line or adding a pull-up resistor to the data bus 12.

[Means for solving problems]

FIG. 1 is a principle block diagram of the peripheral device confirmation method of the present invention, in which an interrupt is accessed on the main unit 1 side of the computer system by a system reset signal generated when the power is turned on, etc. A circuit 22 and a flag bit 21 are provided on the peripheral device 2 side, and the flag bit 21 is turned "on" by interrupt processing on the main device 1 side activated by an interrupt signal from the peripheral device 2. The configuration is such that the connection of the peripheral device 2 can be confirmed by recognizing that the peripheral device 2 is connected.

[Effect]

That is, according to the present invention, in a computer system having a peripheral device that can be accessed from a processor, a system reset signal (by turning on the power, operating a key on a console, etc.) from the processor is normally used.
By focusing on the fact that there is an interface line for clearing the entire system and an interface line for interrupting the processor from the peripheral device side, it is possible to make the system reset signal on the peripheral device side. By providing a flag bit that is set by the processor and an interrupt generation circuit that is activated by the signal, the processor side can access the flag bit in the interrupt processing that is activated by the interrupt signal from the interrupt generation circuit. This allows the connection of the peripheral device to be recognized, so there is no need to install a new interface line or interrupt request line to confirm the connection of the device, and the system reset function that the computer system is originally equipped with can be used. , the connection of the peripheral device can be confirmed simply by using the interrupt function.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.
FIG. 2 is a block diagram showing one embodiment of the present invention, in which the same reference numerals as in FIGS. 1 and 3 indicate the same objects. Generation circuit 22 and flag bit 21
are the functional blocks necessary to implement the present invention.

First, when a system reset operation is performed on the main unit 1 side of the computer system by turning on the power or operating a specific key on an operation console (not shown), the reset circuit 14 is activated.
By energizing the system reset line,
An initial reset is performed on the main unit 1 and the peripheral device 2.

Thereafter, the processor 11 reads programs and data from the read-only memory (ROM) 13 through the data bus 12 and executes them.
Various data processing is performed.

When the present invention is implemented and the main device 1 confirms the connection of the peripheral device 2, the flag bit 21 is set in the peripheral device 2 that has received the system reset signal from the main device 1, and
After the setup time for the entire computer system has elapsed, the interrupt generation circuit 22 issues an interrupt signal to the main unit 1 through the existing interrupt request line.

The processor 11 executes an interrupt processing routine in response to an interrupt signal from the interrupt request line, reads the contents of the flag bit 21 through the data bus 12, and sets the flag bit 21 to "on". ", the peripheral device 2 is recognized as being connected to the main device 1, and then the flag bit 21 is reset as necessary.

In the above interrupt processing, the flag bit 21 becomes
If it is in the "off" state, it is recognized as a normal interrupt request from the peripheral device 2, and the corresponding interrupt processing is executed.

The system reset and interrupt request lines mentioned above are interface lines that the computer system originally has, and the present invention utilizes the existing interface functions to connect the peripheral device 2.
The feature is that the connection can be confirmed.

〔Effect of the invention〕

As explained above in detail, the device connection confirmation method of the present invention normally uses a system reset signal (power-on, key operation on a console, etc.) from the processor in a computer system that has peripheral devices that can be accessed from the processor. ) by
An interface line that clears the entire system,
Focusing on the fact that there is an interface line for interrupting the processor from the peripheral device side,
By providing the peripheral device with a flag bit that is set by the system reset signal and an interrupt generation circuit that is activated by the signal, the processor side can receive the interrupt signal from the interrupt generation circuit. The flag bits mentioned above are accessed in the interrupt processing started by the CPU, so that the connection of the peripheral device can be recognized. Therefore, it is necessary to provide a new interface line and interrupt request line to confirm the device connection. Instead, the connection of the peripheral device can be confirmed simply by using the system reset and interrupt functions that the computer system is originally provided with.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the principle of the peripheral device confirmation method of the present invention, FIG. 2 is a block diagram of an embodiment of the present invention, and FIG. 3 is a general configuration example of a microprocessor system. This is a diagram. In the drawing, 1 is a main unit, 11 is a processor, 12 is a data bus, 13 is a read-only memory (ROM), 14 is a reset circuit, 15 is a control register, 2 is a peripheral device, 21 is a flag bit,
22 is an interrupt generation circuit, 23 is a memory, 2 is a system reset line, 2 is an interrupt request line, and 2 is an interface line for confirming device connection.

Claims (1)

[Scope of Claims] 1. In a computer system comprising one processor 11 and a plurality of peripheral devices 2 connected through a system reset line, an interrupt line, and a data bus 12 and accessible from the processor, the peripheral devices 2 A flag bit 21 is set when at least the system reset line from the processor 11 is activated, and an interrupt signal for the processor 11 is generated when the system reset line is activated. The processor 11 reads the flag bit 21 of the peripheral device 2 and recognizes the connection of the peripheral device 2 by the interrupt processing activated by the interrupt signal. A device connection confirmation method characterized by: