JPH0154889B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for identifying and separating each system of pulse trains from an input signal in which a plurality of types of pulse trains having mutually different periods coexist.

A radar receiver may receive radar signals emitted from a plurality of different sources, and the signals coming from each source generally have different repetition frequencies. Such a case corresponds to so-called interference, and it is necessary to separate each signal system. However, when pulse trains of multiple systems coexist as described above, there is a high possibility that the time interval between pulses of different systems will be measured if the normal pulse interval measurement method is used. Further, even if the correlation method is used, if each system is to be separated, a considerably complicated circuit is required, and the apparatus becomes large-scale.

Therefore, the present inventor previously proposed, in Japanese Patent Application Laid-open No. 52-19991 (Japanese Patent Publication No. 56-51664), by combining multiple systems of simple pulse period identification circuits, and extracting a pulse train with a period identified by a certain system from an input signal. We have proposed a pulse train period identification circuit that uses the removed signals to perform identification in other systems and sequentially separates the signals of each system. The basic form of this circuit is that each system (hereinafter referred to as a unit) is composed of an input selection circuit, a period identification circuit, and an identified signal removal circuit. Each unit in each system separates and outputs the pulse train whose period has been confirmed by itself, and also selects the period-confirmed pulse train from the input pulse train, that is, a pulse train that is a mixture of pulse trains from multiple systems (hereinafter referred to as mixed signal). Outputs a signal with only the pulse train of the system removed. When this output starts to appear, the other series do not accept the mixed signal, but only the time series in which the pulse train of the above-mentioned one series has been dropped, and from among these, pulse trains of series that have not yet been confirmed are separated. This makes the identification operation highly efficient.

However, when the number of pulse train systems included in a mixed signal is large, pulses in different systems may overlap each other or may be received at extremely short time intervals. In such a case, there is a risk that pulses belonging to both systems will be removed together by the above-described operation of removing the confirmed pulse train. Moreover, if the periods of the pulse trains of the two systems happen to have a simple integer ratio (for example, 2:3), the situation where the pulses of both systems overlap or are very close to each other over several periods can be avoided. As a result, pulse trains whose cycles have not been confirmed are removed together with pulse trains whose cycles have been confirmed over several cycles, which makes it inconvenient to identify the former.

The present invention has been made in view of the above-mentioned points, and it is an object of the present invention to provide a novel pulse train cycle identification method that can prevent unidentified pulse trains from being mistakenly removed after the cycle identification of one system of pulse trains is completed. It is.

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the pulse train period identification method according to the present invention will be described in detail below with reference to the drawings.

Figure 1 is a time chart for explaining the operation, and Figure A shows an example of a received signal with interference.
In this example, two types of pulse trains having different periods coexist. However, for simplicity, each pulse is drawn as a single line. In addition, in order to make it easy to distinguish between the pulse trains of each system, symbols such as . and x are attached to each system.

FIG. 2 shows a system diagram of an embodiment of the circuit used in the identification method according to the present invention, which consists of three sets of units having the same configuration, and each unit is surrounded by a dotted line frame. There is. For convenience, each unit is labeled with and. Further, subtitles 1, 2, and 3 are given to the partial circuits of each unit, respectively. In this figure, A is an input circuit, B is a period identification circuit, C is a pulse train separation circuit, and D is an identified signal removal circuit.
Its operation will be detailed later. Output terminal P _1
.about.P3 is taken out from the pulse train separation circuit C at the subsequent stage of the period identification circuit B in each unit.

Next, regarding the operation of the circuit shown in Fig. 2, the first
This will be explained with reference to the drawings.

The mixed pulse train as an input shown in FIG.
The period identification operation is started sequentially by shifting the phase of each pulse. Then, from the unit that has been able to identify the period of one system of pulse trains, the pulse train of the identified system is removed from the mixed signal, that is, the time series in which the pulse train of the system is missing is output from the identified signal removal circuit. Applied to other units. The operation up to this point is the first cited Japanese Patent Application Publication No. 52
This invention is the same as the invention described in the 19991 publication.

However, in the present invention, a signal indicating that the unit has finished confirming the existence of a certain pulse train system is output at the same time, and this signal is also input to the other units. Hereinafter, the signal indicating the completion of the above-mentioned confirmation will be referred to as a confirmation signal. Using this confirmation signal, the 2
This is to prevent the pulse trains of the system from being mistakenly removed at the same time.

That is, when the input circuit of each unit receives a confirmation signal from the unit to which it belongs, it continues to input the mixed signal to the period identification circuit. On the other hand, if the confirmation signal is issued first from two other units other than the unit to which it belongs, the signal after removing the pulse trains of other systems identified by the other units is used until the confirmation signal is issued from the unit to which it belongs. The signal is input to the cycle identification circuit, and after the identification in the circuit is completed and a confirmation signal for its own unit is output, the identification input is switched to the original mixed signal.

As mentioned above, the pulse train period identification operation of the subsequent circuit that receives the signal from the input circuit is essentially the same as that of the prior invention proposed by the present inventor (Japanese Patent Laid-Open No. 52-19991). The time interval between two adjacent pulses is measured and it is tested whether a third pulse with an interval equal to the measured time interval will arrive next.

That is, FIG. 4 is a block diagram showing one example of the configuration of the identification circuit B included in each unit. If this is assumed to be the identification circuit B ₁ of the first unit, the input terminal 11 initially receives the input mixture of FIG. 1A. A first time measuring circuit 13 is applied with a signal through a buffer circuit 12.
It is also input to the second time measuring circuit 15 through the binary 14. The first time measuring circuit 13 operates to measure the time interval between two pulses using a counting method using clock pulses, and measures the time interval between 1 and 2 between the first pulse and the second pulse adjacent to it. The second time measuring circuit ₁₅ measures the time interval T1, and due to the presence of the binary 14, the second time measuring circuit 15 starts the measuring operation from the time when the second input pulse 2 is input in the circuit shown in the figure. 16 is a matching circuit which outputs a pulse when the elapsed time from the second pulse by the second time measuring circuit 15 matches the measured value _T1 of the first time measuring circuit 13;
Reset the time measurement circuit 15. This coincident pulse output triggers the monostable multivibrator 17 to generate a gate pulse of a predetermined width. The monostable multivibrator 17 is input to an AND circuit 18 together with the input mixed signal passed through the buffer circuit 12, and is logically ANDed. However, in the case shown in the figure, there is no input pulse that matches the gate pulse after _T1 from the second pulse 2, so there is no output from the AND circuit 18, and therefore the reset circuit 19 operates and the first time measurement circuit 13 It will be reset and ready for the next time measurement. On the other hand, the identification circuit B ₂ of the second unit is different from the identification circuit B ₁ of the first unit.
Although it has the same configuration as above, it operates with a one-pulse delay as described above, so the first time measuring circuit first measures the time interval _T2 between the second pulse 2 and the third pulse 3, and then the second time measuring circuit operates with a delay of one pulse. T ₂ from the third pulse
Generate a gate pulse after a period of time. In this case the third
Since the fifth pulse 5 exists at the timing after T2 from pulse ₃ , the output side of the AND circuit 18 is
A pulse train having a period equal to or approximately equal to the time interval T ₂ between the second pulse inputted to the input terminal 11 and the third pulse is output. As a result, the selection identification signal P ₂ of the second unit shown in FIG.
and the confirmation signal shown in FIG. 1G are output. In this way, the discriminating power of the second unit continues to input the input mixed pulse train as is as shown _{in FIG} . The pulse train of period T ₂ is removed and applied to the inputs of the first and third units, as shown by the dotted line in FIG. 2B. The identification circuit _B3 of the third unit measures the time interval _T3 between the third pulse and the fourth pulse and generates a gate pulse of that interval after the fourth pulse 4, but since there is no pulse that coincides with the time _T3 , There is no identification output and the first time measurement circuit is reset.

Then, the first time measuring circuit 1 of the first unit is turned on again.
3 is triggered by the fourth pulse 4, but since the input to the first unit is the pulse train shown in Figure 1B from which the pulse train identified by the second unit has been removed, the measurement time is from the fourth pulse. The period up to the seventh pulse is _T4 , and the pulse 9 with the period _T4 is identified in accordance with the gate pulse that the second time measurement circuit 15 issues after _T4 time has elapsed from the seventh pulse. In this way, the identification selection pulse as shown in FIG. 1C is output from the first unit, and at the same time the first
A confirmation signal as shown in Figure D is output, and the input signal to the identification circuit of the first unit is switched to the original mixed signal (the signal before the identification pulse train of the second unit is removed) as shown in Figure 1B. Malfunctions due to missing pulses are prevented.

When the identified pulse is output from the AND gate 18 of the identification circuit B of each unit by the above identification operation, it is assumed that confirmation has been made and a confirmation signal is output to the lines 24, 25, and 26 in Fig. 2. and add it to the input selection terminal of each unit,
A single-period pulse train selected according to the confirmed system is output to the terminal P, and a gate signal to the removal circuit D is output. The gate signal is usually a pulse slightly wider than each pulse in the mixed signal, and
Used to inhibit input of confirmed pulse trains to other units.

As described above, the circuit system of FIG. 2 sequentially identifies the period of the pulse train, and separates it from the output terminals P ₁ , P ₂ , and P ₃ of the respective pulse train separation circuits C ₁ , C ₂ , and C ₃ . Each single pulse train is output.

In this case, the input circuits of each unit A ₁ , A ₂ , A ₃
In either case, when no confirmation signal is generated from any unit, or when a confirmation signal is output from the unit to which it belongs, the mixed signal is directly sent to the subsequent period identification circuits B ₁ , B ₂ , and B ₃ . send.
However, when a confirmation signal is sent from another unit, the input circuit generates a time series in which the pulse train of the system confirmed by that system is removed from the input mixed signal, except when a confirmation signal is output from the unit to which it belongs. will be sent to the next stage. This allows the cycle identification operation of the unit to which it belongs to be performed smoothly. Also, when the unit to which it belongs issues a confirmation signal and subsequently receives a confirmation signal from another unit, it sends the mixed signal as it is to the subsequent stage, instead of the time series with the confirmed channels removed, and checks the unconfirmed channels. Prevents a pulse train from being removed at the same time as that of a verified system.

FIG. 3 shows an example of the internal configuration of an input circuit, and although the circuit in this figure belongs to a unit, the form of the circuit may of course be the same for all units. In the circuit shown in this figure, there are six input terminals that receive signals from the outside.The input terminal 21 receives the mixed signal, the input terminal 22 receives the signal from the removal circuit of the unit, and the input terminal 23 receives the signal from the removal circuit of the unit. Receive each.
Input terminals 24 to 26 are for receiving confirmation signals, and among these, only input terminal 24 receives confirmation signals from the unit to which it belongs, but the remaining two
Input terminals 25 and 26 receive the unit and the confirmation signal from the unit, respectively.
These six input terminals will hereinafter be referred to as first to sixth input terminals, respectively, in the order of their numbers. For convenience, the logic level "1" is expressed as "H" and "0" as "L", and the waveform of the confirmation symbol is a unit staircase wave.

In FIG. 3, when there is no confirmation signal, the levels of the fourth to sixth input terminals are both "L", and the output levels of the AND circuit 27 and the OR circuit 28 are "H", so the first input terminal 21 The mixed signal input from the NAND circuit 29 and the NAND circuit 30
It is output after passing through.

If the confirmation signal from the second unit is now applied to the fifth input terminal 25, the signal from the removal circuit D2 applied to the second input terminal ₂₂ (the pulse train already confirmed by the second unit is removed from the mixed signal). ) is output through a NAND circuit 32 and a NAND circuit 30.

If the confirmation signal is first output from the unit to which the input circuit of Fig. 3 belongs, the fourth input terminal 24
Since only the NAND circuit 35 is at “H” level,
32 remains unchanged, and the NAND circuit 30 still outputs a mixed signal.

However, when the confirmation signal from another unit, e.g.
This confirmation signal inputted from the input terminal 25 sets the output level of the NOT circuit 31 to "H", and the removal signal inputted from the second input terminal 22 is outputted to the subsequent stage via the NAND circuit 32 and the NAND circuit 30. This operation is achieved by a combination of a NAND circuit 33 and a flip-flop circuit 34. However, if a confirmation signal is output from the unit to which it belongs after the confirmation signal from the above unit, the output level of the OR circuit becomes "H", the output of the NOT circuit 31 becomes "L", and a mixed signal is output again. will be done. Note that the NAND circuits 35 and 36 and the flip-flop circuit 37 play the same role as the NAND circuits 32 and 33 and the flip-flop circuit 34 in the above description, and perform the same operations as described above in response to a confirmation signal from the unit.

In addition, as shown in Figure 1 G and D, if the confirmation signal is output after confirming the existence of the pulse train of the identified period over several cycles instead of outputting the confirmation signal immediately after the completion of the discrimination operation, identification errors can be avoided. The risk can be lowered.

According to the method of the present invention described above, when the periods of pulse trains of different systems happen to have an integer ratio or a relationship close to this, misidentification or omission can be prevented by simply adding an input circuit. This has the advantage of eliminating the risk of Therefore, it is extremely advantageous to apply this method to the case where pulse trains of a single period are individually separated from a signal containing pulse trains of multiple systems.

[Brief explanation of drawings]

1A to 1G are time charts for explaining the waveform of the mixed signal and the identification operation, FIG. 2 is a block diagram showing an example of the circuit used in the method of the present invention, and FIG.
The figure is a circuit connection diagram showing an example of the input circuit in the previous figure.
FIG. 4 is a block diagram showing an example of the structure of the period identification circuit. P ₁ , P ₂ , P ₃ : Single pulse train output terminal, 21:
Mixed signal input terminals, 22 and 23: identified pulse train removal signal input terminals, 24, 25, 26: confirmation signal input terminals.

Claims (1)

[Claims] 1. A period identification circuit that identifies and outputs a pulse train having a specific single period based on a time interval between specific pulses from a mixed input pulse train containing multiple types of pulse trains with different periods; an input circuit that selectively supplies an input pulse train containing a pulse train to be identified; and an input circuit that receives the output of the period identification circuit and outputs a signal obtained by removing the pulse train identified by the period identification circuit from the input pulse train; The period identification circuit of each unit identifies a single-period pulse train that matches the time interval between different specific pulses, based on the time interval between different specific pulses. The input circuit has a terminal for inputting the mixed input pulse train, a plurality of input terminals for inputting the output of the identified signal removal circuit of each identification unit, and an identification signal output of each identification unit. It has a terminal for inputting an identification confirmation signal in response to the presence or absence of the identification signal, and until the identification confirmation signal from its own identification unit is applied, the identified signal of the other system is detected by the identification confirmation signal from the identification unit of the other system. The output of the removal circuit is selected as the input pulse train for the own period identification circuit, and the input pulse train is switched to the input from the input terminal of the mixed input pulse train in response to the identification confirmation signal from the own identification unit. Characteristic pulse train identification method.