JPH0164202U - - Google Patents
Info
- Publication number
- JPH0164202U JPH0164202U JP1987159502U JP15950287U JPH0164202U JP H0164202 U JPH0164202 U JP H0164202U JP 1987159502 U JP1987159502 U JP 1987159502U JP 15950287 U JP15950287 U JP 15950287U JP H0164202 U JPH0164202 U JP H0164202U
- Authority
- JP
- Japan
- Prior art keywords
- dielectric substrate
- semiconductor element
- semiconductor device
- substrate
- microwave
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- Waveguides (AREA)
Description
第１図は本考案装置の１実施例の背面図、第２
図は第１図の―部分の断面図、第３図は同装
置をＭＩＣ基板に装着した状態の部分平面図、第
４図はアドミタンスチヤート図、第５図は従来装
置の断面図、第６図は従来装置をＭＩＣ基板に装
着した状態の部分平面図、第７図は従来の整合作
用を説明するためのアドミタンスチヤート図であ
る。
１……誘電体基板、２……半導体素子、３……
キヤツプ、８，９……リード、１０ａ，１０ｂ，
１０ｃ，１０ｄ，１０ｅ……スタブ。
Figure 1 is a rear view of one embodiment of the device of the present invention;
The figure is a cross-sectional view of the - part in Figure 1, Figure 3 is a partial plan view of the device mounted on the MIC board, Figure 4 is an admittance diagram, Figure 5 is a cross-sectional view of the conventional device, and Figure 6 is a cross-sectional view of the conventional device. The figure is a partial plan view of the conventional device mounted on the MIC board, and FIG. 7 is an admittance diagram for explaining the conventional alignment effect. 1... Dielectric substrate, 2... Semiconductor element, 3...
Cap, 8, 9... Lead, 10a, 10b,
10c, 10d, 10e... stub.
Claims (1)
半導体素子と、該半導体素子を前記誘電体基板と
協同して封止する封止キヤツプとを備えるマイク
ロ波半導体装置において、前記誘電体基板はその
外表面に、前記半導体素子に電気的に接続されて
いる、特性インピーダンスを規定するスタブを有
するリードを配設していることを特徴とするマイ
クロ波半導体装置。 A microwave semiconductor device comprising a dielectric substrate, a semiconductor element disposed on the dielectric substrate, and a sealing cap that seals the semiconductor element in cooperation with the dielectric substrate. 1. A microwave semiconductor device, wherein the substrate is provided with a lead on its outer surface that is electrically connected to the semiconductor element and has a stub that defines a characteristic impedance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987159502U JPH0164202U (en) | 1987-10-19 | 1987-10-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987159502U JPH0164202U (en) | 1987-10-19 | 1987-10-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0164202U true JPH0164202U (en) | 1989-04-25 |
Family
ID=31440771
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987159502U Pending JPH0164202U (en) | 1987-10-19 | 1987-10-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0164202U (en) |
-
1987
- 1987-10-19 JP JP1987159502U patent/JPH0164202U/ja active Pending