JPH0167829U - - Google Patents
Info
- Publication number
- JPH0167829U JPH0167829U JP1987163963U JP16396387U JPH0167829U JP H0167829 U JPH0167829 U JP H0167829U JP 1987163963 U JP1987163963 U JP 1987163963U JP 16396387 U JP16396387 U JP 16396387U JP H0167829 U JPH0167829 U JP H0167829U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- locked loop
- frequency
- phase
- frequency synthesizer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000000630 rising effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Description
第１図はこの考案に係るＰＬＬ周波数シンセサ
イザの実施例を示したループフイルタの回路図、
第２図は従来のループフイルタの回路図、第３図
は従来の基本的なＰＬＬ回路のブロツク図である
。
主な番号、記号の説明、２：電圧制御発振器（
ＶＣＯ）、３：分周器、４：分周比設定制御回路
、５：基準周波数発振器、６：位相比較器、７：
ループフイルタ、１０：周波数制御信号の入力端
子、Ｑ１：アクテイブフイルタ・トランジスタ、
Ｑ２：スイツチング・トランジスタ。
FIG. 1 is a circuit diagram of a loop filter showing an embodiment of the PLL frequency synthesizer according to this invention.
FIG. 2 is a circuit diagram of a conventional loop filter, and FIG. 3 is a block diagram of a basic conventional PLL circuit. Explanation of main numbers and symbols, 2: Voltage controlled oscillator (
VCO), 3: Frequency divider, 4: Division ratio setting control circuit, 5: Reference frequency oscillator, 6: Phase comparator, 7:
Loop filter, 10: Frequency control signal input terminal, Q1 : Active filter transistor,
Q2 : Switching transistor.
Claims (1)
おいて、 周波数を設定するための周波数制御信号の立上
りを検出する微分回路と、その微分回路の出力信
号でオンとなるスイツチング回路とを設けたルー
プフイルタ回路とを備え、フエーズロツクドルー
プ回路のロツクアツプタイムを早くするように構
成したことを特徴とするフエーズロツクドループ
周波数シンセサイザ。[Claim for Utility Model Registration] A phased-locked loop frequency synthesizer is provided with a differentiating circuit that detects the rising edge of a frequency control signal for setting the frequency, and a switching circuit that is turned on by the output signal of the differentiating circuit. 1. A phase-locked loop frequency synthesizer comprising a loop filter circuit and configured to speed up the lock-up time of the phase-locked loop circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987163963U JPH0167829U (en) | 1987-10-27 | 1987-10-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987163963U JPH0167829U (en) | 1987-10-27 | 1987-10-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0167829U true JPH0167829U (en) | 1989-05-01 |
Family
ID=31449153
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987163963U Pending JPH0167829U (en) | 1987-10-27 | 1987-10-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0167829U (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5843043B2 (en) * | 1977-12-02 | 1983-09-24 | 井関農機株式会社 | Automatic tillage depth adjustment device |
| JPS602683U (en) * | 1983-06-17 | 1985-01-10 | 日東電工株式会社 | Packing structure for roll-shaped items |
| JPS62188427A (en) * | 1986-02-13 | 1987-08-18 | Yokogawa Electric Corp | Signal generation circuit |
-
1987
- 1987-10-27 JP JP1987163963U patent/JPH0167829U/ja active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5843043B2 (en) * | 1977-12-02 | 1983-09-24 | 井関農機株式会社 | Automatic tillage depth adjustment device |
| JPS602683U (en) * | 1983-06-17 | 1985-01-10 | 日東電工株式会社 | Packing structure for roll-shaped items |
| JPS62188427A (en) * | 1986-02-13 | 1987-08-18 | Yokogawa Electric Corp | Signal generation circuit |
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