JPH0179101U - - Google Patents
Info
- Publication number
- JPH0179101U JPH0179101U JP1987174421U JP17442187U JPH0179101U JP H0179101 U JPH0179101 U JP H0179101U JP 1987174421 U JP1987174421 U JP 1987174421U JP 17442187 U JP17442187 U JP 17442187U JP H0179101 U JPH0179101 U JP H0179101U
- Authority
- JP
- Japan
- Prior art keywords
- relay
- signal
- fail
- contacts
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005856 abnormality Effects 0.000 claims 6
- 238000001514 detection method Methods 0.000 claims 3
- 230000002950 deficient Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Steering-Linkage Mechanisms And Four-Wheel Steering (AREA)
- Safety Devices In Control Systems (AREA)
Description
第1図は本考案に係わるフエールセーフ回路の
一実施例を示す回路図、第2図はリレー等の自己
チエツク動作を説明するためのフローチヤート、
第3図は本考案の第2の実施例を示す回路図であ
る。
1……信号制御部、2……電力制御部、3……
モータ、F1……ヒユーズ、T1,T2……端子
、RL1……リレー、Q1〜Q4,Q10〜Q1
3……トランジスタ、IC1……マイクロコンピ
ユータ、IC2……ウオツチドツグタイマ、IC
3……ワンシヨツトマルチ、CP1,CP2……
コンパレータ、D1,D2……ダイオード、ZD
1……ツエナーダイオード、R1〜R21,R3
0,R31……抵抗、C1〜C4……コンデンサ
。
FIG. 1 is a circuit diagram showing an embodiment of a fail-safe circuit according to the present invention, and FIG. 2 is a flowchart for explaining self-check operation of relays, etc.
FIG. 3 is a circuit diagram showing a second embodiment of the present invention. 1...Signal control section, 2...Power control section, 3...
Motor, F1...Fuse, T1, T2...Terminal, RL1...Relay, Q1~Q4, Q10~Q1
3...Transistor, IC1...Microcomputer, IC2...Watchdog timer, IC
3...One shot multi, CP1, CP2...
Comparator, D1, D2...diode, ZD
1... Zener diode, R1 to R21, R3
0, R31...Resistor, C1-C4...Capacitor.
Claims (1)
電力制御部とから成る後輪転舵装置を制御する信
号制御部のフエールセーフ回路において、ウオツ
チドツグタイマからのリセツト信号を入力すると
共に所定信号を入力し前記リセツト信号によりリ
レーを開にすると共に前記所定信号が異常を示す
場合は前記リレーの接点を開とするマイクロコン
ピユータと、所定数の前記リセツト信号により第
1の異常信号を出力する第1の異常検知回路と、
前記所定信号により第2の異常信号を出力する第
2の異常検知回路と、第1および第2の異常検知
回路からの出力レベルを保持する保持回路とを備
え、前記マイクロコンピユータは運転開始時又は
所定時間毎に自己チエツクを行なうと共に、ポー
ト障害が発生した場合に代替ポートにより前記リ
レーの接点を開とすることを特徴とするフエール
セーフ回路。 (2) 所定信号はリレーのコイルを流れる電流が
過大であることを示す信号であることを特徴とす
る実用新案登録請求の範囲第1項記載のフエール
セーフ回路。 (3) 所定信号はリレーの接点を流れる電流が過
大であることを示す信号であることを特徴とする
実用新案登録請求の範囲第1項記載のフエールセ
ーフ回路。 (4) 自己チエツクは、トランジスタの短絡、リ
レーの接点固着またはリレーコイル下流の接地、
リレーコイルの短絡、リレーコイルの開放、リレ
ーの接点不良のチエツクであることを特徴とする
実用新案登録請求の範囲第1項記載のフエールセ
ーフ回路。[Scope of Claim for Utility Model Registration] (1) In a fail-safe circuit of a signal control unit that controls a rear wheel steering device consisting of a power relay, a motor, and a power control unit that drives the motor, a reset from a watchdog timer is provided. a microcomputer that inputs a signal and a predetermined signal, opens the relay in response to the reset signal, and opens the contacts of the relay when the predetermined signal indicates an abnormality; a first abnormality detection circuit that outputs an abnormality signal;
The microcomputer includes a second abnormality detection circuit that outputs a second abnormality signal in response to the predetermined signal, and a holding circuit that holds the output levels from the first and second abnormality detection circuits, and the microcomputer A fail-safe circuit characterized in that it performs a self-check at predetermined time intervals and opens the contacts of the relay by means of an alternative port in the event of a port failure. (2) The fail-safe circuit according to claim 1, wherein the predetermined signal is a signal indicating that the current flowing through the coil of the relay is excessive. (3) The fail-safe circuit according to claim 1, wherein the predetermined signal is a signal indicating that the current flowing through the contacts of the relay is excessive. (4) Self-check for shorted transistors, stuck relay contacts, or grounding downstream of the relay coil.
The fail-safe circuit according to claim 1, which is a utility model registration, characterized in that it checks for a short circuit in a relay coil, an open circuit in a relay coil, and a defective contact in a relay.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987174421U JPH0179101U (en) | 1987-11-17 | 1987-11-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987174421U JPH0179101U (en) | 1987-11-17 | 1987-11-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0179101U true JPH0179101U (en) | 1989-05-26 |
Family
ID=31466277
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987174421U Pending JPH0179101U (en) | 1987-11-17 | 1987-11-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0179101U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5624601A (en) * | 1979-08-03 | 1981-03-09 | Toshiba Corp | Error control output preventing device of control device |
| JPS5632201B2 (en) * | 1973-12-26 | 1981-07-27 |
-
1987
- 1987-11-17 JP JP1987174421U patent/JPH0179101U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5632201B2 (en) * | 1973-12-26 | 1981-07-27 | ||
| JPS5624601A (en) * | 1979-08-03 | 1981-03-09 | Toshiba Corp | Error control output preventing device of control device |
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