JPH0187552U - - Google Patents

Info

Publication number
JPH0187552U
JPH0187552U JP1987183042U JP18304287U JPH0187552U JP H0187552 U JPH0187552 U JP H0187552U JP 1987183042 U JP1987183042 U JP 1987183042U JP 18304287 U JP18304287 U JP 18304287U JP H0187552 U JPH0187552 U JP H0187552U
Authority
JP
Japan
Prior art keywords
semiconductor element
fin
fins
cooling structure
heat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1987183042U
Other languages
English (en)
Other versions
JPH0525244Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987183042U priority Critical patent/JPH0525244Y2/ja
Publication of JPH0187552U publication Critical patent/JPH0187552U/ja
Application granted granted Critical
Publication of JPH0525244Y2 publication Critical patent/JPH0525244Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】
第1図は本考案の原理説明図、第2図は本考案
による一実施例の説明図で、aは正面図、bは側
面図、第3図は従来の説明図で、aは正面図、b
は側面図を示す。 図において、1は半導体素子、2はプリント基
板、3はリード端子、4は放熱片、5は絶縁部材
、6はフインを示す。

Claims (1)

  1. 【実用新案登録請求の範囲】 リード端子3がプリント基板2に固着される半
    導体素子1と、該半導体素子1に係止されるフイ
    ン6とを備え、該半導体素子1の発熱が該フイン
    6によつて放熱されるように形成される冷却構造
    において、 前記リード端子3に所定箇所が当接さる複数の
    放熱片4と、該放熱片4のそれぞれを櫛状に連結
    する絶縁部材5とによつて前記フイン6を構成す
    ることを特徴とする冷却構造。
JP1987183042U 1987-12-01 1987-12-01 Expired - Lifetime JPH0525244Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987183042U JPH0525244Y2 (ja) 1987-12-01 1987-12-01

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987183042U JPH0525244Y2 (ja) 1987-12-01 1987-12-01

Publications (2)

Publication Number Publication Date
JPH0187552U true JPH0187552U (ja) 1989-06-09
JPH0525244Y2 JPH0525244Y2 (ja) 1993-06-25

Family

ID=31474475

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987183042U Expired - Lifetime JPH0525244Y2 (ja) 1987-12-01 1987-12-01

Country Status (1)

Country Link
JP (1) JPH0525244Y2 (ja)

Also Published As

Publication number Publication date
JPH0525244Y2 (ja) 1993-06-25

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