JPH0188511U - - Google Patents

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Publication number
JPH0188511U
JPH0188511U JP18442987U JP18442987U JPH0188511U JP H0188511 U JPH0188511 U JP H0188511U JP 18442987 U JP18442987 U JP 18442987U JP 18442987 U JP18442987 U JP 18442987U JP H0188511 U JPH0188511 U JP H0188511U
Authority
JP
Japan
Prior art keywords
circuit
frequency
amplifier circuit
series
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18442987U
Other languages
Japanese (ja)
Other versions
JPH0326664Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987184429U priority Critical patent/JPH0326664Y2/ja
Publication of JPH0188511U publication Critical patent/JPH0188511U/ja
Application granted granted Critical
Publication of JPH0326664Y2 publication Critical patent/JPH0326664Y2/ja
Expired legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の実施例を示す回路図、第2図
a〜fはそれぞれ第1図における各要素の入出力
波形を示す波形図、第3図は従来の倍周器を示す
回路図、第4図aは第3図の倍周器の入力信号の
波形の一例を示す波形図、第4図bは第3図の倍
周器の出力波形の一例を示す波形図である。 5…入力減衰回路、6…帯域ろ波器、7…全波
整流倍周回路、8…移相回路、9…シユミツト回
路、10…セレクトアンプ回路、11…リレード
ライブアンプ回路、12…直流定電圧電源。
Fig. 1 is a circuit diagram showing an embodiment of the present invention, Figs. 2 a to f are waveform diagrams showing input and output waveforms of each element in Fig. 1, and Fig. 3 is a circuit diagram showing a conventional frequency doubler. , FIG. 4a is a waveform diagram showing an example of the waveform of the input signal of the frequency multiplier of FIG. 3, and FIG. 4b is a waveform diagram showing an example of the output waveform of the frequency multiplier of FIG. 3. 5...Input attenuation circuit, 6...Band filter, 7...Full wave rectifier frequency doubler circuit, 8...Phase shift circuit, 9...Schmitt circuit, 10...Select amplifier circuit, 11...Relay drive amplifier circuit, 12...DC constant voltage power supply.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力減衰回路に、妨害波を除去する帯域ろ波器
、上記帯域ろ波器からの出力を受け、それを入力
周波数に同期した2倍の周波数に変換する全波整
流倍周回路、ついで移相回路を直列接続し、上記
移相回路の出力側に入力周波数の振幅を所定のご
とく規制するシユミツト回路、入力信号波を選択
し、波形を整形するセレクトアンプ回路、ついで
リレードライブアンプ回路を直列接続し、上記シ
ユミツト回路、セレクトアンプ回路およびリレー
ドライブアンプ回路の直列回路に直流定電圧電源
を接続したことからなる電子式倍周器。
The input attenuation circuit includes a bandpass filter that removes interference waves, a full-wave rectifier frequency doubler circuit that receives the output from the bandpass filter and converts it into a double frequency synchronized with the input frequency, and then a phase shifter. The circuits are connected in series, and a Schmitts circuit that regulates the amplitude of the input frequency as specified on the output side of the above phase shift circuit, a select amplifier circuit that selects the input signal wave and shapes the waveform, and then a relay drive amplifier circuit are connected in series. An electronic frequency multiplier comprising a DC constant voltage power supply connected to a series circuit of the Schmitt circuit, the select amplifier circuit, and the relay drive amplifier circuit.
JP1987184429U 1987-12-04 1987-12-04 Expired JPH0326664Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987184429U JPH0326664Y2 (en) 1987-12-04 1987-12-04

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987184429U JPH0326664Y2 (en) 1987-12-04 1987-12-04

Publications (2)

Publication Number Publication Date
JPH0188511U true JPH0188511U (en) 1989-06-12
JPH0326664Y2 JPH0326664Y2 (en) 1991-06-10

Family

ID=31475796

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987184429U Expired JPH0326664Y2 (en) 1987-12-04 1987-12-04

Country Status (1)

Country Link
JP (1) JPH0326664Y2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59157320U (en) * 1983-04-07 1984-10-22 株式会社京三製作所 doubler

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59157320U (en) * 1983-04-07 1984-10-22 株式会社京三製作所 doubler

Also Published As

Publication number Publication date
JPH0326664Y2 (en) 1991-06-10

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