JPH0188528U - - Google Patents
Info
- Publication number
- JPH0188528U JPH0188528U JP18465387U JP18465387U JPH0188528U JP H0188528 U JPH0188528 U JP H0188528U JP 18465387 U JP18465387 U JP 18465387U JP 18465387 U JP18465387 U JP 18465387U JP H0188528 U JPH0188528 U JP H0188528U
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- circuit
- discharge
- light
- driven
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 4
- 230000003071 parasitic effect Effects 0.000 claims description 4
- 230000003287 optical effect Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
Landscapes
- Electronic Switches (AREA)
Description
第１図は本考案にかかる半導体リレーの一実施
例の構成図、第２図は第１図のリレーの動作説明
図、第３図および第４図は本考案にかかる半導体
リレーの他の実施例の構成図、第５図は従来にお
ける半導体リレーの構成例を示した図である。
ＬＤ…発光ダイオード、ＰＤ…フオトダイオー
ド、Ｒ１…放電用抵抗、Ｒ２…抵抗、Ｄ…ダイオ
ード、Ｑ１，Ｑ２…ＭＯＳ ＦＥＴ、Ｑ３…デイ
プレツシヨン型ＭＯＳ ＦＥＴ、ＣＧＳ…寄生キ
ヤパシタ。
FIG. 1 is a block diagram of one embodiment of the semiconductor relay according to the present invention, FIG. 2 is an explanatory diagram of the operation of the relay in FIG. 1, and FIGS. 3 and 4 are other embodiments of the semiconductor relay according to the present invention. FIG. 5 is a diagram showing an example of the configuration of a conventional semiconductor relay. LD...light emitting diode, PD...photodiode, R1...discharge resistor, R2...resistance, D...diode, Q1, Q2...MOS FET, Q3...depression type MOS FET, CGS...parasitic capacitor.
Claims (1)
に応じた電圧信号を出力する受光素子を対向配置
させた電圧出力型光アイソレータと、 前記受光素子に並列に接続された放電用抵抗と
、 前記受光素子と放電用抵抗の並列回路と直列に
接続されていて、抵抗と後述する寄生キヤパシタ
の放電電流の方向を順方向とするダイオードの並
列回路が等価回路になる放電回路と、 ソースどうしとゲートどうしが接続されていて
、ドレインが接続端子になつた２個のＭＯＳ Ｆ
ＥＴであつて、前記発光素子が駆動されていると
きは、ゲート・ソース間の寄生キヤパシタが前記
放電回路の抵抗の抵抗値に基づく時定数で充電さ
れてオンになり、発光素子が駆動されていないと
きは、ゲート・ソース間の寄生キヤパシタは前記
放電用抵抗の抵抗値に基づく時定数で放電されて
オフになるＭＯＳ ＦＥＴ、 を具備した半導体リレー。[Claims for Utility Model Registration] A voltage output type optical isolator in which a light receiving element that outputs a voltage signal according to incident light is arranged opposite to a light emitting element driven by a selection signal, and the voltage output type optical isolator is connected in parallel to the light receiving element. A discharge resistor is connected in series with the parallel circuit of the light-receiving element and the discharge resistor, and the parallel circuit of the resistor and a diode whose forward direction is the discharge current direction of the parasitic capacitor (described later) constitutes an equivalent circuit. A circuit, two MOS Fs whose sources and gates are connected, and whose drains are the connection terminals.
In the ET, when the light emitting element is being driven, the parasitic capacitor between the gate and source is charged and turned on with a time constant based on the resistance value of the resistor of the discharge circuit, and the light emitting element is being driven. When the parasitic capacitor between the gate and the source is not present, the MOS FET is turned off by being discharged with a time constant based on the resistance value of the discharge resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18465387U JPH0188528U (en) | 1987-12-03 | 1987-12-03 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18465387U JPH0188528U (en) | 1987-12-03 | 1987-12-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0188528U true JPH0188528U (en) | 1989-06-12 |
Family
ID=31475996
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18465387U Pending JPH0188528U (en) | 1987-12-03 | 1987-12-03 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0188528U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04227114A (en) * | 1990-10-03 | 1992-08-17 | Internatl Business Mach Corp <Ibm> | Self-bias timing circuit |
| JPH05315925A (en) * | 1992-05-08 | 1993-11-26 | Matsushita Electric Works Ltd | Semiconductor relay |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57107633A (en) * | 1980-09-12 | 1982-07-05 | Setaajiei Corp | Solid state switching device |
| JPS6126328B2 (en) * | 1983-03-14 | 1986-06-20 | Sooi Kk |
-
1987
- 1987-12-03 JP JP18465387U patent/JPH0188528U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57107633A (en) * | 1980-09-12 | 1982-07-05 | Setaajiei Corp | Solid state switching device |
| JPS6126328B2 (en) * | 1983-03-14 | 1986-06-20 | Sooi Kk |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04227114A (en) * | 1990-10-03 | 1992-08-17 | Internatl Business Mach Corp <Ibm> | Self-bias timing circuit |
| JPH05315925A (en) * | 1992-05-08 | 1993-11-26 | Matsushita Electric Works Ltd | Semiconductor relay |
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