JPH0197005A - Signal level control circuit - Google Patents

Abstract

PURPOSE:To vary the signal level to zero level by generating a nonlinear control current to make the change in the dynamic range increased/decreased by a prescribed quantity asymmetric with respect to a prescribed reference dynamic range and providing a nonlinear control current generating means supplying a nonlinear control current as a control current input of a current controlled D/A converter circuit. CONSTITUTION:A video signal level is set by a variable resistor 12. That is, in varying the variable resistor 12, a voltage at a connecting point between resistors 18, 19 is varied. In varying the voltage at a connecting point between the resistors 18, 19, an output voltage of an operational amplifier 8 is varied accordingly and an output level control current Iset flowing to a current set terminal 2 of a D/A converter 1 is varied. Thus, the dynamic range of the D/A converter 1 is varied to vary the video level. The change in the video level of the variable resistor 12 with respect to the variable quantity is nonlinear as shown in figure. That is, the output voltage is varied in the range of, e.g., +5V--5V by the variable resistor 12.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a signal level control circuit used, for example, when performing fade-in/fade-out processing.

[Summary of the invention]

This invention provides a signal level control circuit used when performing fade-in/fade-out processing, for example.
A current control type D/A conversion circuit that sets the dynamic range of /A conversion by current control, and a control signal for increasing or decreasing the dynamic range by a predetermined amount with respect to a predetermined reference dynamic range of the current control type D/A conversion circuit. A dynamic range control signal generating means generates a nonlinear control current to make a change in the dynamic range that increases or decreases by a predetermined amount asymmetrical with respect to a predetermined reference dynamic range in accordance with the dynamic range control signal, and By including nonlinear control current generation means for supplying a control current to the control current input of the current control type D/A conversion circuit, the output level can be set to O and fade-in/fade-out processing can be performed. .

[Conventional technology]

As when producing a news program, there are cases in which a news interview is conducted using a VTR, and the interview tape is edited in a short period of time and the user wants to broadcast it. In such cases, advanced editing is not required and there is no time to edit using a dedicated editing device, so editing is usually done using the simple editing function provided on the VTR. .

When editing a video, there are times when you want to perform fade-in/fade-out processing. In order to perform fade-in/fade-out processing, it is necessary to be able to continuously vary the video level down to 0 level. In conventional VTRs, the D/A converter, which constitutes the TBC (time base collector), has a variable resistance for setting the reference voltage installed in the temperature characteristic compensation loop of the D/A converter.
The output level control current of the /A converter is varied to change the video level. This conventional VT
The variable range of video level that can be set with R is, for example, ±3.
It is dB. Therefore, fade-in/fade-out processing cannot be performed by operating this variable resistor. This will be explained in detail below.

FIG. 3 shows an example of a TBC circuit used in such a VTR. In FIG. 3, input terminal 101 is supplied with a reproduced video signal. This reproduced video signal contains time axis fluctuation components caused by uneven rotation of the head, expansion and contraction of the tape, and the like. A reproduced video signal from an input terminal 101 is supplied to an A/D converter 103 via a low-pass filter 102, and a burst signal from this reproduced video signal is extracted by a burst signal extraction circuit 104 and supplied to a clock generation circuit 105. be done. The clock generation circuit 105 generates a signal with a frequency of 4, for example, from this burst signal.
A sampling clock CKI of fsc (fsc: color subcarrier frequency) is formed. This sampling clock CKI is supplied to the A/D converter 103,
A reproduced video signal from input terminal 101 is digitized using sampling clock CKI.

The output of A/D converter 103 is supplied to memory 106. The sampling clock CKI from the clock generation circuit 105 is applied to the memory 106 as a write clock. As a result, the output of the A/D converter 103 is written into the memory 106 using the write clock from the clock generation circuit 105.

The clock generation circuit 107 has a clock input terminal 108.
A reference clock is supplied from Based on this reference clock, the clock generation circuit 107 generates a frequency of 4fsc, for example.
A read clock CK2 is generated. This read clock CK2 does not include a time axis fluctuation component.

A read clock CK2 from a clock generation circuit 107 is applied to the memory 106, and the digital video signal stored in the memory 106 is read out using the read clock CK2.

The digital video signal read from memory 106 is supplied to D/A converter 109 and converted back into an analog video signal. This analog video signal is taken out from an output terminal 111 via a low-pass filter 110.

Since the readout and lock CK2 output from the clock generation circuit 107 does not include a time axis fluctuation component,
From the output terminal 111, a video signal without time axis fluctuation components can be obtained.

As the D/A converter 109, a current control type D/A converter is used. This D/A converter 10
In order to compensate for the temperature characteristics of 9, a control circuit as shown in FIG. 4 is provided.

A variable resistor 121 in this control circuit is operated as a video level variable volume. By moving this variable resistor 121, the video level can be adjusted to ±
It can be varied by about 3dB.

That is, the digital video signal read out from the memory 106 in FIG. 3 is transmitted to the input terminal 120 in FIG.
The current control type D/A converter 109 is supplied from the current control type D/A converter 109.

The D/A converter 109 outputs an analog video signal corresponding to this digital video signal. This analog video signal is taken out from an output terminal 123 via an output circuit 122 consisting of an emitter follower transistor, and is also supplied to a sample and hold circuit 124. The output from output terminal 123 is sent to low pass filter 110 in FIG.

The sample and hold circuit 124 connects the D/A converter 10
The pedestal level in the video signal output from 9 is sampled and held.

The output terminal of the sample and hold circuit 124 is connected to the inverting input terminal of an operational amplifier 126 via a resistor 125.

A feedback resistor 127 and an integrating capacitor 12 are connected between the inverting input terminal of the operational amplifier 126 and its output terminal.
8 is connected. Further, a preset circuit 129 is provided at the inverting input terminal of the operational amplifier 126.

Both ends of the variable resistor 121 are connected to a positive power supply terminal 131 and a negative power supply terminal 132. The slider of the variable resistor 121 is the resistor 130. It is connected to one end of a resistor 134 via a resistor 133. A connection point between resistor 133 and resistor 134 is connected to a non-inverting input terminal of operational amplifier 126. The other end of resistor 134 is grounded.

The output terminal of the operational amplifier 126 is connected to the D/
It is connected to the current set terminal 137 of the A converter 109 and to one end of the resistor 136. resistance 136
The other end of is grounded.

A feedback resistor 127 and an integrating capacitor 1 are connected between the inverting input terminal of the operational amplifier 126 and its output terminal.
28 are connected. Therefore, the voltage at the inverting input terminal of operational amplifier 126 becomes equal to the voltage at the connection point between resistor 133 and resistor 134. Therefore, a current flows through the resistor 125 in accordance with the potential difference between the pedestal level sampled and held by the sample and hold circuit 124 and the voltage at the connection point between the resistors 133 and 134.

A current is caused to flow through the resistor 127 and capacitor 128 in accordance with this current. As a result, 'D/A converter 10
If the output of operational amplifier 9 fluctuates due to temperature characteristics, operational amplifier 1
From the output terminal of 26, a sample and hold circuit 124 is output using the voltage at the connection point of resistor 133 and resistor 134 as a reference value.
An output voltage that changes according to fluctuations in the pedestal level that is sampled and held at is obtained.

When the output voltage of the operational amplifier 126 changes in response to changes in the pedestal level, the current 1+2 flowing through the resistor 135 changes. Current set terminal 1 of D/A converter 109
The output level control current I t+et+ flowing through the current 1. t and the current r++ flowing through resistor 136. The dynamic range of the D/A converter 109 is set by the output level control current 11sLI applied to the current set terminal 137. Therefore, when the output voltage of the operational amplifier 126 changes in accordance with the fluctuation of the pedestal level and the currents 1 and 2 fluctuate, the D/A converter 1
Output level control current I flowing into current set terminal 137 of 09. □ changes accordingly. When the output level control current 11jul changes, the dynamic range of the D/A converter 109 is varied accordingly, and the pedestal level of the video signal output from the D/A converter 109 is maintained at a constant value.

The video signal level can be set by variable resistor 121. That is, when the variable resistor 121 is moved here, the voltage at the connection point between the resistor 133 and the resistor 134 is varied, and the output voltage of the operational amplifier 126 is varied. For this reason, D/
Output level control current I mau+ flowing to current set terminal 137 of A converter 109 is varied. Therefore, by moving the variable resistor 121, the video level can be varied as shown in FIG. That is, the output voltage of this variable resistor 121 is set to, for example, (-5V to +
5V), the video level will change to (-3dB) for example.
~ +3 dB).

[Problem that the invention seeks to solve]

By operating this variable resistor 121, the video level cannot be varied down to 0, so fade-in/fade-out processing cannot be performed. In order to perform fade-in/fade-out processing by operating the variable resistor 121, it is conceivable to lower the minimum value of the video level that can be set by the variable resistor 121. The minimum value of the video level that can be set by this variable resistor 121 can theoretically be lowered until the video level reaches zero. In other words, the output level control current 1 s*tt flowing through the current set terminal 137 of the D/A converter 109 is the current flowing through the resistor 136!
8. and the current t+z flowing through the resistor 135.

Therefore, if the value of each resistor is selected so that when the variable resistor 121 is set to the minimum value, the following relationship is established: -1Iffi
When the variable resistor 121 is set to the minimum value, the output level control current 1 maul becomes 0, and the video level can be varied up to 0.

By the way, if you do this, 1. It is necessary to widen the variable range of the video level so that it can be set from the normal output level to the output level 0 state using the variable resistor 121. Since the video level changes linearly in response to changes in the setting value of the variable resistor 121, in order to widen the variable range of the video level, increase the sensitivity and change the output of the variable resistor 121, as shown in FIG. You want to make sure that a small change in voltage causes a large change in video level.

However, if the sensitivity is increased too much, the video level will change significantly even if the variable resistor 121 is moved slightly, causing a problem that it will be difficult to adjust the sensitivity during normal use.

Therefore, it is conceivable to perform fade-in/fade-out processing using digital processing, as is often the case with dedicated editing devices. However, in order to do this, significant circuit changes are required, which also increases costs.

Furthermore, as shown in FIG. 7, it is conceivable that the video signal from the input terminal 140 is switched by a switch circuit 141 to perform fade-in/fade-out processing. Regarding this, for example, JP-A-53-14
No. 4,623 and US Pat. No. 3,530,234. In other words, the switch circuit 141 has
A switch control clock is supplied from a clock generation circuit 142. The duty ratio of this switch control clock is varied by a control signal supplied to the control signal input terminal 143. The switch circuit 141 is rendered conductive only while this switch control clock is at a high level, for example. A video signal passed through the switch circuit 141 is taken out from an output terminal 145 via a low-pass filter 144.

Assume that a video signal as shown in FIG. 8A is supplied to the input terminal 140, and a switching control clock as shown in FIG. 8B is applied from the clock generation circuit 142. At this time, the switch circuit 141 outputs a signal as shown in FIG. 8C.

This signal is cut off from high frequencies caused by switching by a low-pass filter 144, and is output from an output terminal 145. A fade-in effect can be obtained by gradually increasing the pulse width of the switching control clock, and a fade-out effect can be obtained by gradually decreasing the pulse width of the switching control clock.

However, according to the sampling theorem, when switching the video signal in this manner, it is necessary to use a switching control clock with a frequency that is more than twice the band of the video signal. For this purpose, it is necessary to use a switch circuit 141 that can operate at high speed. Therefore, if the video signal is switched in this way to perform fade-in/fade-out processing, the cost will increase.

Furthermore, as the easiest way to control video levels,
As shown in FIG. 9, it is conceivable to configure an attenuator with FETs 151 and 152, for example. Input terminal 1
The video signal from 50 is attenuated with this attenuator. The resistance value of FET 152 is changed by a control signal from input terminal 153. As a result, the input terminal 150
The video signal from the FET 152 is attenuated according to the setting value of the FET 152 and taken out from the output terminal 154.

However, in this case, due to temperature characteristics, F
There is a problem that the characteristics of ET151 and 152 change.

Therefore, an object of the present invention is to provide a signal level control circuit that can vary the signal level up to O level without making any major circuit changes.

Another object of the present invention is to provide a signal level control circuit whose operability is improved by nonlinearly controlling the output level.

Still another object of the present invention is to provide a signal level control circuit that has good characteristics and does not require a significant increase in cost.

[Means for solving problems]

The present invention provides a current control type D/A conversion circuit that sets the dynamic range of D/A conversion by current control, and a current control type D/A conversion circuit that increases or decreases the dynamic range by a predetermined amount with respect to a predetermined reference dynamic range of the current control type D/A conversion circuit. dynamic range control signal generation means for generating a control signal for the dynamic range control signal; This is a signal level control circuit characterized by comprising: nonlinear control current generating means for generating a nonlinear control current and supplying the nonlinear control current to a control current input of a current control type D/A conversion circuit.

[Effect]

When the variable resistor 12 is gradually reduced from the maximum value, when the output voltage of the variable resistor 12 is lowered to a predetermined level,
Diode 16. Diode 19 turns on, the output level of operational amplifier 8 drops rapidly, and diode 2
2 is turned on, and the output level control current 13. , decreases rapidly, and the output video level decreases rapidly. Then, when the output voltage of the variable resistor 12 is changed to the minimum value (-5V), the output level control current □ is decreased until it reaches 0, and the video and audio signal levels are rapidly reduced until they reach 0. It will be done. Therefore, by operating the variable resistor 22, fade-in/fade-out processing can be performed.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention.

A level control circuit to which the present invention is applied is a TB of a VTR.
It is provided in the temperature characteristic compensation loop of the D/A converter of the C circuit.

In FIG. 1, the D/A converter 1 has an input terminal 3.
A digital video signal read from the memory constituting the TBC is supplied from the TBC. As this D/A converter 1, a current control type D/A converter is used. D
/A converter 1 is provided with a current set terminal 2, and the current flowing through this current set terminal 2 causes D
The dynamic range of the /A converter 1 can be varied.

The D/A converter 1 converts the digital video signal from the input terminal 3 back into an analog video signal.

An analog video signal output from this D/A converter 1 is taken out from an output terminal 5 via an output circuit 4 made of an emitter follower transistor, and is also supplied to a sample hold circuit 6. A sample and hold circuit 6 samples and holds the level of the video signal output from the D/A converter 1.

The output terminal of the sample and hold circuit 6 is connected to the inverting input terminal of an operational amplifier 8 via a resistor 7.

Between the inverting input terminal of the operational amplifier 8 and its output terminal,
A feedback resistor 9 and an integrating capacitor 10 are connected. Further, a preset circuit 11 is provided at the inverting input terminal of the operational amplifier 8.

Both ends of the variable resistor 12 are connected to a positive power terminal 13 and a negative power terminal 14. A diode 16 and a resistor 17 are connected in series, and the series connection of the diode 16 and resistor 17 is connected in parallel with the resistor 15. Further, a resistor 18 and a diode 19 are connected in parallel. The slider of variable resistor 12 is connected to the connection point between one end of resistor 15 and the cathode of diode 16, and the connection point between the other end of resistor 15 and one end of resistor 17 is connected to one end of resistor 18 and the cathode of diode 19. connected to the connection point. A connection point between the other end of the resistor 18 and the anode of the diode 19 is connected to a non-inverting input terminal of the operational amplifier 8 and also to one end of the resistor 20 . The other end of the resistor 20 is grounded.

A diode 22 and a resistor 23 are connected in series, and the series connection of the diode 22 and the resistor 23 is connected in parallel with the resistor 21. The output terminal of the operational amplifier 8 is connected to the cathode of the diode 22 and to one end of the resistor 21 . A connection point between the other end of the resistor 21 and one end of the resistor 23 is connected to one end of the resistor 24, and is also connected to the current set terminal 2 of the D/A converter 1. The other end of the resistor 24 is grounded.

A feedback resistor 9 and an integrating capacitor 10 are connected between the inverting input terminal of the operational amplifier 8 and its output terminal. Therefore, the voltage at the inverting input terminal of the operational amplifier 8 becomes equal to the voltage at the connection point between the resistor 1 and the resistor 20. The resistor 7 contains the pedestal level sampled and held by the sample hold circuit 6, the resistor 18, and the resistor 20.
A current is caused to flow according to the potential difference between the voltage at the connection point and the voltage at the connection point.

A current is caused to flow through the resistor 9 and capacitor 10 in accordance with this current. Therefore, when the output of the D/A converter 1 fluctuates due to temperature characteristics, the voltage at the connection point of the resistor 18 and the resistor 20 is sampled and held by the sample and hold circuit 6 from the output terminal of the operational amplifier 1. An output voltage that changes in response to changes in the pedestal level is obtained.

When the output voltage of the operational amplifier 8 changes according to the fluctuation of the pedestal level, the resistor 21, the diode 22, and the resistor 2
The current I2 flowing through the parallel circuit with the series connection of 3 changes. The output level control current 1 t+e1 flowing to the current set terminal 2 of the D/A converter 1 is the sum of this current 2 and the resistor 2.
It is determined by the current 11 flowing through 4. Therefore, when the output voltage of the operational amplifier 8 changes according to the fluctuation of the pedestal level and the current 2 changes, the output level control current ! flows to the current set terminal 2 of the D/A converter 1! ,.

, changes accordingly. Output level control current! 1.
．． When this changes, the dynamic range of the D/A converter 1 is varied accordingly, and the pedestal level of the video signal output from the D/A converter 1 is maintained at a constant value.

The video signal level can be set by variable resistor 12.

That is, here, when the variable resistor 12 is varied, the resistor 1
The voltage at the connection point between the resistor 19 and the resistor 19 is varied. When the voltage at the connection point between the resistor 18 and the resistor 19 is varied, the operational amplifier 8
The output voltage of is varied accordingly, and the output level control current 1 is passed to the current set terminal 2 of the D/A converter 1.
1. - is variable. As a result, D/A converter 1
The dynamic range of the video is varied and the video level is varied.

As shown in FIG. 2, the change in video level with respect to the variable amount of the variable resistor 12 has non-linear characteristics.

That is, in the variable resistor 12, for example (+5V to -5V
) The output voltage can be varied within the range. When the voltage set by the variable resistor 12 is at a positive level, the diode 1
6 and diode 19 are cut off. Therefore, the variable resistor 12 is connected to the non-inverting input terminal of the operational amplifier 8.
The voltage set in is divided by the series connection of resistor 15 and resistor 18 and resistor 20 and supplied. Further, when the voltage set by the variable resistor 12 is at a positive level, the output voltage of the operational amplifier 8 is high, so the diode 22 is cut off. For this reason, the current! 2 is equal to the current iI flowing through the resistor 21.

When the voltage set by the variable resistor 21 is lowered to a negative level and the terminal voltages of the diodes 16 and 19 exceed the forward voltage vr of the diodes, the diode 1
6 and diode 19 are turned on. When the diode 16 and the diode 19 are turned on, both ends of the resistor 18 are shorted, and the resistor 17 is inserted between both ends of the resistor 15. Therefore, the voltage at the connection point between the resistor 18 and the resistor 20 drops rapidly from the time when the diode 16 and the diode 19 are turned on.

At the same time, the voltage set by the variable resistor 12 is lowered to a predetermined negative level or lower, and the diode 2
When the voltage across the diode 22 becomes equal to or higher than Vf, the diode 22 is turned on. When the diode 22 is turned on, the resistor 23 is inserted in parallel with the resistor 21, and the current 2 becomes the sum of the current i flowing through the resistor 21 and the current 12 flowing through the resistor 23. In addition, the current I at this time! and current 11+1
The direction of g is opposite to the direction shown.

Therefore, when the diode 22 is turned on, the current 2 changes rapidly with respect to the variable amount of the variable resistor 12.

The output level control current Iist flowing through the current set terminal 2 of the D/A converter 1 is equal to the current Iist flowing through the resistor 24.
It is the difference current between t and current ■2, and is Ts+et-TI
It is Iz. Therefore, when the current I suddenly increases due to the diode 22 being turned on, the current set terminal 2
The output level control current I3゜1 flowing through the output level control current I3゜1 decreases rapidly.

If the value of the resistor 23 is set so that the current 2 when the voltage set by the variable resistor 12 is minimized is equal to the current It, the output level control current 1. . 1 can be set to 0. Output level control current 11. , becomes O, the output video signal level becomes O.

Thus, according to one embodiment of the present invention, the variable resistor 1
2 is gradually narrowed down from the maximum value, as shown in FIG. 2, when the output voltage of the variable resistor 12 reaches -EaV, the diode 16. Diode 19 turns on, operational amplifier 8
As the output level of the diode 22 drops rapidly, the output level of the diode 22
turns on, and the output level control current ■1. ．． The output video level decreases rapidly. Then, the output voltage of the variable resistor 12 is changed from -EaV to the minimum value (-5V) (and the output level control current is decreased until it reaches 0, and the video signal level rapidly reaches 0). Therefore, by operating this variable resistor 22, fade-in/fade-out processing can be performed.

Note that the diode 16 and the diode 19 are provided to increase the voltage variable amount only in the negative direction, and these diodes 16 and the diode 19 can be omitted.

Further, in the above-described embodiment, switching is performed using diodes to maintain nonlinear characteristics, but nonlinear characteristics may be obtained using other configurations.

Furthermore, the resistor 23 connected in series with the diode 22 can be omitted.

〔Effect of the invention〕

According to this invention, when the output voltage of the variable resistor 12 is gradually lowered from a positive level, the video level is linearly lowered up to a predetermined level, and when it exceeds the predetermined level, the video level is rapidly lowered, and The value sets the video level to 0.
You can narrow it down to Therefore, fade-in/fade-out processing can be performed using the variable resistor 12, and the video level can be easily adjusted within a range where the video level changes linearly with respect to changes in the variable resistor 12.

In addition, when the video level changes non-linearly in response to changes in the variable resistor 12, the video level can be narrowed down or increased in accordance with the human sensation when moving the variable resistor 12, and fade-in/fade-out is possible. Easy to process.

Furthermore, since it is sufficient to simply add a diode and a resistor to the existing circuit, no major circuit changes are required and the cost does not increase.

[Brief explanation of the drawing]

Fig. 1 is a connection diagram of an embodiment of the present invention, Fig. 2 is a graph used to explain an embodiment of the invention, Fig. 3 is a block diagram of an example of the configuration of a TBC circuit, and Fig. 4 is a diagram of a conventional TBC circuit. 5 and 6 are graphs used to explain the conventional level control circuit, FIG. 7 is a block diagram of another example of the conventional level control circuit, and FIG. 8 is the connection diagram used to explain the level control circuit. Waveform diagram used to explain another example of the conventional level control circuit, No. 9
The figure is a plot diagram of yet another example of a conventional level control circuit. Explanation of main symbols in the drawings 1: D/A converter, 2: Current set terminal, 3:
Input terminal, 8: operational amplifier, 12: variable resistor,
16, 19.22: Diode. Agent Patent Attorney Masa Sugiura Tomogo- TBCI! 】Kanj 13 Figure 4 Electric i - Jujutsu 4th row of special small klfi Figure 5 Company A row of special small student 1st figure 8

Claims (1)

[Claims] A current control type D/A conversion circuit that sets the dynamic range of D/A conversion by current control;
dynamic range control signal generating means for generating a control signal for increasing or decreasing the dynamic range by a predetermined amount with respect to a predetermined reference dynamic range of the /A conversion circuit; A nonlinear control current that generates a nonlinear control current to make changes in the dynamic range asymmetric with respect to the predetermined reference dynamic range, and supplies this nonlinear control current to the control current input of the current control type D/A conversion circuit. A signal level control circuit comprising: generating means.