JPH0223089B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an improvement in an amplifier having a gain switching function.

[Prior Art] When using an amplifier, it may be necessary to temporally switch the gain to amplify the signal. For example, in the VHS system or 8mm VTR, which is a type of magnetic recording/reproducing device (hereinafter referred to as VTR), the S/N ratio of the reproduced color burst signal is improved, and the uneven rotation of the head, expansion and contraction of the video tape, tape running, etc. are improved. In order to increase the effect of removing time axis fluctuation components such as jitter caused by changes in speed etc. using the reproduced color burst signal, the amplitude of only the color burst signal of the color signal is doubled (+6 dB) during recording. The signal is amplified and recorded, and when reproduced, the amplitude of only the color burst signal is compressed to 1/2 (-6 dB) and then restored to the original amplitude for reproduction. Therefore, in order to realize this, an amplifier with different gains for the burst period and the non-burst period is required. For convenience of explanation, the explanation will be given below by taking the enhancement and compression of a burst signal as an example.

Conventionally, there has been a gain switching type amplifier shown in FIG. 1 that enhances and compresses the burst signal as described above. In the figure, input terminals 1a and 1
Color signals having the same waveform and having mutually complementary polarities are applied to differential amplifiers 3 and 8. Further, burst gate pulses having the same waveform and having complementary polarities are applied to input terminals 2a and 2b, and these burst gate pulses are input to the bases of transistors 15 and 16. Assuming that a high level voltage is applied to the base of the transistor 15 and a low level voltage is applied to the base of the transistor 16 during the burst period, all the current flowing through the constant current source 17 flows through the transistor 15, that is, through the differential amplifier 3. It turns out. During the non-burst period, contrary to the burst period, a low-level voltage is applied to the base of the transistor 15 and a high-level voltage is applied to the base of the transistor 16, so that all the current flowing through the constant current source 17 flows through the transistor 16. The current flows through the differential amplifier 8. Emitter negative feedback resistors 6 and 7 forming the differential amplifier 3
If the value of is set to 1/2 of the value of emitter negative feedback resistors 11 and 12 that constitute differential amplifier 8, the value of load resistor 13 is common to differential amplifiers 3 and 8, so differential amplifier 3 The gain of differential amplifier 8
The gain is twice the gain (+6dB). Therefore, during the burst period, the burst signal amplitude is enhanced by a factor of two (+6 dB) compared to the color signal amplitude during the trace period. Also, if the gain of the differential amplifier 3 is set to 1/2 (-6 dB) of the gain of the differential amplifier 8, the burst signal amplitude will be reduced to 1/2 (-6 dB) compared to the color signal amplitude during the trace period. Can be compressed.

As described above, the conventional burst signal amplitude enhancement/compression circuit uses the differential switching transistor 1 for switching whether the current flowing through the constant current source 17 should flow through the differential amplifier 3 or the differential amplifier 8.
5 and 16, the number of stacked transistors and resistors increases, making it unsuitable for the low power supply voltage that is the trend in recent ICs. Furthermore, since there is a moment when the differential pair transistors 15 and 16 are simultaneously turned on, there is a drawback that a spike occurs at the switching timing.

FIG. 2 is a circuit diagram showing another example of the conventional burst signal amplitude enhancement/compression circuit. Note that this second
Components in the circuit shown in the figure that are similar to those in the circuit shown in FIG. 1 are given the same reference numerals. In the figure, color signals selected to have mutually complementary polarities are input to input terminals 1a and 1b, and these color signals are applied to differential amplifiers 3 and 8. In addition, input terminal 2
Burst gate pulses selected to have mutually complementary polarities are input to a and 2b, and the burst gate pulses are applied to the bases of transistors 150 and 160. During the burst period, a low level voltage is applied to the base of the transistor 150 and a high level voltage is applied to the base of the transistor 160. Conversely, during the non-burst period, a high level voltage is applied to the base of the transistor 150 and a high level voltage is applied to the base of the transistor 160. Assuming that a low level voltage is applied, all current from constant current source 19 flows through differential amplifier 3 during the burst period, and all current from constant current source 20 flows through transistor 160, so differential amplifier 3 operates. During the non-burst period, all the current of the constant current source 19 flows through the transistor 150, and all the current of the constant current source 20 flows through the differential amplifier 8.
The differential amplifier 8 operates because the current flows through the channel. Set the gain of differential amplifier 3 to twice the gain of differential amplifier 8 (+
6dB), the burst signal is strengthened, and conversely, the gain of differential amplifier 3 is set to 1/1/1 of the gain of differential amplifier 8.
If set to 2 (-6dB), burst signal compression will be performed.

The burst signal amplitude enhancement/compression circuit shown in FIG.
As described above, since the current of the constant current sources 19 and 20 is switched by the transistors 150 and 160 inserted in parallel to the differential amplifiers 3 and 8, the number of stacked stages of transistors and resistors is small, and the power supply voltage is low. suitable for operation.
However, using two constant current sources 19 and 20,
When the differential amplifier 3 operates, the current of the constant current source 19 flows through the differential amplifier 3 and the load resistor 13.
Conversely, when the differential amplifier 8 operates, the constant current source 2
A current of 0 flows through the load resistor 13 and the differential amplifier 8. Therefore, if the current values of the constant current sources 19 and 20 are even slightly different, there is a drawback that a DC level difference occurs in the output between the burst period and the non-burst period. Also, transistors 150 and 16
0 operate simultaneously, the currents of the constant current sources 19 and 20 simultaneously flow into the load resistor 13 in a transient manner, which has the disadvantage that a spike occurs at the switching timing.

[Summary of the Invention] The main object of the present invention is to provide a gain switching amplifier that is capable of low power supply voltage operation and that does not generate DC steps or spikes during switching.

The above objects and other objects and features of the present invention will become more apparent from the following detailed description with reference to the drawings.

[Embodiment of the Invention] FIG. 3 is a circuit diagram showing an embodiment of the invention. In the figure, input terminals 1a and 1b have
As in the case of the circuit of FIG. 1 or 2, color signals of the same waveform with mutually complementary polarities are provided. In addition, input terminals 1a and 1b
A color signal may be applied to one terminal of the terminal, and a constant level DC voltage may be applied to the other terminal. These input terminals 1a and 1b are connected to the bases of transistors 22 and 23, respectively.
The respective emitters of transistors 22 and 23 are commonly connected through emitter negative feedback resistors 24 and 25. And these transistors 2
2 and 23 and resistors 24 and 25 constitute a differential amplifier 21. A constant current source 37 is connected to the connection point between the resistors 24 and 25. A cathode of a diode 26 is connected to the collector of the transistor 22 . The anode of diode 26 is connected to power supply terminal 18 . In addition, the transistor 22
The collector of is connected to the base of transistor 36. On the other hand, the collector of transistor 23 is connected to the cathode of diode 27. The anode of this diode 27 is connected to the power supply terminal 18. Further, the collector of the transistor 23 is connected to the base of the transistor 35. Transistor 35 cooperates with transistor 36 described above to configure differential amplifier 34. The emitters of these transistors 35 and 36 are commonly connected, and a constant current source 42 is connected to this common connection point. Further, the collector of the transistor 35 is connected to the power supply terminal 18 . On the other hand, the collector of the transistor 36 is connected to the power supply terminal 18 via the load resistor 13. Furthermore, the output terminal 14 is connected to the collector of the transistor 36.

Input terminals 2a and 2b are supplied with burst gate pulses whose polarities are selected to be complementary to each other, as in the case of the circuit of FIG. 1 or 2. Note that the burst gate pulse may be applied to only one of the input terminals 2a and 2b, and a constant level of DC voltage may be applied to the other terminal. Input terminal 2a is connected to transistors 29 and 3
Connected to the base of 2. Input terminal 2b is connected to the bases of transistors 30 and 33. Transistors 29 and 30 cooperate to form a differential switching circuit 28. These transistors 2
The emitters 9 and 30 are commonly connected, and a constant current source 38 is connected to this common connection point. The collector of transistor 29 is connected to the collector of transistor 22 described above. transistor 3
A power supply terminal 18 is connected to the collector of 0.
On the other hand, transistors 32 and 33 cooperate to form a differential switching circuit 31. The emitters of transistors 32 and 33 are commonly connected, and a constant current source 39 is connected to this common connection point. The collector of transistor 32 is connected to the collector of transistor 23 described above. The collector of the transistor 33 is connected to the power supply terminal 18 .

Next, the operation of the above embodiment will be explained.
Color signals are input to input terminals 1a and 1b, and are applied to the bases of transistors 22 and 23 with opposite polarities. In addition, input terminals 2a and 2b
A burst gate pulse is inputted to the bases of transistors 29 and 30 with mutually different polarities, and similarly applied to the bases of transistors 32 and 33 with mutually different polarities. When a low level voltage is applied to the bases of transistors 29 and 32 and a high level voltage is applied to the bases of transistors 30 and 33 during the burst period, the current I ₂ flowing through constant current source 38 is entirely transferred to transistor 33.
0 and the current I ₂ flowing through the constant current source 39 all flows through the transistor 33. Therefore, the current flowing through the diodes 26 and 27 is controlled by the constant current source 37.
The current I is only ₁ . Differential amplifier 2 at this time
1, diodes 26 and 27, constant current source 37,
The gain Gv1 of the amplifier composed of the differential amplifier 34, the load resistor 13, and the constant current source 42 is expressed as Gv1=I ₃ /I ₁ ·R _L /2 (R _E +re) (1). Here, R _E is the resistance value of the emitter negative feedback resistors 24 and 25, and R _L is the load resistor 13.
The resistance value, re, is the emitter differential resistance of transistors 22 and 23. Next, when a high level voltage is applied to the bases of transistors 29 and 32 and a low level voltage is applied to the bases of transistors 30 and 33 during the non-burst period, the constant current source 3
The current I ₂ of 8 flows through the diode 26 and the constant current source 3
The current I ₂ of 9 flows through the diode 27, and the gain Gv2 of the amplifier at this time is Gv2=I ₃ /(I ₁ +2I ₂ )·R _L /2(R _E +re) (2). As is clear from the comparison between Gv1 and Gv2,
If (I ₁ +2・I ₂ )=2・I ₁ , that is, I ₂ =(1/2)・I ₁ , then Gv1=2・Gv2. Since Gv1 is the gain in the burst period and Gv2 is the gain in the non-burst period, the amplitude of the burst signal is enhanced twice (+6 dB) compared to the color signal in the trace period. Furthermore, the polarity of the burst gate pulses input to the input terminals 2a and 2b is inverted,
During the burst period, a high level voltage is applied to the bases of the transistors 29 and 32, and a low level voltage is applied to the bases of the transistors 30 and 33, and conversely, during the non-burst period, a low level voltage is applied to the bases of the transistors 29 and 32. Assuming that a high-level voltage is applied to the bases of transistors 30 and 33, the gain Gv1 in the burst period and the gain in the non-burst period at that time are
Gv2 is Gv1=I ₃ /(I ₁ +2I ₂ )・R _L /2(R _E +re) …(3) Gv2=I ₃ /I ₁・R _L /(R _E +re) …(4) , (I ₁ +2・I ₂ )=2・I ₁ or I ₂ = (1/
2).1 If ₁ , Gv1 = (1/2).Gv2, and the gain of the burst signal is compressed to 1/2 (-6 dB) compared to the color signal during the trace period.

In the above description, for convenience of explanation, the reinforcement and compression of a burst signal has been explained as an example, but it goes without saying that the present invention is not limited to this and can be used in other applications requiring gain switching.

[Effects of the Invention] As described above, according to the present invention, the number of stacked stages of transistors and resistors is small, so it is optimal for low power supply voltage operation. Furthermore, in order to switch the gain, the currents of the constant current sources 38 and 39 are switched by the switching circuits 28 and 31 to switch the currents flowing through the diodes 26 and 27, but the change in the current flowing through the diodes 26 and 27 during switching is Since the direction is only unidirectional, either increasing or decreasing, the cathode voltages of diodes 26 and 27 both change in the same way at the time of switching. Therefore, since there is no transient state of imbalance, no spikes occur. Also,
The cathode voltage changes depending on the magnitude of the current flowing through the diodes 26 and 27, but the change is the same amount for both diodes 26 and 27, and since the transistors 35 and 36 that receive the change are of a differential type. , in-phase voltage changes are suppressed and do not appear at the output terminal 14. Therefore, no DC step occurs during switching.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a conventional gain switching type amplifier. FIG. 2 is a circuit diagram showing another example of a conventional gain switching type amplifier. FIG. 3 is a circuit diagram showing an embodiment of the present invention. In the figure, 1a and 1b are input terminals to which color signals are input, 2a and 2b are input terminals to which burst gate pulses as gain switching control signals are input, 21 and 34 are differential amplifiers, and 26
and 27 are diodes, 28 and 31 are differential switching circuits, 13 is a load resistor, 14 is an output terminal, and 37 to 42 are constant current sources.

Claims (1)

[Claims] 1. A first input terminal 1a and a second input terminal 1 into which a signal to be amplified is input at least to one of them.
b. a third input terminal 2a and a fourth input terminal 2b to which a control signal for gain switching is input at least to one of them; a first transistor 22 to whose base the first input terminal is connected; , a second transistor 2 whose base is connected to the second input terminal.
3, a first differential amplifier 21 comprising: an emitter of the first transistor and an emitter of the second transistor;
a first constant current source 37 connected to a common connection point of the emitters of the transistors; a first diode 26 having a cathode connected to the collector of the first transistor and an anode connected to a power supply; a second diode 27 whose cathode is connected to the collector of the transistor and whose anode is connected to the power supply; and a third transistor whose base is connected to the third input terminal and whose collector is connected to the collector of the first transistor. 29, a fourth transistor 30 whose base is connected to the fourth input terminal and whose collector is connected to the power supply; 4
a second constant current source 38 connected to a common connection point of the emitters of the transistors; a fifth transistor 32 whose base is connected to the third input terminal and whose collector is connected to the collector of the second transistor; , a second switching circuit 31 including a sixth transistor 33 whose base is connected to the fourth input terminal and whose collector is connected to a power supply; the emitter of the fifth transistor and the sixth transistor 33;
a third constant current source 39 connected to a common connection point of the emitters of the transistors; a seventh transistor 35 whose base is connected to the collector of the second transistor;
a second differential amplifier 34 including an eighth transistor 36 whose base is connected to the collector of the seventh transistor;
a fourth constant current source 42 connected to a common connection point of the emitters of the transistors; and a resistor 13 inserted between the collector of the eighth transistor and the power supply, Gain switching type amplifier that extracts amplified output.