JPH02127879A - Video signal processing unit - Google Patents

Abstract

PURPOSE:To attain the superimposition on a video signal in real time by sending each data of a video signal stored in a 1st memory and a picture signal stored in a 2nd memory to the same bus at the same speed by a bus driver and adopting a differential transmission specifications for the transmission line. CONSTITUTION:The 1st memory 102 storing a data being the result of interleaving a video signal VI by an interleaving circuit 101 in the unit of frames or fields and the 2nd memory 105 storing a data of a picture signal from a bus driver 104 in the unit of frames or fields are provided to the processing unit. Then the data of the picture signal from the 2nd memory 105 is sent to the same bus at the same speed as that of the data of a video signal from the 1st memory 102 and a differential transmission specification is employed for the transmission line between the memory and the output device. Thus, a picture signal is superimposed in the motion presence state without losing the real time performance of the inputted video signal.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to a video signal processing device that superimposes another image signal onto a video signal such as a continuous television signal and outputs the superimposed image signal.

[Conventional technology]

FIG. 5 shows a conventional video signal processing device, and in the figure,
1 is a line leading to a video signal (video signal) Vl including horizontal and vertical synchronization signals and encoded color signals; 2 is a decoder that separates this video signal Vl into color signals RG and B; 3 is a color signal R and CB an analog-to-digital (hereinafter referred to as A/D) converter that converts the signal into a digital signal format;
4 is a frame memory for storing digitized color signals R', G', and B' in units of frames, and 5 is an ink for transferring data D in the frame memory 4 by direct memory access (hereinafter referred to as DMA). face,
6 is a computer (hereinafter referred to as CPU), 7 is a (main) memory that stores programs and data of CPU 6, and 8 is CPU
The disk controller that stores the data of U6, 9 is C
1 is a disk for storing data of the PU 6; IO is a data input/output device for the CPU 6; 11 is a bus connecting the ink face 5 to the disk 9; 12 is a program control channel connecting the ink face 5 to the disk 9;
3 is a D/A converter 14 that converts the data D of the frame memory 4 into digital/analog (hereinafter referred to as D/A);
is an encoder of the output of the D/A converter 13. Next, the operation will be explained with reference to the conceptual diagram of FIG. First, the video signal Vl corresponding to the screen a in FIG. 6 is decoded by the decoder 2, and the red, blue, and green color signals R
, G, and B. Next, the color signals R, G, and B are A/D.
The converter 3 converts the signals into digital color signals R', G', and B', which are input to the frame memory 4, where one screen (one field or one frame) of the signals is stored. Next, C.P.
In response to an instruction from U6, the image signal stored in the memory 7 in advance is sent to the deframing memory 4 as shown in the screen of FIG. 6, and the stored contents are rewritten. continue,
The data (superimposed data) rewritten as described above according to instructions from the CPU 6 is outputted as an output video signal 0 via the D/A converter 13 and encoder 14, and is displayed on the sixth monitor (not shown). It is displayed as an image as shown in screen C in the figure.

[Problem to be solved by the invention]

Since the conventional video signal processing device is configured as described above, it is possible to superimpose a still image stored in the memory 7 onto a video signal, but it is not possible to superimpose a real-time video. It takes about 11 seconds to transfer the image signal data in the order of memory 7 → bus 11 - ink face 5 - frame memory 4 using lotus 11, and it also takes about 11 seconds to transfer the image signal data to the outside of the unit. There were problems such as extended output becoming difficult due to noise entering the output bus. This invention was made to solve the above-mentioned problems, and it is possible to superimpose an image signal generated separately from the above-mentioned video signal in a moving state without impairing the real-time nature of the input video signal. An object of the present invention is to obtain a video signal processing device that can perform superimposed images and display the superimposed images in multiple channels.

[Means to solve the problem]

The video signal processing device according to the present invention stores video signal data in a field unit or frame unit in a first memory, while storing image signal data generated in a predetermined procedure in a field unit or frame unit. The data of the image signal from the second memory is sent to the same bus at the same speed as the data of the video signal from the first memory by the lotus drive device, ．． A plurality of output devices for encoding output data from the second memory are provided for a plurality of channels, and the transmission path between each of these memories and the output devices has a differential transmission specification.

[Effect]

The bus driving device according to the present invention sends image data for superimposing onto the same bus at the same speed as data of a continuously input video signal, and controls the first memory and the second memory. A command is output to superimpose moving image data onto the video signal so that it can be displayed, or it can be displayed alone. Furthermore, even when output devices are connected through multiple channels, differential transmission suppresses the intrusion of noise and extends the data transmission distance.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, l is a line leading the video signal V[, 2 is a decoder, and 3 is an A/D converter, which are the same as those shown in FIG. 101 is a thinning circuit that thins out A/D conversion output data; 102 is a first memory such as a frame memory that stores the thinned data in frame units or field units; 109 is a command for controlling the video signal Vl; A line leading the image signal DI for superimposing onto the video signal Vl, 103 a control device that receives this image signal DI and generates a control command and image signal data, 104 a control command and image signal data 105 is a second memory such as a frame memory that stores image signal data from the lotus drive device 104 in frame units or field units; 107 is a first memory; The bus 108 serves as a transmission path for sending the data from the memory 102 and the second memory 105 to the output device, and the reference numeral 108 is an output device that converts the data on the bus 107 from D/A and encodes it into an analog video signal. . FIG. 2 shows a circuit that displays the image data in multiple channels so that it can be transmitted outside one unit.
Here, the second memory 105 and the output device 108 are
As a unit, this is connected to a transmission line (hash) 107 which is prepared and extended for a plurality of channels. In addition, this transmission line 107, the second memory 105 and the output device 1
The transmission line 107a connecting to 08 has a differential transmission specification that is highly effective in removing intrusion noise. Next, the operation will be explained with reference to the conceptual diagrams and operational model diagrams of FIGS. 3 and 4. First, the continuously inputted video signal Vl is decoded by the decoder 2 and separated into each color signal R, G, and B, and then converted into a digital signal by the A/D converter 3. Next, this digital signal is thinned out at regular intervals by a thinning circuit 101 and then stored in the first memory 102 . That is, a video signal as shown in screen d of FIG. 3 is stored in the first memory 102 in real time. On the other hand, when an image signal DI as shown in screen e in FIG. Ru. Further, the data of the image signal sent out in this way is stored in the second memory 105.
are stored frame by frame or field by field. The first memory 102 and the second memory 105 output each data at the same scanning timing (speed), and as shown in the operation model diagram of FIG. 4, the image data output by the second memory 105 The determining unit 113 determines whether or not there is a transparent color portion P on the screen e of
, 112 is closed, and the data in either memory 102 or 105 is output to the lotus 107. That is, during scanning, if the image signal data in the second memory 105 includes the transparent color portion P, the output of this image signal data is canted and the image signal from the first memory 102 is If the transparent color portion P is not included in the image signal data, the output of the first memory 102 is cut and the image signal data of the second memory 105 is sent to the bus 107. It will be output to . As a result, the video signal 0 corresponding to the screen f shown in FIG. 3 is outputted through the output device 108, and as a result of this output, a video as shown in the screen [ is displayed on a monitor (not shown). In this case, in order to superimpose the image signal DI on the video signal Vl as moving image data, the image data in the second memory 105 is transferred to the bus drive device 104.
This allows updates to be made 60 times (l frames) per second. In addition, in this invention, the second memory 105 and the output device 108 are set as one unit, and since these are provided for multiple channels and connected to the lotus 107, which is a transmission line with differential transmission specifications, the units for each channel are installed separately. Even if the image signal is transmitted, it is less affected by noise that invades the transmission path, so the transmission distance of the image signal can be extended, and data can be transmitted to a large number of points. According to experiments, no data deterioration was observed even when the distance between units was 10 meters. Note that by sending a multiplexed command for processing the video signal data to the thinning circuit 101 to the bus 106, the first memory 102 can store the reduced or inverted video signal data.

【Effect of the invention】

As described above, according to the present invention, the video signal stored in the first memory and the image signal stored in the second memory are transferred to the same bus at the same speed by the bus driving device. Since the transmission path is configured to have a differential transmission specification and the output device is configured to have multiple channels, it is possible to not only display the data of the above-mentioned moving image signal created separately, but also to display real-time video signals. In addition to being able to perform superimposition along with high-speed data transfer, the extension of the transmission path has the effect of enabling image transmission to multiple points with less noise.

[Brief explanation of drawings]

FIG. 1 is a block connection diagram showing a video signal processing device according to an embodiment of the present invention, FIG. 2 is a block connection diagram showing a circuit that outputs and displays image data by converting it into multiple channels, and FIG. 3 is similar to FIG. 4 is an operational model diagram of the superimpose shown in FIG. 3, FIG. 5 is a block connection diagram showing a conventional video signal processing device, and FIG. FIG. 2 is a conceptual diagram illustrating a superimpose operation based on a diagram. vr is a video signal, DI is an image signal, 102 is a first memory, 104 is a lotus drive device, 105 is a second memory, 1
06 is a transmission line (bus), 107 is a transmission line (lotus), 10
7a is a transmission line. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] In a video signal processing device that processes continuous video signal data and image signal data generated according to a predetermined procedure into one video signal and outputs the same, the video signal data is divided into fields or frames. a first memory that stores the image signal data in units of fields or frames, and a second memory that stores the data of the image signal in units of fields or frames; a bus driving device that sends image signal data stored in the memory of the memory to a bus; a multi-channel output device that encodes output data from the first memory and the second memory into an analog video signal; and the output device , and a transmission line with differential transmission specifications that interconnects the first memory and the second memory.