JPH02130176U - - Google Patents

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Publication number
JPH02130176U
JPH02130176U JP1989038590U JP3859089U JPH02130176U JP H02130176 U JPH02130176 U JP H02130176U JP 1989038590 U JP1989038590 U JP 1989038590U JP 3859089 U JP3859089 U JP 3859089U JP H02130176 U JPH02130176 U JP H02130176U
Authority
JP
Japan
Prior art keywords
synchronous
screen
circuit
display device
deflection circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1989038590U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989038590U priority Critical patent/JPH02130176U/ja
Publication of JPH02130176U publication Critical patent/JPH02130176U/ja
Pending legal-status Critical Current

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  • Studio Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1,2図は、それぞれこの考案の多画面デイ
スプレイ装置の一実施例を示す概略回路構成図及
び要部回路図、第3図は、第2図に示した鋸歯状
波発生回路の回路各部の信号波形図、第4図は、
従来の多画面デイスプレイ装置の一例を示す概略
回路構成図である。 11……多画面デイスプレイ装置、12……同
期偏向回路、12a……水平発振回路、12b…
…自動周波数制御回路、13……鋸歯状波発生回
路、14……微分回路、15……増幅回路、16
……波形整形回路、17……積分回路。
1 and 2 are a schematic circuit configuration diagram and a main circuit diagram showing an embodiment of the multi-screen display device of this invention, respectively, and FIG. 3 is a circuit diagram of each part of the sawtooth wave generation circuit shown in FIG. 2. The signal waveform diagram, Figure 4, is
1 is a schematic circuit configuration diagram showing an example of a conventional multi-screen display device. 11...Multi-screen display device, 12...Synchronized deflection circuit, 12a...Horizontal oscillation circuit, 12b...
... Automatic frequency control circuit, 13 ... Sawtooth wave generation circuit, 14 ... Differentiation circuit, 15 ... Amplification circuit, 16
...Waveform shaping circuit, 17...Integrator circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 親画面の一部に子画面を挿入表示する多画面デ
イスプレイ装置であつて、同期偏向のための汎用
ICに備わる同期分離機能により、子画面用映像
信号から前記挿入表示に必要な水平と垂直の各同
期信号を分離する同期偏向回路と、この同期偏向
回路から供給される水平発振パルスを時間微分し
、疑似フライバツクパルスを生成するとともに、
この疑似フライバツクパルスを時間積分して得ら
れる鋸歯状波を、前記同期偏向回路内の自動周波
数制御用に帰還する鋸歯状波発生回路とを具備し
てなる多画面デイスプレイ装置。
This is a multi-screen display device that inserts and displays a child screen in a part of the main screen, and uses the synchronization separation function of a general-purpose IC for synchronization deflection to convert the video signal for the child screen into the horizontal and vertical lines necessary for the inserted display. A synchronous deflection circuit separates each synchronous signal, time differentiates the horizontal oscillation pulse supplied from this synchronous deflection circuit, and generates a pseudo flyback pulse.
A multi-screen display device comprising a sawtooth wave generation circuit that feeds back a sawtooth wave obtained by time-integrating the pseudo flyback pulse for automatic frequency control within the synchronous deflection circuit.
JP1989038590U 1989-03-31 1989-03-31 Pending JPH02130176U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989038590U JPH02130176U (en) 1989-03-31 1989-03-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989038590U JPH02130176U (en) 1989-03-31 1989-03-31

Publications (1)

Publication Number Publication Date
JPH02130176U true JPH02130176U (en) 1990-10-26

Family

ID=31546729

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989038590U Pending JPH02130176U (en) 1989-03-31 1989-03-31

Country Status (1)

Country Link
JP (1) JPH02130176U (en)

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