JPH0214787B2 - - Google Patents

Info

Publication number
JPH0214787B2
JPH0214787B2 JP57068208A JP6820882A JPH0214787B2 JP H0214787 B2 JPH0214787 B2 JP H0214787B2 JP 57068208 A JP57068208 A JP 57068208A JP 6820882 A JP6820882 A JP 6820882A JP H0214787 B2 JPH0214787 B2 JP H0214787B2
Authority
JP
Japan
Prior art keywords
brazing
ceramic substrate
lead pins
lead
lead pin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57068208A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58184748A (ja
Inventor
Hitoshi Tsuji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tanaka Precious Metal Technologies Co Ltd
Original Assignee
Tanaka Precious Metal Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tanaka Precious Metal Technologies Co Ltd filed Critical Tanaka Precious Metal Technologies Co Ltd
Priority to JP57068208A priority Critical patent/JPS58184748A/ja
Publication of JPS58184748A publication Critical patent/JPS58184748A/ja
Publication of JPH0214787B2 publication Critical patent/JPH0214787B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/099—Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP57068208A 1982-04-23 1982-04-23 半導体用リ−ドピンのろう付方法 Granted JPS58184748A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57068208A JPS58184748A (ja) 1982-04-23 1982-04-23 半導体用リ−ドピンのろう付方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57068208A JPS58184748A (ja) 1982-04-23 1982-04-23 半導体用リ−ドピンのろう付方法

Publications (2)

Publication Number Publication Date
JPS58184748A JPS58184748A (ja) 1983-10-28
JPH0214787B2 true JPH0214787B2 (da) 1990-04-10

Family

ID=13367142

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57068208A Granted JPS58184748A (ja) 1982-04-23 1982-04-23 半導体用リ−ドピンのろう付方法

Country Status (1)

Country Link
JP (1) JPS58184748A (da)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4864568B2 (ja) * 2006-06-30 2012-02-01 株式会社ダイヘン 路上設置形変圧器装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4824009A (en) * 1981-12-31 1989-04-25 International Business Machines Corporation Process for braze attachment of electronic package members

Also Published As

Publication number Publication date
JPS58184748A (ja) 1983-10-28

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