JPH02149154A - Automatic test system for transmission quality - Google Patents

Automatic test system for transmission quality

Info

Publication number
JPH02149154A
JPH02149154A JP63302953A JP30295388A JPH02149154A JP H02149154 A JPH02149154 A JP H02149154A JP 63302953 A JP63302953 A JP 63302953A JP 30295388 A JP30295388 A JP 30295388A JP H02149154 A JPH02149154 A JP H02149154A
Authority
JP
Japan
Prior art keywords
circuit
test pattern
test
transmission quality
synchronization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63302953A
Other languages
Japanese (ja)
Inventor
Seiichi Yamamoto
山本 成一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63302953A priority Critical patent/JPH02149154A/en
Publication of JPH02149154A publication Critical patent/JPH02149154A/en
Pending legal-status Critical Current

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  • Dc Digital Transmission (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)

Abstract

PURPOSE:To judge the transmission quality of each relay section with one time of execution of a test by setting the duration of a loop back test proper to each repeater longer at every passage of a relay stage. CONSTITUTION:Synchronism is taken at a synchronous circuit 5 in the repeater from a test pattern string generated by a test pattern generation circuit 1, and the loop back test is recognized, and the input signal of an IN2 is folded to an OUT2 at a folding circuit 7 only for time length proper to the repeater set at a time constant circuit 6, and the similar operation is performed at the repeater at following stages. Here, a time constant is set longer sequentially as passing the next and after stages. At the reception part of test equipment, the synchronism is taken at a synchronization circuit 2 and the error of the test pattern is detected from reception data at an error detecting circuit 3, and the transmission quality of each relay section is decided from the duration of the loop back test proper to each repeater and error information from the error detecting circuit 3 at a decision circuit 4. In such a way, it is possible to automatically test and decide the transmission quality between adjacent repeaters.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、伝送線路の途中に間隔を置いて配置した中継
装置により、伝送線路による損失を補いながら長距離に
信号を伝送する多段中継伝送系において、各中継区間の
伝送品質を判定する自動試験方式に関する。
Detailed Description of the Invention (Industrial Application Field) The present invention relates to multi-stage relay transmission that transmits signals over long distances while compensating for losses caused by the transmission line using repeaters placed at intervals along the transmission line. This invention relates to an automatic test method for determining the transmission quality of each relay section in a system.

(従来の技術) 多段中継伝送系における各中継区間の伝送品質を判定す
る従来の試験方式では、各中継装置に固有のアドレスを
割りふり、試験器からの試験設定情報とアドレスにより
、該当する中継装置での折返しを実行していた。
(Prior art) In the conventional test method for determining the transmission quality of each relay section in a multi-stage relay transmission system, a unique address is assigned to each relay device, and the corresponding relay is The device was performing loopback.

(発明が解決しようとする課題) 上述した従来の試験方式では、障害区間を判定する為に
はn段中継の場合には試験器から最大1回アドレスをか
えて試験を実行する必要があるという欠点が有った。
(Problem to be Solved by the Invention) In the conventional test method described above, in order to determine a fault section, in the case of an n-stage relay, it is necessary to change the address from the tester at most once and execute the test. There were drawbacks.

(課題を解決するための手段) 前述の課題を解決するために本発明が提供する手段は、
伝送線路の途中に間隔を置いて複数の中継装置を配して
、該伝送線路における信号品質の劣化を該中継装置で補
うことにより長距離に信号伝送する多段中継伝送系にお
いて、隣接する中継装置間の前記伝送線路の伝送品質を
前記伝送線路に試1狭器を接続することにより自動的に
試験する方式であって、 前記伝送線路に試験パターン列を送る試験パターン発生
回路と、前記中継装置で折り返された前記試験パターン
列を検出したときに同期信号を生成する第1の同期回路
と、この第1の同期回路から前記同期信号を受けている
期間に前記中継装置で折り返された前記試験パターン列
の誤りを検出する回路と、前記中継装置で折り返して送
られて来る前記試験パターン列の継続時間と前記誤り検
出回路で検出された前記誤りとから前記伝送品質を判定
する回路とを前記試験器に備え、前記試験パターン発生
回路から送られる前記試験パターン列を検出したときに
同期信号を生成する第2の同期回路と、この第2の同期
回路から前記同期信号を受けたときから前記各中継装置
ごとに予め定められた折返継続時間だけ折返し信号を出
力する時定数回路と、前記折返し信号を受けている期間
だけ前記試験パターン発生回路から送られた前記試験パ
ターン列を前記試験器に向けて折返す回路とを前記各中
継装置に備える ことを特徴とする。
(Means for Solving the Problems) Means provided by the present invention to solve the above-mentioned problems are as follows:
In a multi-stage relay transmission system in which a plurality of repeating devices are placed at intervals along a transmission line and signals are transmitted over long distances by compensating for deterioration in signal quality on the transmission line with the repeating devices, adjacent repeating devices are used. A method for automatically testing the transmission quality of the transmission line between the transmission lines by connecting a tester to the transmission line, the method comprising: a test pattern generation circuit that sends a test pattern sequence to the transmission line; and the relay device. a first synchronization circuit that generates a synchronization signal when detecting the test pattern sequence looped back by the relay device; a circuit for detecting an error in a pattern string; and a circuit for determining the transmission quality from the duration of the test pattern string sent back by the relay device and the error detected by the error detection circuit. a second synchronization circuit provided in the tester and generating a synchronization signal when detecting the test pattern train sent from the test pattern generation circuit; a time constant circuit that outputs a return signal for a predetermined return duration time for each relay device; and a time constant circuit that outputs a loopback signal for a predetermined loopback duration time for each relay device; Each of the repeating devices is provided with a circuit for folding back toward the destination.

(実施例) 次に、本発明について図面を参照して説明する。(Example) Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例で用いる試験器の構成を示す
ブロック図、第2図はその実施例で用いる中継装置の構
成を示すブロック図である。INl及び0UT1は試験
器の入力及び出力、IN2及び0UT2は中継装置に於
ける試験器側の入力及び出力、1N3及びOU T 3
は中継装置に於ける次段の中継装置側の入力及び出方で
ある。1は試験パターン発生回路、2は同期回路、3は
受信データから試験パターンの誤りを検出する誤り検出
回路、4は各中継装置の折返し試験継続時間と誤り検出
回路3からの誤り情報から各中継区間の伝送品質を判定
する判定回路、5は同期回路、6は当該中継装置固有の
折返し試Ill!継続時間を設定する時定数回路、7は
時定数回路6にて設定されている試験継続時間だけ折返
し状態になる折返し回路である。この折返し回路7が折
返し状態になると信号線10が信号線11に接続され、
その他のときは信号線11は信号線12に接続されてい
る。
FIG. 1 is a block diagram showing the configuration of a tester used in an embodiment of the present invention, and FIG. 2 is a block diagram showing the configuration of a relay device used in the embodiment. INl and 0UT1 are the input and output of the tester, IN2 and 0UT2 are the input and output of the tester in the relay device, 1N3 and OUT3
are the inputs and outputs of the next-stage relay device in the relay device. 1 is a test pattern generation circuit, 2 is a synchronization circuit, 3 is an error detection circuit that detects errors in the test pattern from received data, and 4 is a test pattern generation circuit for each relay based on the return test duration time of each relay device and error information from error detection circuit 3. A determination circuit for determining the transmission quality of the section, 5 is a synchronization circuit, and 6 is a loopback test Ill! specific to the relay device. A time constant circuit 7 for setting the duration is a folding circuit that enters a folding state for the test duration set by the time constant circuit 6. When the folding circuit 7 enters the folding state, the signal line 10 is connected to the signal line 11,
At other times, the signal line 11 is connected to the signal line 12.

次に、この実施例の動作について説明する。まず、試験
パターン発生回路1にて発生した試験パターン列から中
継装置の同期回路5で同期がとられ折返し試験状態の認
識を行ない、時定数回16で認定する当該中継装置固有
の時間長だけ折返し回路7でIN2の入力信号を0UT
2に折返す。
Next, the operation of this embodiment will be explained. First, the synchronization circuit 5 of the relay device synchronizes the test pattern sequence generated by the test pattern generation circuit 1, recognizes the loopback test state, and loops back for a time length specific to the relay device, which is certified by the time constant 16. In circuit 7, input signal of IN2 is set to 0UT.
Turn back to 2.

次段以降の中継装置でも同様の動作を行なう、ここで、
時定数は次段以降順次に長くとるものとする。試験器の
受信部では同期回路2で同期をとり、誤り検出回路3で
受信データから試験パターンの誤りを検出し、判定回路
4に於て各中継装置固有の折返し試験継続時間と誤り検
出回路3からの誤り情報から各中継区間の伝送品質を判
定する。
The same operation is performed at the next stage and subsequent relay devices.Here,
It is assumed that the time constants are made sequentially longer from the next stage onward. In the receiving section of the tester, a synchronization circuit 2 synchronizes, an error detection circuit 3 detects an error in the test pattern from the received data, and a judgment circuit 4 detects the loopback test duration specific to each relay device and the error detection circuit 3. The transmission quality of each relay section is determined from the error information from.

(発明の効果) 以上に説明したように本発明の方式によれば、各中継装
置固有の折返し試験継続時間を試験器からの中継段を経
る毎に長く設定することにより、各中継区間の伝送品質
を一回の試験の実行で判定できる。
(Effects of the Invention) As explained above, according to the method of the present invention, by setting the loopback test duration specific to each relay device to be longer for each relay stage from the tester, the transmission of each relay section is Quality can be determined with a single test run.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実繕例における試験器の構成を示す
ブロック図、第2図はその実施例における中継装置の構
成を示すブロック図である。 1・・・試11パターン発生回路、2・・・同期回路、
3・・・誤り検出回路、4・・・判定回路、5・・・同
期回路、6・・・時定数回路、7・・・折返し回路。
FIG. 1 is a block diagram showing the configuration of a tester in a repair example of the present invention, and FIG. 2 is a block diagram showing the configuration of a relay device in the embodiment. 1... Test 11 pattern generation circuit, 2... Synchronous circuit,
3...Error detection circuit, 4...Judgment circuit, 5...Synchronization circuit, 6...Time constant circuit, 7...Return circuit.

Claims (1)

【特許請求の範囲】 伝送線路の途中に間隔を置いて複数の中継装置を配して
、該伝送線路における信号品質の劣化を該中継装置で補
うことにより長距離に信号を伝送する多段中継伝送系に
おいて、隣接する前記中継装置間の前記伝送線路の伝送
品質を前記伝送線路に試験器を接続することにより自動
的に試験する方式であって、 前記伝送線路に試験パターン列を送る試験パターン発生
回路と、前記中継装置で折り返された前記試験パターン
列を検出したときに同期信号を生成する第1の同期回路
と、この第1の同期回路から前記同期信号を受けている
期間に前記中継装置で折り返された前記試験パターン列
の誤りを検出する回路と、前記中継装置で折り返して送
られて来る前記試験パターン列の継続時間と前記誤り検
出回路で検出された前記誤りとから前記伝送品質を判定
する回路とを前記試験器に備え、 前記試験パターン発生回路から送られる前記試験パター
ン列を検出したときに同期信号を生成する第2の同期回
路と、この第2の同期回路から前記同期信号を受けたと
きから前記各中継装置ごとに予め定められた折返継続時
間だけ折返し信号を出力する時定数回路と、前記折返し
信号を受けている期間だけ前記試験パターン発生回路か
ら送られた前記試験パターン列を前記試験器に向けて折
り返す回路とを前記各中継装置に備える ことを特徴とする伝送品質自動試験方式。
[Claims] Multi-stage relay transmission that transmits signals over long distances by arranging a plurality of repeaters at intervals along a transmission line and compensating for deterioration in signal quality on the transmission line with the repeaters. In the system, the transmission quality of the transmission line between the adjacent repeating devices is automatically tested by connecting a tester to the transmission line, the method comprising: generating a test pattern to send a test pattern sequence to the transmission line; a first synchronization circuit that generates a synchronization signal when the repeating test pattern sequence is detected by the relay device; A circuit for detecting errors in the test pattern string returned by the relay device, a duration of the test pattern string sent back by the relay device, and the error detected by the error detection circuit to determine the transmission quality. a second synchronization circuit that generates a synchronization signal when detecting the test pattern sequence sent from the test pattern generation circuit; and a second synchronization circuit that generates the synchronization signal from the second synchronization circuit. a time constant circuit that outputs a loopback signal for a loopback duration predetermined for each relay device from the time when the loopback signal is received; and the test pattern that is sent from the test pattern generation circuit only during the period when the loopback signal is received. An automatic transmission quality testing method, characterized in that each of the repeating devices is provided with a circuit for turning back a column toward the tester.
JP63302953A 1988-11-30 1988-11-30 Automatic test system for transmission quality Pending JPH02149154A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63302953A JPH02149154A (en) 1988-11-30 1988-11-30 Automatic test system for transmission quality

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63302953A JPH02149154A (en) 1988-11-30 1988-11-30 Automatic test system for transmission quality

Publications (1)

Publication Number Publication Date
JPH02149154A true JPH02149154A (en) 1990-06-07

Family

ID=17915137

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63302953A Pending JPH02149154A (en) 1988-11-30 1988-11-30 Automatic test system for transmission quality

Country Status (1)

Country Link
JP (1) JPH02149154A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6462911B1 (en) 1998-08-28 2002-10-08 Hitachi, Ltd. Magnetic head support mechanism and magnetic disk device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6462911B1 (en) 1998-08-28 2002-10-08 Hitachi, Ltd. Magnetic head support mechanism and magnetic disk device

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