JPH0216576B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to a semiconductor device, and particularly to a method for manufacturing a semiconductor device using a high melting point metal as an electrode, wiring, etc.

[Prior art and its drawbacks]

Conventionally, aluminum (hereinafter referred to as "Al") has been used as the material for electrodes, wiring, etc. in semiconductor devices.
Low melting point metals such as molybdenum (hereinafter referred to as "Mo"), tungsten (hereinafter referred to as "W"), tantalum (hereinafter referred to as "Ta"), titanium (hereinafter referred to as "Ti")
High melting point metals such as (hereinafter referred to as "polySi") or semiconductor materials such as polycrystalline silicon (hereinafter referred to as "polySi") were used. Each of these materials had advantages and disadvantages. In other words, although Al has the advantage of low resistivity, its melting point is as low as 660°C, so there are various restrictions when introducing Al into the manufacturing process of semiconductor devices, which usually requires a heat treatment process of about 1000°C. It was hot. On the other hand, polySi has the advantage of being able to withstand heat treatment at temperatures of about 1000°C and having a high affinity with silicon used as a substrate, allowing a greater degree of freedom in the manufacturing process of semiconductor devices. Furthermore, by simply heat-treating polySi in an oxidizing atmosphere, a silicon oxide film (hereinafter referred to as "SiO ₂ ") with good insulation can be easily formed on the surface of polySi, and both polySi and SiO ₂
Acid cleaning with an appropriate mixture of H ₂ SO, HCl, HNO ₃ , H ₂ O _2, etc. solutions (hereinafter simply referred to as "acid cleaning")
Since polySi can withstand high temperatures, it is easy to clean the element surface, so when polySi is used for electrodes, wiring, etc., it has the advantage of increasing the manufacturing yield of semiconductor devices. However, the specific resistance of polySi is two to three orders of magnitude higher than that of metals, so it is difficult to use for electrodes, wiring, etc.
In semiconductor devices using polySi, the propagation delay due to wiring resistance increases, making it difficult to achieve high integration and high speed.

On the other hand, high-melting point metals such as Mo have a high melting point of about 2600℃ and can withstand heat treatment of about 1000℃, so using Mo for electrodes, wiring, etc. can increase the degree of freedom in the manufacturing process of semiconductor devices. Since high melting point metals have low specific resistance, they are also suitable for increasing the speed of semiconductor devices. For this reason, semiconductor devices including high-melting point metals have been in the spotlight. However, in the case of metals with a higher melting point than polySi, a semiconductor device with a structure that has a stable and high-quality insulating layer like a silicon thermal oxide film on its surface, and a method for easily manufacturing it, have not yet been realized. Therefore, semiconductor devices using high-melting point metals for electrodes, wiring, etc. have not been able to become mainstream in semiconductor technology until now. Structures in which an insulating layer such as a silicon oxide film is provided on a high-melting point metal layer have existed in the past. However, since this silicon oxide film is formed by a chemical vapor deposition (hereinafter referred to as "CVD") method (hereinafter a silicon oxide film formed by the CVD method is referred to as "CVDSiO ₂ "), the film quality is poor. The problem was that, for example, the dielectric strength was lower than that of thermally oxidized silicon films. Furthermore, the CVD method deposits CVDSiO ₂ on the entire surface, and cannot selectively form a silicon oxide film only on the high melting point metal surface. Furthermore this CVDSiO ₂
It is difficult to form CVDSiO 2 with a uniform thickness over stepped areas, and CVDSiO ₂ often forms an overhang at stepped areas. For this reason this CVDSiO ₂
When trying to realize a semiconductor with a three-layer structure consisting of a refractory metal layer with steps, CVDSiO ₂ , and other conductive layers by using it as an interlayer insulating film, there was a drawback that there were many short circuits or disconnections. Due to these drawbacks, it is difficult to realize a multilayer wiring structure, and there is a limit to the improvement in manufacturing yield of semiconductor devices. In addition, by CVD method, it can be applied to the surface of high melting point metal.
To form CVDSiO ₂ , the temperature inside the CVD device is lowered to prevent oxidation of the high-melting point metal, and then the sample containing the high-melting point metal is placed inside the CVD device.
It was necessary to create an inert atmosphere in the device, raise the temperature, and then feed the reaction gas into the device to form CVDSiO ₂ . Therefore, the operation is complicated and takes a long time. Furthermore, in the conventional method, in order to eliminate problems such as the breakdown voltage of CVDSiO ₂ and the presence of pinholes, it was necessary to thicken CVDSiO ₂ to, for example, 5000 Å, making it difficult to increase the density of semiconductor devices.

[Purpose of the invention]

An object of the present invention is to provide a method for manufacturing a semiconductor device having a silicon oxide film with excellent insulation properties on the surface of a high melting point metal layer.

Another object of the present invention is to provide a method for manufacturing a semiconductor with fewer short circuits and disconnections.

Another object of the present invention is to provide a method for manufacturing a semiconductor device having a structure suitable for multilayer wiring.

Another object of the present invention is to provide a method for manufacturing a semiconductor device in which a silicon oxide film with excellent insulating properties is selectively formed only on the surface of a high melting point metal layer.

Another object of the present invention is to provide a method for manufacturing a semiconductor device including a high melting point metal layer with high yield.

[Structure of the invention]

In order to achieve the above object, a typical first aspect of the method for manufacturing a semiconductor device according to the present invention includes a step of forming a high melting point metal layer on a base body consisting of a substrate provided with an insulating layer; a step of forming a high melting point metal oxide layer on the surface of the melting point metal layer, a step of forming a silicon layer on the high melting point metal oxide layer, the high melting point metal, the high melting point metal oxide layer, and the silicon layer. The method is characterized in that it includes a step of heat-treating a substrate having a hydrogen-containing structure in an atmosphere containing hydrogen to form an internal silicon oxide film between the high melting point metal layer and the silicon layer. Furthermore, according to a second aspect of the manufacturing method, after forming a silicon layer on the high melting point metal oxide layer in the first aspect, the surface of this silicon layer is oxidized, and then the internal silicon oxide film forming step is performed. It is characterized by

〔Example〕

Hereinafter, the present invention will be explained in detail based on examples.

A high melting point metal layer 4 is formed on a substrate 1 consisting of a single crystal silicon substrate 2 and a silicon oxide film having a thickness of, for example, 400 .ANG. as an insulating layer 3 thereon to obtain the structure shown in FIG. 7-A. The material used for the high melting point metal layer 4 here must have low resistivity and high heat resistance, and the oxide of the material must be easily reduced by heat treatment in an atmosphere containing hydrogen. , for example, Mo, W, Ta, etc.
This embodiment will be described in detail below using Mo as an example. The high melting point metal layer 4 in FIG. 7-A is Mo with a thickness of about 3000 Å formed by electron beam evaporation.

Next, the surface of the high melting point metal layer 4 is oxidized to form a high melting point metal oxide layer 20 to obtain the structure shown in FIG. 7-B. Molybdenum dioxide (hereinafter referred to as " _MoO2 ") and molybdenum trioxide (hereinafter referred to as " _MoO3 ") are Mo oxides that are generally stably obtained when Mo is used as the high melting point metal layer 4.
MoO ₃ can be easily obtained by heat-treating Mo at a low temperature in an oxygen-containing atmosphere, but this MoO ₃ begins to sublimate at high temperatures of about 800°C or higher. For this reason, when MoO ₃ is used as the high melting point metal oxide layer 20, peeling of MoO ₃ may occur due to heat treatment in a later step, which is inconvenient. Therefore, as the high melting point metal oxide layer 20, it is necessary to use MoO ₂ , which has a high melting point of about 1900° C. and is stable at high temperatures. However, conventionally
It was not easy to form MoO ₂ on the Mo surface. As a result of various studies, we have discovered two methods of oxidizing Mo that can stably produce MoO ₂ on the Mo surface. The first method is to oxidize Mo at about 300℃ in an oxygen atmosphere to temporarily form MoO ₃ on the surface of Mo, and then oxidize it in an inert gas (e.g. nitrogen gas) at a temperature close to the sublimation point of MoO ₃ or below. Heat treated at a temperature higher than
This is a method of changing MoO ₃ to MoO ₂ and forming MoO ₂ on the surface of Mo. The second method uses trace amounts of oxygen (1.0
In this method, Mo is heat-treated at a temperature close to or higher than the sublimation point of MoO ₃ in an inert gas (e.g., nitrogen gas) atmosphere containing 20% or less) to form MoO ₂ on the Mo surface. Mo obtained by these two methods
It was confirmed by X-ray diffraction and electron beam diffraction that the Mo oxide on the surface was MoO ₂ . In this example, MoO ₂ that will become the high melting point metal oxide layer 20 was formed using the first method. An example is Mo
60 at a temperature of 300 °C in an oxygen atmosphere.
After heat treatment was performed for a minute to form MoO ₃ on Mo, heat treatment was performed at a temperature of 800° C. for 30 minutes in a nitrogen atmosphere to form MoO ₂ with a thickness of about 400 Å on the surface of Mo.

Figure 8 shows curves a, b, and c showing the relationship between the film thickness of MoO ₃ formed on Mo and the formation time.
are the dependence of the MoO ₃ film thickness on the formation time when the formation temperatures are 300°C, 320°C, and 350°C, respectively. As will be described later, the thickness of the internal silicon oxide film 5 to be formed depends on the thickness of MoO ₂ formed by converting MoO _3. Therefore, in order to control the thickness of the internal silicon oxide film 5, the thickness of this MoO ₃ can be adjusted. It is important to control accurately. FIG. 8 shows that if MoO ₃ is formed at a formation temperature of around 300° C., the film thickness of MoO ₃ can be precisely controlled.

Note that when comparing the two methods for forming MoO ₂ described above, the first method is superior in terms of controlling the film thickness of MoO ₂ and preventing oxygen from diffusing into Mo. When oxygen diffuses into Mo,
In the later step of forming an internal silicon oxide film, Mo increases in size and causes volume contraction, which is not very desirable.

Next, a silicon layer 6 is formed on the high melting point metal oxide layer 20 to obtain the structure shown in FIG. 7-C. The silicon layer 6 may be made of polySi or amorphous silicon. In this example, polySi was deposited using electron beam evaporation.
was formed to a thickness of 3500 Å. Then, in order to lower the resistance of this polySi, impurities such as As are added to the polySi.
It was added by ion implantation method. Other formation methods can be used to form the polySi used as the silicon layer 6, e.g.
A CVD method or the like may be used, and impurities may be added during formation. In addition, the impurity concentration of polySi is
Of course, it may be set as appropriate depending on the use of polySi.

Next, the high melting point metal oxide layer 2 is heat-treated in a hydrogen atmosphere or an inert gas (e.g. nitrogen gas) atmosphere containing hydrogen.
0 is reduced, and at the same time, the silicon layer 6 is oxidized from inside, that is, from the high melting point metal layer 4 side, to form an internal silicon oxide film 5 between the high melting point metal layer 4 and the silicon layer 6, resulting in the structure shown in FIG. 7-D. obtain. At this time, the internal silicon oxide film 5 is formed on the entire surface of the high melting point metal layer 4.
In this example, a heat treatment was performed at a temperature of 1000° C. for 60 minutes in a hydrogen atmosphere to reduce MoO ₂ to Mo, and at the same time, an internal silicon oxide film 5 was formed to a thickness of about 700 Å. In the above example, heat treatment is performed at 1000°C for 60 minutes, but the heat treatment conditions may be such that the silicon layer 6 is oxidized from the inside at the same time as the high melting point metal oxide layer is reduced, and the heat treatment at approximately 800°C is sufficient. It doesn't matter if it's temperature. It is also possible to turn the internal silicon oxide film 16 into phosphorus glass by adding phosphine (PH ₃ ) to the heat treatment atmosphere.

Changes in the structure before and after the above-mentioned internal silicon oxide film forming step will be explained based on the measurement results of Auger electron spectroscopy shown in FIG. 9A shows the structure before forming the internal silicon oxide film, that is, the structure shown in FIG. 7-C, and FIG. 9B shows the structure after forming the internal silicon oxide film, that is, the structure shown in FIG. The depth distribution of constituent elements in two directions is shown. The horizontal axis represents the time during which the sample was sputter etched, which corresponds to the depth from the surface of the silicon layer 6. a, b, and c are curves representing silicon, oxygen, and Mo, respectively. Figure 9A is on Mo
It clearly shows that MoO ₂ is formed and polySi is formed on MoO ₂ . Comparing Figure 9B with Figure 9A, the portion that was MoO ₂ was reduced to Mo, and an internal silicon oxide film of about 700 Å was formed from the vicinity of the interface between polySi and MoO ₂ toward the polySi surface. You can see how it is formed.
According to FIG. 9B, there is no oxygen in Mo, and in the above-mentioned internal silicon oxide film formation process, Mo does not contain oxygen.
This shows that Mo is not oxidized, and that no silicide is formed due to the reaction between Mo and silicon. Furthermore, from FIG. 9B, the interface between polySi and the internal silicon oxide film and the interface between the internal silicon oxide film and Mo both show very steep Auger electron distributions, so both interfaces are very homogeneous and uniform. It is assumed that it is formed in a similar manner. In this way, by heat-treating the structure shown in Figure 7-C in an atmosphere containing hydrogen,
The reason why the internal silicon oxide film 5 shown in FIG. -D is formed is considered to be as follows. That is, MoO ₂ is reduced by the following reaction, MoO ₂ +2H ₂ →Mo+2H ₂ O The H ₂ O generated at this time reduces the silicon layer 6.
It is considered that polySi is oxidized and an internal silicon oxide film 5 is formed. Like this MoO ₂
Since Mo serves as a H ₂ O supply source, an internal silicon oxide film 5 is formed on the entire surface of Mo. Further, the amount of hydrogen used as the heat treatment atmosphere may be sufficient as long as it is used in the above-mentioned reduction reaction. and occurs along with the above reduction reaction.
Note that the maximum thickness of the internal silicon oxide film 5 that can be formed is determined by the thickness of MoO ₂ , since the amount of H ₂ O is limited by the amount of oxygen constituting MoO ₂ . It is necessary to keep it.

Next, the quality of the internal silicon oxide film 5 formed in the internal silicon oxide film forming step described above was evaluated using various methods, and the results will be explained. First of all
When the composition of the internal silicon oxide film 5 was examined by XPS (X-ray photoelectron spectroscopy) measurement, the binding energy of the 2P electrons of silicon in this film was 103.3 eV, which was found to be higher than that of the 2P electrons of silicon in a normal silicon thermal oxide film. binding energy value
Since the values almost coincided with 103.4 eV, it was determined that the composition of the internal silicon oxide film 5 was similar to that of a normal silicon thermal oxide film. Next, the etching rate of the internal silicon oxide film 5 with dilute hydrofluoric acid (hydrofluoric acid:water = 3:100) is 120 Å/min, which is the etching rate of a normal silicon thermal oxide film with a similar solution.
It was almost equivalent to 109 Å/min. Next, a 500 μ square polySi-Al2 layer electrode was formed on the internal silicon oxide film 5, and the withstand voltage and leakage current of the internal silicon oxide film 5 were measured, and the withstand voltage was 10 ⁶ V/cm or more.
The leakage current was less than 10 ^-12 A, which is equivalent to that of a normal silicon thermal oxide film. From the above evaluation results, it was concluded that the film quality of the internal silicon oxide film is equivalent to that of a normal silicon thermal oxide film.

As is clear from the above evaluation results of the internal silicon oxide film 5, when the present invention is used, the high melting point metal layer 4
There is an advantage that an internal silicon oxide film 5 having good insulation properties can be easily formed on the surface of the substrate. Moreover, since the internal silicon oxide film 5 is formed using H ₂ O generated when reducing the high melting point metal oxide layer 20 evenly formed on the surface of the high melting point metal layer 4,
It is formed selectively and uniformly only on the surface of the high melting point metal layer. Therefore, unless a through hole is formed in the internal silicon oxide film 5, the silicon layer 6 and the high melting point metal layer 4 are extremely well insulated without being short-circuited. Furthermore, even if the high melting point metal layer 4 has a step, the internal silicon oxide film 5 does not overhang at the step, so the silicon layer 6 on the internal silicon oxide film 5 does not become disconnected. , an internal silicon oxide film 5 covering the side walls of the stepped portion
The thickness is approximately 700 Å, approximately 1/7 that of conventional CVDSiO ₂ .
Since only a few steps are required, it is possible to increase the density of the semiconductor device. Furthermore, in the internal silicon oxide film formation process, the conventional
The internal silicon oxide film 6 can be easily formed on the high melting point metal layer 4 without requiring complicated procedures and time to avoid the formation of MoO ₃ as in the case of forming CVDSiO ₂ on Mo.

In the method for manufacturing a semiconductor device described above,
Various modifications are possible. For example, as a first modification example, as shown in FIG. 10, a manufacturing method similar to that shown in FIG. By forming each layer in the following manner, the structure shown in FIG. 2 can be obtained. As a second modification, after obtaining the structure shown in FIG. 7-B, a through hole 8 is formed in a part of the high melting point metal oxide layer 20 using known lithography technology and etching technology. The structure shown in FIG. 3 can be realized by going through the steps of obtaining the structures shown in FIGS. 7-C and 7-D.
As a third modification, the structure shown in FIG. 4 can be realized by using the base body 1 having the structure shown in FIG. 11 and performing the same steps as in the second modification. As a fourth modification, after obtaining the structure shown in FIG. 7-A, the high melting point metal layer 4 is processed into a predetermined shape, for example, a rectangular cross-sectional shape as shown in FIG.
After obtaining the structure shown in Figure B, the 12th-B
12-C by the same steps as in FIG. 7-C, and then the first
The structure shown in Figure 2-D (same as in Figure 5) is obtained. As a fifth modification, after obtaining the structure shown in FIG. 12-D in the fourth modification, the silicon layer is processed into a predetermined shape to obtain the structure shown in FIG. 6. As a sixth modification, after processing the silicon layer 6 into a predetermined shape after FIG. 12-C in the fourth modification, the same steps as those for obtaining the structure shown in FIG. 12-D are performed. At the interface with the high melting point metal layer 4 covered with the silicon layer 6, the high melting point metal oxide layer 20 is reduced at the portion where the internal silicon oxide film 6 is not covered, resulting in a structure in which the high melting point metal layer is exposed. 4th and 5th above
In this modification, the internal silicon oxide film 5 is selectively formed only on the surface of the high melting point metal layer 4. In the sixth example, the internal silicon oxide film 5 is selectively formed only on the portion of the surface of the high melting point metal layer 4 that is covered with the silicon layer 6.

Further, in the above-mentioned example, polySi is considered to be used as is as wiring, electrodes, etc., but it goes without saying that polySi may be subjected to various processes depending on the purpose. For example, as shown in Figure 13
The insulating layer 40 may be formed by oxidizing all of the polySi, or a part of the polySi may be oxidized and the insulator 41 is used to isolate the polySi from each other, as shown in FIG. 15. The surface of the polySi may be oxidized to form an insulator 42, and then other layers may be formed on this insulator 42.

Furthermore, in the above example, all MoO ₂ is reduced when forming the internal silicon oxide film, but a portion of MoO ₂ is reduced and at the same time, the silicon layer 6 is oxidized to form the internal silicon oxide film 5. Good too.

In the case where there is no through hole in FIGS. 1, 2, and 4, in FIGS. As described above, since it has properties similar to those of a silicon thermal oxide film, such as dielectric strength, the present invention can realize good insulation properties and is suitable for multilayer wiring. Furthermore, even if the underlying layer has a step as shown in FIGS. 5 and 6, the internal silicon oxide film 5 is selectively and uniformly formed only on the surface of the high-melting point metal layer 4, as will be described later. Since a hang-like structure does not occur, short circuit between the high melting point metal layer 4 and silicon layer 6 and disconnection of the silicon layer 6 do not occur in such a structure. Further, when the high melting point metal layer 4 has a predetermined shape as shown in FIGS. 5 and 6, the inner silicon oxide film 5 on the side wall thereof can be made thinner, which is advantageous for increasing the density of the semiconductor device.

In addition, in the case of the structure shown in FIG. 6, only the insulating layer 3, a part of the internal silicon oxide film 5, and the silicon layer 6 are exposed to the surface, and each of these layers can withstand acid cleaning. It has the advantage of being easy to clean.

By the way, in the embodiment shown in FIGS. 7-A to 7-D, polySi used as the silicon layer 6 is
If it is thin (for example, about 1500Å), Mo and
It becomes difficult to form a somewhat thick internal silicon oxide film on the polySi interface. The reason for this is that the silicon layer 6
If it is too thin, it will be difficult to form an internal silicon oxide film.
This is thought to be because H ₂ O is dissipated to the outside through pinholes and grain boundaries in the silicon layer 6.
In order to solve this problem, after obtaining the structure shown in Figure 7-C, a silicon oxide film 50 is placed on the surface of the silicon layer.
After obtaining the structure shown in Fig. 16-A, which forms
The structure shown in FIG. 16-B can be obtained by performing the process for obtaining the structure shown in FIG. 16-B. Thereafter, this silicon oxide film 50 may be left for use or removed as required.

The results of Auger electron spectroscopy when the internal silicon oxide film 5 is formed using the structure shown in FIG. 16-A are compared with the case where the silicon oxide film 50 is not provided. PolySi having a thickness of 1100 Å was formed by beam evaporation, and the silicon oxide film 50 was formed by thermally oxidizing the silicon layer 6 to a thickness of 400 Å. FIG. 17A shows a case where the internal silicon oxide film is formed without providing the silicon oxide film 50, and FIG. 17B shows the silicon oxide film 50.
3 shows the depth distribution of constituent elements from the surface of the silicon layer 6 toward the substrate 2 when an internal silicon oxide film is formed by providing the following. If there is a silicon oxide film 50, from FIG. 17B, polySi and
It can be seen that a relatively thick internal silicon oxide film is formed between the polySi and the internal silicon oxide film, and that both the interface between the polySi and the internal silicon oxide film and the interface between the internal silicon oxide film and Mo are formed homogeneously and uniformly. Also
It has also been confirmed that even if the silicon oxide film 50 is formed by thermally oxidizing polySi, Mo is not oxidized.

On the other hand, as a countermeasure when the silicon layer 6 is thin, it is effective to make the surface of the silicon layer 6 amorphous or to cover the surface of the silicon layer ₆ with a dense film. silicon layer 6
Alternatively, the surface of the silicon layer 6 may be directly nitrided.

It goes without saying that the present invention is not limited to the embodiments described above, but can be applied in various ways. For example, from the structure in Figure 12-B to Figure 12-C
While obtaining the structure shown in the figure, a resist pattern 61 having an opening 60 for forming a contact hole is used in a part of the high melting point metal layer 4 as shown in Fig. 18-A, and as shown in Fig. 18-B. It is also possible to obtain the structure shown in FIG. 18-C by introducing a step of manufacturing a structure in which a contact hole 62 is formed in the insulating layer 3. A diffusion layer 63 may be provided in the substrate 2 if necessary. Further, a structure in which contact holes are provided on both sides of the high melting point metal layer can also be used.
In this case, there is an advantage that the high melting point metal layer 4 and the contact hole 62 are provided through the thin internal silicon oxide film 5 during self-alignment. In addition, although Mo was explained in the examples, it is sufficient for the present invention that the high melting point metal oxide can be reduced by heat treatment in an atmosphere containing hydrogen, and it is clear that most high melting point metals are applicable to the present invention. It is. Further, if the manufacturing process does not include a high-temperature step, a metal having the above-mentioned properties and having a lower melting point than the high-melting point metal may be used instead of the high-melting point metal layer.

〔Effect of the invention〕

As explained above, by using the present invention, it is possible to selectively and easily form an internal silicon oxide film of the same quality as a normal silicon thermal oxide film only on the surface of a high melting point metal layer. In connection with this, various other effects can be obtained as follows.

(1) The internal silicon oxide film has excellent insulating properties, making it easy to manufacture semiconductor devices with good insulating properties between the high-melting point metal layer and the silicon layer.

(2) Since the internal silicon oxide film is formed evenly and uniformly without overhanging, semiconductor devices with fewer short circuits and disconnections can be manufactured with high yield.

(3) A multilayer wiring structure can be easily realized by using the internal silicon oxide film as an interlayer insulating film and using the silicon layer and high melting point metal layer as wiring.

(4) Since the internal silicon oxide film has good insulating properties even if it is thin, the thickness of the insulating layer covering the side surfaces of the step portion can be reduced, and the density of the semiconductor device can be increased.

(5) When adopting a process in which the internal silicon oxide film or refractory metal oxide layer is exposed to the outside once during the manufacturing process, acid cleaning of the device becomes possible, which facilitates device cleaning and improves manufacturing yield. In addition, it is possible to reduce contamination of manufacturing equipment.

[Brief explanation of drawings]

1 to 6 are cross-sectional views of a device that can be implemented by the method of manufacturing a semiconductor device according to the present invention, and FIG. 7-A
7-D are cross-sectional views of a semiconductor device obtained in each step of the method for manufacturing a semiconductor device according to the present invention, FIG. 8 is a diagram showing the dependence of MoO ₃ film thickness on formation time, and FIGS. FIG. 17 is a diagram showing the depth distribution of constituent elements determined by Auger electron spectroscopy of a semiconductor device manufactured by the method according to the present invention, and FIGS.
FIG. 6 is a diagram for explaining various modifications of the method for manufacturing a semiconductor device according to the present invention. FIG. 18 is a diagram for explaining a method of manufacturing a semiconductor device according to another application example of the present invention. 1...Base body, 2...Substrate, 3...Insulating layer, 4...
... High melting point metal layer, 5 ... Internal silicon oxide film, 6
...Silicon layer, 7...Contact hole, 8...
...Through hole, 9...Insulating layer, 10...Conductive layer, 11...Through hole, 20...High melting point metal oxide layer, 40-42...Insulator, 50...Silicon oxide film, 60... ...Aperture for contact hole formation, 61...Resist pattern, 62...Contact hole.

Claims (1)

[Claims] 1. A step of forming a high melting point metal oxide layer on the surface of a high melting point metal layer provided on a substrate, and a step of forming a silicon layer on the high melting point metal oxide layer,
a step of heat-treating the substrate having the high melting point metal layer, the high melting point metal oxide layer, and the silicon layer in an atmosphere containing hydrogen to form an internal silicon oxide film between the high melting point metal layer and the silicon layer; A method for manufacturing a semiconductor device, comprising the steps of: 2. A step of forming a high melting point metal oxide layer on the surface of the high melting point metal layer provided on the substrate, and a step of forming a silicon layer on the high melting point metal oxide layer,
forming a silicon oxide film on the surface of the silicon layer; and heat-treating the substrate having the high melting point metal layer, the high melting point metal oxide layer, the silicon layer, and the silicon oxide film in an atmosphere containing hydrogen. A method for manufacturing a semiconductor device, comprising the step of forming an internal silicon oxide film between a high melting point metal layer and the silicon layer.