JPH021936A - Manufacture of bipolar semiconductor device - Google Patents

Abstract

PURPOSE:To form shallowly a base layer without generating a rediffused layer and to reduce the resistance of a base extraction electrode by a method wherein, after a masking material is removed to form a second insulating film on the whole surface, an opening is selectively formed in the second insulating film to form a one conductivity type emitter layer in the base layer. CONSTITUTION:An SiO2 film (a second insulating film) 22 is adhered on an upper surface by a CVD method. At this time, a remaining SiO2 film 22' is comprised in the film 22. Then, the film 22 is opened, a poly Si film is adhered by a CVD method, arsenic (As) ions are implanted in the poly Si film to form an As-doped poly Si film 23, this film 23 is patterned to make the film 23 remain only at an emitter formation region and collector contact electrode formation region, which are located in opening parts, and moreover, a heat treatment is performed at a temperature of 850 deg.C to demarcate an n<+> emitter layer 16. Then, an insulating film 24 is adhered by a CVD method, this film 24 is opened to form an emitter electrode 19 and a collector contact electrode 17 on the film 23 and a base electrode 18 is formed on a base extraction electrode 15 to complete a bipolar semiconductor device.

Description

[Detailed Description of the Invention] Summary] A method for manufacturing a base lead-out electrode type bipolar semiconductor device using a technique of simultaneously growing a single crystal silicon layer and a polycrystalline silicon layer. For the purpose of forming a shallow layer and lowering the resistance of the base extraction electrode, a first insulating film and a non-doped polycrystalline silicon film are formed on a semiconductor substrate of one conductivity type, and then a base layer forming region is formed. Next, a silicon film of a different conductivity type is grown on the entire surface including the base layer formation region, and a base layer made of a single crystal silicon film of a different conductivity type is grown on the base layer formation region, and on the non-doped polycrystalline silicon film. A step of forming a polycrystalline silicon film of different conductivity type, then selectively covering the base layer with a mask material,
A step of implanting impurity ions of a different conductivity type into the non-doped polycrystalline silicon film on the first insulating film to form a base extraction electrode film made of a polycrystalline silicon film of a different conductivity type, then removing the mask material, and further, The method is characterized in that it includes a step of forming a second insulating film over the entire surface and then selectively opening the second insulating film to form an emitter layer of one conductivity type in the base layer.

[Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and in particular, to a method for manufacturing a semiconductor device, in particular, a method for manufacturing a semiconductor device, in which a single crystal silicon layer and a polycrystalline silicon layer are grown simultaneously.
E G (Selective Poly-and
Epitaxial-silicon Growth)
The present invention relates to a method of manufacturing a base extraction electrode type bipolar semiconductor device using technology.

Recently, technology development has been progressing in the direction of miniaturizing and increasing the speed of semiconductor devices such as ICs and LSIs.Bipolar semiconductor devices have also developed base lead-out electrode structures, and miniaturization and higher density are progressing. It is being However, the manufacturing method requires further study to improve performance.

[Prior Art] Fig. 2 shows a cross-sectional view of a normal bipolar semiconductor device, in which 1 is a p-type silicon substrate, 2 is an n+ type buried layer, 3 is an n-type collector layer, and 4 is 5i02 (silicon oxide). 5 is a p-type base layer, 6 is an n-type field insulating film, and 5 is a p-type base layer.
In the +-type emitter layer, 7 is a collector contact electrode, 8 is a base electrode, and 9 is an emitter electrode.

Moreover, FIG. 3 shows a structural cross-sectional view of a conventional base extraction electrode type bipolar semiconductor device, and this example shows a structure of a single crystal silicon layer and a polycrystalline silicon layer among several types of base extraction electrode type bipolar semiconductor devices. Growing at the same time 5
1 is a structural cross-sectional view of a base extraction electrode type bipolar semiconductor device using PEG technology. In the figure, 11 is a p-type silicon substrate, 12 is an n+ type buried layer, 13 is an n-type collector layer,
14 is a p-type base layer, 15 is a base extraction electrode made of a doped polycrystalline silicon film, 16 is an n+ type emitter layer, 17 is a collector contact electrode, 18 is a base electrode, 19 is an emitter electrode, and 20 is another 5i02 film. be.

The structure produced by the manufacturing method using such 5PEG technology is very effective in forming a shallow base layer and increasing the speed compared to the normal structure shown in FIG.

FIGS. 4(a) to 4e+ show step-by-step sectional views of a conventional manufacturing method of a base-extended electrode type bipolar semiconductor device using the 5PEG technology, and an outline thereof will be explained step by step. Note that in this example, the base layer is formed shallowly, and
This invention relates to an improved manufacturing method for reducing the resistance of base extraction electrodes.

FIG. 4 (see al; an n-type collector layer 13 is epitaxially grown on a p-type silicon substrate 11 via an n+ type buried layer 12, and thermally oxidized on the n-type collector layer 13 to form a 5i0
A B-doped polycrystalline silicon film 15' containing boron (B) (thickness 300 nm, boron concentration 10/cn) was further layered thereon. The base layer formation region of the SiO2 film 21. It is formed.

Figure 4 (see bl; then, in a hydrogen atmosphere at 930°C 1
Heat treatment is performed for 5 minutes to remove the natural oxide film on the surface of the opened base layer formation region, and then doped silicon containing boron is deposited on the B-doped polycrystalline silicon film 15' including the opening. A film (thickness: 50-100 nm, impurity concentration: 10/cnt) is grown.

Then, a doped polycrystalline silicon film 15 is grown on the B-doped polycrystalline silicon film 15'', and a doped single-crystalline silicon film 14 is grown in the opening.

Refer to FIG. 4(C); Next, the doped silicon film is patterned using lithography technology to form a doped single crystal silicon film 14 that will become a p-type base layer and a doped polycrystalline silicon film that will become a base extraction electrode]5' The doped polycrystalline silicon film in other parts was etched away, leaving the +15 part, and then chemical vapor deposition (chemical vapor deposition) was performed on the top surface.
5i02 film 22 (film thickness 300 nm) by CVD) method
be coated with. Then, the doped polycrystalline silicon film 15'+15 which becomes the base extraction electrode has a film thickness of 350 to 40 mm.
It is possible to reduce the resistance by increasing the thickness to about 0nII+.

Refer to FIG. 4(d); Next, the emitter formation region and the collector contact formation region of the 5i02 film 22 are opened, a polycrystalline silicon film is deposited by the CVD method, and arsenic (As) ions are deposited on the polycrystalline silicon film. The As-doped polycrystalline silicon film 23 is implanted to remove the As-doped polycrystalline silicon film 23, and this is patterned so that the As-doped polycrystalline silicon film 23 remains only in the emitter formation region and the collector contact electrode formation region of the opening, and then at a temperature of 850°C. Heat treated with n+
A mold emitter layer 16 is defined. The emitter layer is formed by heat treatment while checking characteristics such as h.

FIG. 4 (see el; next, PSG (
An insulating film 24 such as a phosphosilicate glass film) or a 5i02 film is deposited, and this is opened to form a ^S-doped polycrystalline silicon film 23.
To the north of the emitter electrode 19. Collector contact electrode 17
Then, the base electrode 18 is formed on the base extraction electrode 15 to complete the process.

The above is an outline of the method for forming a base extraction electrode type bipolar semiconductor device to which the 5PEG technology is applied and in which the base extraction electrode is made thicker in order to lower the base resistance.

[Problems to be Solved by the Invention] By the way, in the above formation method, in order to operate at high speed, a thin base layer with a thickness of about 50 to 100 nm is grown;
In addition, the doped polycrystalline silicon film that becomes the base lead electrode is made thicker and its impurity concentration is increased to lower its resistance. In order to remove the natural oxide film on the surface, heat treatment is performed at 930°C for 315 minutes in a hydrogen atmosphere. Due to the heating, boron is released from the B-doped polycrystalline silicon film containing a high concentration of boron. Then, a doped silicon film containing boron (film thickness 50 to 100 nl11) is grown to form a base layer 14 and a doped polycrystalline silicon film 15. A re-diffusion layer is generated, and in extreme cases, the film thickness can reach 400 nm.Figure 5 shows the problems with the conventional method, and the figure shows only the base layer part enlarged. However, 14 in the figure
° is the re-diffusion layer, and the symbols of other parts are the same as in FIG. 4. In this case, the original purpose of increasing the speed of the base extraction electrode type structure, which is to form a shallow base layer, is lost, and a thick base layer is formed.

Therefore, the present invention provides a method for manufacturing a semiconductor device, which aims to solve these problems, form a shallow base layer without generating a re-diffusion layer, and reduce the resistance of the base lead-out electrode. This is what we propose.

[Means for Solving the Problem] The problem is to form a first S-cornered film and a non-doped polycrystalline silicon film on a conductivity type semiconductor substrate, and to form a first insulating film and a non-doped polycrystalline silicon film on a conductive type semiconductor substrate. A step of selectively removing and opening a base layer formation region, then growing a different conductivity type silicon film on the entire surface including the base layer formation region, and forming a different conductivity type single crystal silicon film in the base layer formation region. and forming a polycrystalline silicon film of a different conductivity type on the non-doped polycrystalline silicon film, then selectively covering the base layer with a mask material, a step of implanting impurity ions of different conductivity type into the non-doped polycrystalline silicon film on the insulating film through the polycrystalline silicon film of different conductivity type to form a base extraction electrode film made of polycrystalline silicon III of different conductivity type; , the step of removing the mask material, further forming a second insulating film on the entire surface, and then selectively opening the second insulating film to form an emitter layer of one conductivity type on the base layer. The problem is solved by a method for manufacturing a bipolar semiconductor device, which is characterized by:

[Operation 1] That is, in the present invention, a non-doped polycrystalline silicon film is deposited on an insulating film (first insulating film) in advance, and then a
A doped silicon film is grown using PEG technology to form a base layer and doped polycrystalline silicon. Next, the formed base layer is selectively covered with a mask material, and impurity ions are implanted into the non-doped polycrystalline silicon film. Thereafter, the mask material is removed, a second insulating film is covered, the second insulating film is opened, and an emitter layer is formed on the base layer.

In this way, re-diffusion from the polycrystalline silicon film into which impurities have been ion-implanted at a high concentration (the original non-doped polycrystalline silicon film) can be prevented, and the film thickness of the base extraction electrode can also be increased. The base resistance is lowered, and the base layer can be formed thinner, so that the operation speed can be increased.

[Example] Hereinafter, embodiments will be described in detail with reference to the drawings.

FIG. 1 (al-(gl) shows step-by-step cross-sectional views of the manufacturing method according to the present invention, which will be explained in order.

FIG. 1 (see al; as in the conventional case, a p-type silicon substrate 1
1, an n-type collector layer 13 (
(specific resistance of about 1Ωcm) is epitaxially grown, and its n
5i02 film 21 (film thickness 300
It is generated by thermally oxidizing nIII (first insulating film). This thermal oxidation is performed by heating to 1000° C. in wet oxygen. Next, monosilane (SiH4
) as a reaction gas at about 600° C. to deposit a non-doped polycrystalline silicon film 251 (thickness: 300 nm). Furthermore, the non-doped polycrystalline silicon film 25
The 5i02 film 21 is patterned using a lithography technique, and a base layer formation region is opened. The opening in the base layer forming region is made by etching the polycrystalline silicon film using a chlorine gas and etching the 5i02 film using a fluorine gas. Note that 12'' is an n++ collector contact region.

Refer to FIG. 1fb); Next, a doped silicon film (thickness: 50"lOOnm; impurity concentration: 5 to 10XIO/c++t) is grown on the 25° non-doped polycrystalline silicon film including the open base layer forming region. Then,
A doped polycrystalline silicon film 15 is grown on the non-doped polycrystalline silicon film 25°, and a doped single crystalline silicon film 14 (to become a base layer) is grown in the opening. This epitaxial growth method uses, for example, diborane (B2H6
A low-temperature decomposition method (substrate heating temperature of 540 to 600°C) is used to photodecompose disilane (Si28s) containing
This is because the base layer can be made shallower due to the smaller amount of on).

See FIG. 1(C); next, a resist film 31 is selectively coated on the base layer 14 portion. At this time, the resist film 31 is made wider than the base layer of the recess and is deposited on the convex portion including the side surfaces of the recess to a depth of about 0.3 μm. Next, boron ions are implanted into the non-doped polycrystalline silicon film 25'' through the doped polycrystalline silicon film 15 from above.The ion implantation conditions are a dose of 1.5×10 /
ctl and acceleration energy of about 50 KeV.

See Figure 1+d); Next, after removing the resist film 31, a thin 5i02
A 22° film (film thickness: 50 to 1OOnm) is coated by CVD, and then heat treated at 800 to 850°C for 40 to 120 minutes to activate boron ions, changing the non-doped polycrystalline silicon film to a doped polycrystalline silicon film. Make it 25.

Then, a doped polycrystalline silicon film 25 with a concentration of about 10''/cJ is formed, but at that time, boron also diffuses in the polycrystalline silicon film by about 0.3 μm in the lateral direction.
Boron also diffuses into the portion covered with the resist film 31. However, since the base layer 14 is a single crystal layer, it is difficult to diffuse, and the impurity concentration of the base layer 14 does not change.

FIG. 1 (see el; next, the 5i02 film 22'' and the doped polycrystalline silicon film 15+25 are patterned using lithography technology, and the doped single crystal silicon film 14, which will become the p-type base layer, and the doped polycrystalline silicon film 14, which will become the base extraction electrode. The crystalline silicon film 15+25 portion is left and the other portions of the doped polycrystalline silicon film IS, 25 are removed by etching.Next, 5i is etched on the north surface by CVD.
02 film 22 (film thickness: 300 nm; second insulating film) is deposited. At this time, the remaining 5i02 film 22'' is included in the 5i02 film.

See Figure 1(f); the rest is the same as the conventional method, and then SiO
2, a polycrystalline silicon film is deposited by CVD, and arsenic (8S) ions are implanted into the polycrystalline silicon film to form an S-doped polycrystalline silicon film 23.
This was patterned to leave the S-doped polycrystalline silicon film 23 only in the emitter formation region and collector contact electrode formation region of the opening, and
°CT: heat treatment to define n+ type emitter layer 16;

FIG. 1 (see g+; next, the insulating film 2 is formed by the CVD method.
4 is deposited, and this is opened to form an emitter electrode 19.4 on the As-doped polycrystalline silicon film 23. A collector contact electrode 17 is formed, and a base electrode 18 is formed on the base extraction electrode 15 to complete the process.

The above is the manufacturing method according to the present invention, and according to such a manufacturing method, re-diffusion from the doped polycrystalline silicon film 25 into which impurity ions are implanted at a high concentration is suppressed.

In addition, by adjusting the thickness of the doped silicon film, the base layer can be controlled to be thin, and the base extraction electrode can be made thick and highly concentrated, which reduces the resistance of the base extraction electrode and increases the frequency. Its characteristics have been improved and it can operate at high speed.

[Effects of the Invention] As is clear from the description of the embodiments above, the manufacturing method according to the present invention reduces the base resistance of the base lead-out electrode type semiconductor device, improves the frequency characteristics, and enables high-speed operation. This significantly contributes to improving performance such as

[Brief explanation of the drawing]

1 (al to (gl) are cross-sectional views in the order of steps of the manufacturing method according to the present invention; FIG. 2 is a cross-sectional view of a normal bipolar 14-body device; FIG. 3 is a cross-sectional view of a base extraction electrode type semiconductor device; Figure 4 (a
1-(e) are cross-sectional views in the order of steps of the conventional manufacturing method, and FIG. 5 is a diagram showing the problems of the conventional method. In the figure, 11 is a p-type silicon substrate, 12 is an n+ type buried layer, 13 is an n-type collector layer, 14 is a p-type base layer, 15 is a base protruding electrode made of a doped polycrystalline silicon film, and 16 is an n+ type emitter. 17 is a collector contact electrode, 18 is a pace electrode, 19 is an emitter electrode, 21 is a 5i02 film (first insulating film), 22 is a 5i02 film (second insulating film), 23 is an As-doped polycrystalline silicon film , 24 is a thread-colored edge film, 25 is a base extraction electrode made of a doped polycrystalline silicon film, and 25'' is a non-doped polycrystalline silicon film. 'y-bye-7--fu-thousand-sip'l
qt ke face Figure 3 4 Shiso θ Month f: Sword autopsy coffin Hz, Yi-Kinichiko J to 17 Utf
r-view Figure 1 ("fQ2) Figure

Claims (1)

[Claims] A first insulating film and a non-doped polycrystalline silicon film are formed on a semiconductor substrate of one conductivity type, and the first insulating film and non-doped polycrystalline silicon film are selectively removed to form a base layer. a step of opening a region, then growing a silicon film of a different conductivity type on the entire surface including the base layer formation region, and forming a base layer made of a single crystal silicon film of a different conductivity type in the base layer formation region; , forming a polycrystalline silicon film of a different conductivity type on the non-doped polycrystalline silicon film; then, selectively covering the base layer with a mask material, and forming a polycrystalline silicon film of a different conductivity type on the non-doped polycrystalline silicon film; a step of implanting impurity ions of a different conductivity type into a silicon film through the polycrystalline silicon film of a different conductivity type to form a base extraction electrode film made of the polycrystalline silicon film of a different conductivity type; then, removing the mask material; , further comprising the step of forming a second insulating film over the entire surface and then selectively opening the second insulating film to form an emitter layer of one conductivity type in the base layer. A method for manufacturing a bipolar semiconductor device.