JPH05190848A - Manufacture of mosfet - Google Patents

Abstract

PURPOSE:To form a source-drain diffusion layer only at a desired place without an impurity being diffused to the inner part under a gate electrode. CONSTITUTION:In the manufacture of MOSFET, a point defect region 26 is formed beforehand at a place, into which an impurity is desired to be introduced, by the implantation of electrically inert Si ion through thermal diffusion method and the impurity is anisotropically diffused by the speed-increasing diffusion through this point defect region 26 so that a source-drain diffusion layer 27 is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention utilizes a crystal point defect to enable anisotropic diffusion of impurities.
T (MOS Field Effect Transi
The present invention relates to a thermal diffusion method of a (ster) to a diffusion layer.

[0002]

2. Description of the Related Art Conventionally, as a technique in such a field,
For example, “MOS LSI manufacturing technology” edited by Shiba Tokuyama, Tetsuichi Hashimoto P. Nikkei Tuna Hill Co. 30 were listed. Here, according to the thermal diffusion method, which is a method of introducing impurities into a silicon (Si) substrate, as shown in FIG.
Impurities are removed from the diffusion source 3 containing vapor phase, solid phase or liquid phase impurities on the mask 2 on the surface of the i substrate 1 by thermal diffusion.
It was introduced into the i substrate 1 to form the impurity diffusion layer 4.

[0003]

However, according to the thermal diffusion method described above, the impurities are isotropically diffused into the Si substrate from the diffusion source on the surface of the substrate, as shown in FIG. When used for forming the source / drain diffusion layer 15 of the MOSFET, there is a problem in that the impurities diffuse into the bottom of the gate electrode 13 and deteriorate the electrical characteristics of the transistor. In FIG. 3, 1
Reference numeral 1 is a Si substrate, 12 is a gate oxide film, and 14 is a solid phase diffusion source.

In the conventional thermal diffusion method described above, the present invention isotropically diffuses impurities from the diffusion source, and
When this method is used to form the source / drain diffusion layers of the SFET, the impurities diffuse even deep inside the gate electrode,
In order to eliminate the problem of deteriorating the electrical characteristics of the transistor, a crystal point defect having an effect of anisotropically accelerating the impurity diffusion is previously formed at a portion where the impurity is to be diffused.
It is formed by the implantation of electrically inactive ions, and the impurities are anisotropically diffused by accelerated diffusion due to this point defect,
It is an object of the present invention to provide a method for manufacturing a MOSFET having excellent electrical characteristics by forming a source / drain diffusion layer so that impurities do not diffuse under a transistor gate electrode.

[0005]

In order to achieve the above object, the present invention provides a method of forming a crystal point defect only in a portion intended to diffuse an impurity, which is intended as a drain / source region, in a method of manufacturing a MOSFET. And a step of diffusing the impurities only in a desired region by anisotropically diffusing the impurities due to the crystal point defects.

[0006]

According to the present invention, as described above, the MOSFET
In the manufacturing method of 1, the crystal point defect is formed in advance at the point where the impurity is to be introduced by the implantation of the electrically inactive ion by the thermal diffusion method, and the impurity is anisotropically increased by the accelerated diffusion by the crystal point defect. The impurities are diffused only in desired portions.

Therefore, the source / drain diffusion layer can be formed without the impurities diffusing deep under the gate electrode.

[0008]

Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 is an MO showing an embodiment of the present invention.
It is a manufacturing-process sectional drawing of SFET. First, as shown in FIG. 1A, an N-type silicon substrate 21 is formed by a normal process.
A field oxide film 22, a gate oxide film 23, and a low resistance polycrystalline silicon gate electrode 24 are formed on the surface.

Thereafter, as shown in FIG. 1B, a coating glass containing boron is deposited as a boron diffusion source film 25. Then, as shown in FIG. 1C, Si ⁺ is implanted with an energy of 40 KeV and a dose of 1 × 10 ¹³ cm ⁻² . Then, as shown in FIG. 1D, point defect regions 26 having a density of 1 × 10 ¹⁸ cm ⁻³ can be formed in the region from the substrate surface to a depth of 100 nm.

Next, as shown in FIG.
A heat treatment at 30 ° C. for 30 minutes is performed in a nitrogen atmosphere to anisotropically diffuse B to the substrate side to form the source / drain diffusion layer 27. As described above, the source / drain diffusion layer 27
After forming the, as shown in FIG.
Depending on the LSI manufacturing process, the interlayer insulating film 28, the Al electrode 2
9 is formed, and the manufacturing of the P-channel MOSFET is completed.

The present invention is not limited to the above-mentioned embodiments, but various modifications can be made within the scope of the present invention, and these modifications are not excluded from the scope of the present invention.

[0012]

As described above in detail, according to the present invention, it is possible to anisotropically diffuse an impurity from a diffusion source, and when the MOSFET source / drain diffusion layer is formed, the impurity is not The source / drain diffused layer can be formed anisotropically without diffusing deep under the electrode, and a MOSFET having excellent electrical characteristics can be manufactured.

[Brief description of drawings]

FIG. 1 is a sectional view of a MOSFET manufacturing process showing an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a conventional thermal diffusion method for a diffusion layer.

FIG. 3 is a cross-sectional view showing a thermal diffusion method for a diffusion layer of a conventional MOSFET.

[Explanation of reference numerals] 21 N-type silicon substrate 22 Field oxide film 23 Gate oxide film 24 Low resistance polycrystalline silicon gate electrode 25 Boron diffusion source film 26 Point defect region 27 Source / drain diffusion layer 28 Interlayer insulation film 29 Al electrode

Claims (2)

[Claims] 1. A process of forming a crystal point defect only in a region of a drain / source region where an impurity is desired to be diffused, and (b) Anisotropic diffusion of impurities due to the crystal point defect. And a step of diffusing the impurities only in a desired region according to the method. 2. The method of manufacturing a MOSFET according to claim 1, wherein the crystal point defects are formed by implanting electrically inactive ions.