JPH02196476A - Led print head - Google Patents
Led print headInfo
- Publication number
- JPH02196476A JPH02196476A JP1015815A JP1581589A JPH02196476A JP H02196476 A JPH02196476 A JP H02196476A JP 1015815 A JP1015815 A JP 1015815A JP 1581589 A JP1581589 A JP 1581589A JP H02196476 A JPH02196476 A JP H02196476A
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- led chip
- substrate
- led
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Wire Bonding (AREA)
- Led Device Packages (AREA)
- Led Devices (AREA)
- Dot-Matrix Printers And Others (AREA)
- Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は静電記録に用いるＬＥＤプリントヘッドに関す
るものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an LED printhead for use in electrostatic recording.
（従来の技術）
ＬＥＤプリントヘッドでは、直線状に配列された複数の
発光素子を備えたＬＥＤチップを、各ＬＥＤチップの発
光素子が一直線状に並ぶように基板上に配置されている
。(Prior Art) In an LED print head, LED chips each having a plurality of linearly arranged light emitting elements are arranged on a substrate so that the light emitting elements of each LED chip are aligned in a straight line.
ＬＥＤチップは発光面に個別電極が設けられ、反対側に
ある裏面に共通電極が設けられた構造をしている。The LED chip has a structure in which individual electrodes are provided on the light emitting surface and a common electrode is provided on the opposite back surface.
第７図に示されるように、ＬＥＤチップ２はセラミック
やアルミニウムなどの不透明な基板４上に９発光面を基
板４と反対側に向けて、ＬＥＤチップ２の裏面にある共
通電極が導電性接着剤６によって基板４の共通電極８と
接続され、発光面の個別電極と基板４の個別引出し電極
１０の間はワイヤ１２によって接続が施される。As shown in FIG. 7, the LED chip 2 is placed on an opaque substrate 4 made of ceramic or aluminum, with the light-emitting surface facing away from the substrate 4, and the common electrode on the back side of the LED chip 2 is attached with conductive adhesive. It is connected to the common electrode 8 of the substrate 4 by the agent 6, and the connection is made between the individual electrodes on the light emitting surface and the individual lead-out electrodes 10 of the substrate 4 by wires 12.
（発明が解決しようとする課題）
ＬＥＤチップ２をワイヤボンディング法により基板４に
実装する場合、Ｌ Ｅ Ｄチップ２を基板４１に取りつ
ける際の位置決め精度が低く、したがってＬＥＤプリン
トヘッドとして書き込みむらが発生する。(Problem to be Solved by the Invention) When the LED chip 2 is mounted on the substrate 4 by the wire bonding method, the positioning accuracy when attaching the LED chip 2 to the substrate 41 is low, and therefore uneven writing occurs as an LED print head. do.
ＩＣチップを位置決め精度よく実装する方法として、フ
リップチップ法によるフェイスダウンボンディングのセ
ルフアライメント機能を利用する方法がある。ＬＥＤプ
リントヘッドにフリップチップ法を用いてＬＥＤチップ
２を取りつけようとすると、フェイスダウン実装におい
ては、通常は全ての電極をチップ表面、ＬＥＤチップ２
では発光面、に集めることが必要である。もし１個別電
極のみならず共通電極も発光面に形成するとすれば、第
８図及び第９図に示されるように、ＬＥＤチップ１４の
個別電極パッド１６、共通電極パッド１８が発売部２０
のある発光面に形成されることになり、発光面での接続
パッド数が増えてチップサイズが大きくなる欠点がある
。なお、第８図はＬＥＤチップ１４の主要部の断面構造
を示しており、２４はＧａＡｓ、２６はＧａＡｓ、、、
Ｐｏ、、。One method for mounting IC chips with high positioning accuracy is to utilize the self-alignment function of face-down bonding using the flip-chip method. When trying to attach LED chip 2 to an LED print head using the flip-chip method, in face-down mounting, all electrodes are usually connected to the chip surface, and LED chip 2
Then, it is necessary to collect the light on the light emitting surface. If not only one individual electrode but also a common electrode is formed on the light emitting surface, as shown in FIGS. 8 and 9, the individual electrode pad 16 and the common electrode pad 18 of the LED chip 14 are
This has the disadvantage that the number of connection pads on the light emitting surface increases and the chip size increases. Note that FIG. 8 shows the cross-sectional structure of the main parts of the LED chip 14, where 24 is GaAs, 26 is GaAs, etc.
Po...
２８はＺｎ拡散領域、３０．３２は絶縁層である。28 is a Zn diffusion region, and 30.32 is an insulating layer.
本発明は、発光面には個別電極パッドをもち、共通電極
を反対側の裏面にもつＬＥＤチップを、位置決め精度の
高いフリップチップ法によるフェイスダウンボンディン
グにより実装することによって、上記の課題を解決する
ことを目的とするものである。The present invention solves the above problems by mounting an LED chip that has individual electrode pads on the light emitting surface and a common electrode on the opposite back surface by face-down bonding using the flip-chip method with high positioning accuracy. The purpose is to
（課題を解決するための手段）
本発明では、基板として表面に配線が形成された透明基
板を用いる。ＬＥＤチップの発光面が基板表面と対向す
るように、ＬＥＤチップを半田バンプを用いたフリップ
チップ法によりフェイスダウン法で実装し、ＬＥＤチッ
プ裏面の共通電極には導電性接着剤により電気的に単一
の引出し電極部材を接続し、ＬＥＤチップ発光面からの
光出力を透明基板を通して取り出す。(Means for Solving the Problems) In the present invention, a transparent substrate on which wiring is formed is used as the substrate. The LED chip was mounted face-down using the flip-chip method using solder bumps so that the light-emitting surface of the LED chip faced the surface of the substrate, and the common electrode on the back of the LED chip was electrically isolated using conductive adhesive. One extraction electrode member is connected, and light output from the light emitting surface of the LED chip is extracted through the transparent substrate.
（作用）
ＬＥＤチップ発光面にある個別電極はフリップチップ法
によって透明基板表面の配線と接続され。(Function) The individual electrodes on the light emitting surface of the LED chip are connected to the wiring on the surface of the transparent substrate by the flip chip method.
ＬＥＤチップ裏面の共通電極は引出し電極部材によって
透明基板表面の配線と接続される。ＬＥＤチップ発光面
が透明基板表面と対向するので、発光素子からの光は透
明基板を通して取り出される。The common electrode on the back surface of the LED chip is connected to the wiring on the surface of the transparent substrate by an extraction electrode member. Since the light emitting surface of the LED chip faces the surface of the transparent substrate, light from the light emitting element is extracted through the transparent substrate.
（実施例）
第１図は一実施例を発光素子配列方向と直交する方向に
切断した断面図、第２図は発光素子配列方向に沿って切
断した断面図、第３図は一実施例で用いられるＬＥＤチ
ップの主要部の断面図、第４図は同ＬＥＤチップの発光
面を表わす平面図である。(Example) Fig. 1 is a cross-sectional view of an example taken in a direction perpendicular to the light emitting element arrangement direction, Fig. 2 is a sectional view taken along the light emitting element arrangement direction, and Fig. 3 is a cross-sectional view of an example. FIG. 4 is a cross-sectional view of the main part of the LED chip used, and a plan view showing the light emitting surface of the LED chip.
４０は透明基板であり、例えば硼珪酸ガラスを用いる。40 is a transparent substrate made of, for example, borosilicate glass.
基板４０の表面には必要な配線電極パターン４１が厚膜
金属層又は薄膜金属層を写真製版とエツチングによって
パターン化することにより形成されている。配線電極材
料としては、厚膜の場合は金電極がエツチング精度の点
から望ましく、簿膜の場合はＡＱ又はＮ ｉ Ｃｒ ／
Ａ ｕやＣｒ／ＣＵなどの積層構造のものが基板ガラ
スとの密着性の面から望ましい、配線電極パターン４１
は、外部との電気接続を行なう部分、実装されるＬＥＤ
チップ４２やそれを駆動する駆動用ＩＣチップ４３のボ
ンディング接続を行なう電極パッド部分、ＬＥＤチップ
４２の裏面の共通電極と接続される引出し電極部材６０
と基板４０との接続部分、及び出力された光が収束性ロ
ンドレンズ（セルフォックレンズ）４５へ入射する経路
にあたる部分を除いて、絶縁膜４９によって被覆されて
いる。絶縁膜４９による被覆は、フェイスダウンボンデ
ィングに用いる半田バンプがリフロー接続時に基板パッ
ド部以外の電極部へ流出したり、短絡するのを防ぐため
と、電極材の腐食を防ぐためである。A necessary wiring electrode pattern 41 is formed on the surface of the substrate 40 by patterning a thick metal layer or a thin metal layer by photolithography and etching. As the wiring electrode material, in the case of a thick film, a gold electrode is preferable from the viewpoint of etching accuracy, and in the case of a thin film, AQ or N i Cr /
The wiring electrode pattern 41 is preferably one with a laminated structure such as Au or Cr/CU from the viewpoint of adhesion to the substrate glass.
is the part that makes electrical connection with the outside, the mounted LED
An electrode pad portion for bonding the chip 42 and the driving IC chip 43 that drives it, and a lead electrode member 60 connected to the common electrode on the back surface of the LED chip 42.
It is covered with an insulating film 49 except for the connecting portion between the lens and the substrate 40 and the portion corresponding to the path through which the output light enters the converging Rondo lens (Selfoc lens) 45 . The purpose of the covering with the insulating film 49 is to prevent solder bumps used in face-down bonding from flowing out to electrode parts other than the substrate pad part or short-circuiting during reflow connection, and to prevent corrosion of the electrode material.
また、絶縁膜４９の開口部の電極４１には半田バンプに
よる電極の溶食を防止するために、Ｎｉ。Further, the electrode 41 in the opening of the insulating film 49 is coated with Ni in order to prevent the electrode from being eroded by solder bumps.
Ｃｕなどをメツキ法により形成し、ついでボンディング
時の半田濡れ性向上のためにＡｕ、Ｐｔなどがメツキ法
により形成されている。Cu or the like is formed by a plating method, and then Au, Pt, etc. are formed by a plating method to improve solder wettability during bonding.
４２はＬＥＤチップであり、ＬＥＤチップ４２の発光面
には発光部４４と個別電極パッド４６が形成されており
、個別電極パッド４６には半田バンプ４７が形成される
。ＬＥＤチップ４２は発光面が基板４０側を向くように
配置され、フリップチップ法でフェイスダウンボンディ
ングされている。発光部４４は第１図においては紙面垂
直方向の一直線上に配列され、第２図においては面内方
向の一直線上に配列されるように、ＬＥＤチップ４２が
基板４０上で位置決めされている。４４はＬＥＤチップ
４２を坊区動するためのＩＣチップであり、ＩＣチップ
４４もフリップチップ法によりフェイスダウンボンディ
ングされている。Reference numeral 42 denotes an LED chip, and a light emitting portion 44 and individual electrode pads 46 are formed on the light emitting surface of the LED chip 42, and solder bumps 47 are formed on the individual electrode pads 46. The LED chip 42 is arranged so that its light-emitting surface faces the substrate 40 side, and is face-down bonded using a flip-chip method. The LED chips 42 are positioned on the substrate 40 so that the light emitting parts 44 are arranged in a straight line in the direction perpendicular to the paper in FIG. 1, and in a straight line in the in-plane direction in FIG. 44 is an IC chip for moving the LED chip 42, and the IC chip 44 is also face-down bonded by the flip-chip method.
ＬＥＤチップ４２においては、その裏面、すなわち発光
面と反対側の面には共通電極５２が形成されている。Ｌ
ＥＤチップ４２の断面構造は、例えば第３図に示される
ものである。４８はＧａＡ３層、５０はＧ ａ Ａ ５
０．＆ ＰＧ−４Ｎ、５１はＺｎ拡散領域であり１個別
電極４６がＺｎ拡散領域５２と接続されている。、裏面
には共通電極５２が形成されている。５４．５６は絶縁
層である。個別電極４６としては例えばアルミニウム層
が用いられ。A common electrode 52 is formed on the back surface of the LED chip 42, that is, the surface opposite to the light emitting surface. L
The cross-sectional structure of the ED chip 42 is shown in FIG. 3, for example. 48 is GaA 3 layer, 50 is GaA 5
0. & PG-4N, 51 is a Zn diffusion region, and one individual electrode 46 is connected to the Zn diffusion region 52. , a common electrode 52 is formed on the back surface. 54 and 56 are insulating layers. For example, an aluminum layer is used as the individual electrode 46.
共通電極５２としては例えばＡｕ−Ｇｅ−ＮｉＩｇが用
いられる。For example, Au-Ge-NiIg is used as the common electrode 52.
基板４ｏ上に実装されたＬＥＤチップ４２の裏面には、
導電性接着剤５８によって引出し電極部材６０が全ての
ＬＥＤチップ４２の共通電極と接続され、引出し電極部
材６０はまた。基板４０上の共通電極部分にも導電性接
着剤５８によって接着されている。導電性接着剤５８と
しては例えばＡｕ系もしくはＡｇ系のエポキシ樹脂を用
いることができる。導電性接着剤５８と引出し電極部材
６０によって、ＬＥＤチップ４２は基板４０の配線電極
４１と電気的及び熱的に良好な接続がなされる。引出し
電極部材６０は引出し共通電極であるとともに、放熱用
のヒートシンクともなっている。On the back side of the LED chip 42 mounted on the board 4o,
The conductive adhesive 58 connects the extraction electrode member 60 to the common electrode of all the LED chips 42, and the extraction electrode member 60 also connects with the common electrode of all the LED chips 42. It is also bonded to the common electrode portion on the substrate 40 with a conductive adhesive 58. As the conductive adhesive 58, for example, Au-based or Ag-based epoxy resin can be used. The LED chip 42 is electrically and thermally well connected to the wiring electrode 41 of the substrate 40 by the conductive adhesive 58 and the extraction electrode member 60. The extraction electrode member 60 serves as an extraction common electrode as well as a heat sink for heat radiation.
ＬＥＤチップ４２の発光部４４から出力される光６２は
、収束性ロッドレンズ４５によって感光ドラム６４の表
面に集光される。Light 62 output from the light emitting section 44 of the LED chip 42 is focused onto the surface of the photosensitive drum 64 by the convergent rod lens 45 .
ＬＥＤチップ４２は、それ自身が動作中に発熱する。Ｌ
ＥＤチップの発光効率は、第５図に示されるように、昇
温によって低下する。そのため。The LED chip 42 itself generates heat during operation. L
As shown in FIG. 5, the luminous efficiency of the ED chip decreases as the temperature increases. Therefore.
ＬＥＤチップ４２の昇温防止を目的として、従来のワイ
ヤボンディング法による実装法では、基板としてセラミ
ックやアルミニウムなどの熱伝導率の大きい、すなわち
放熱性のよい材料が用いられてきた。しかしながら、本
実施例では基板４０として光学的に透明なガラス基板を
用いている。ガラスは比較的熱伝導性が悪く、基板以外
の放熱手段が必要である。上記の実施例では引出し電極
部材６０がその放熱手段となっている。In order to prevent the temperature of the LED chip 42 from rising, conventional mounting methods using wire bonding have used materials with high thermal conductivity, such as ceramic and aluminum, that have good heat dissipation properties as the substrate. However, in this embodiment, an optically transparent glass substrate is used as the substrate 40. Glass has relatively poor thermal conductivity and requires heat dissipation means other than the substrate. In the above embodiment, the extraction electrode member 60 serves as the heat dissipation means.
実施例においては、ＬＥＤチップ４２の裏面に板状の引
出し電極部材６０を接着しているので、引出し電極部材
６０と基板４０との熱膨張係数の差が大きければプリン
トヘッド自体に反りが発生したり、ＬＥＤチップ４２の
接続部又はＬＥＤチップ４２自体が応力によって破壊す
ることがある。In the embodiment, since the plate-shaped extraction electrode member 60 is bonded to the back surface of the LED chip 42, if the difference in thermal expansion coefficient between the extraction electrode member 60 and the substrate 40 is large, warping will occur in the print head itself. Alternatively, the connecting portion of the LED chip 42 or the LED chip 42 itself may be destroyed by stress.
そこで、好ましくは、ＬＥＤチップ４０と引出し電極部
材６０の熱膨張係数を等しくすることである。そこで、
好ましい例としては、引出し電極部材６０の材質として
ブラッド材を用いる。例えば、基板４０として一般的な
透明がラスであるコーニング７０５９を用いるとすれば
、引出し電極部材６ｏとしてＣｕ／インバース／ Ｃｕ
の積層ブラッド材で、厚さの比が２：１５：２であるも
のを用いると、引出し電極部材６０と基板４０の熱膨張
係数がともに４．６ Ｘ １０−’／ｄｅｇとなり、好
都合である。このように、基板４０と引出し電極部材６
０の熱膨張率の差がなくなれば、バイメタル効果による
反りやＬＥＤチップ４２の破壊を防ぐことができる。Therefore, it is preferable that the LED chip 40 and the extraction electrode member 60 have the same coefficient of thermal expansion. Therefore,
As a preferable example, a brad material is used as the material of the extraction electrode member 60. For example, if Corning 7059, which is a general transparent lath, is used as the substrate 40, Cu/inverse/Cu is used as the extraction electrode member 6o.
When a laminated brad material with a thickness ratio of 2:15:2 is used, the thermal expansion coefficients of both the extraction electrode member 60 and the substrate 40 are 4.6 x 10-'/deg, which is convenient. . In this way, the substrate 40 and the extraction electrode member 6
If the difference in coefficient of thermal expansion of 0 is eliminated, warping due to the bimetal effect and destruction of the LED chip 42 can be prevented.
第６図はＬＥＤチップ４２の放熱特性をさらに改良した
実施例を表わしている。FIG. 6 shows an embodiment in which the heat dissipation characteristics of the LED chip 42 are further improved.
ＬＥＤチップ４２の裏面に導電性接着剤５８によって引
出しｆ！！極部材６０が接着されており、さらに外枠６
６にヒートシンク材６８を設け、引出し電極部材６０と
ヒートシンク材６８を密着させることにより、ＬＥＤチ
ップ４２の放熱を一層効率良く行なうことができる。A drawer f! is attached to the back surface of the LED chip 42 using a conductive adhesive 58. ! A pole member 60 is bonded to the outer frame 6.
By providing a heat sink material 68 at 6 and bringing the extraction electrode member 60 and the heat sink material 68 into close contact, heat dissipation from the LED chip 42 can be performed more efficiently.
（発明の効果）
本発明では、ＬＥＤチップを、半田バンプを用いたフリ
ップチップ法によりフェイスダウンホンディングするこ
とにより、位置決め制度がよくなって書き込みむらがな
くなる。(Effects of the Invention) In the present invention, by face-down bonding the LED chip by the flip-chip method using solder bumps, the positioning accuracy is improved and uneven writing is eliminated.
また、ＬＥＤチップの発光面と反対側の面に共通電極を
設けて引出し電極部材と接続することによって、発光面
に共通電極を設けなくてもすみ、その結果、チップサイ
ズが増大するのを防ぎ、コスト高になることを防ぐこと
ができる。In addition, by providing a common electrode on the surface opposite to the light emitting surface of the LED chip and connecting it to the extraction electrode member, it is not necessary to provide a common electrode on the light emitting surface, thereby preventing the chip size from increasing. , it is possible to prevent high costs.
第１図は一実施例を発光素子配列方向と直交する方向に
切断した断面図、第２図は同実施例を発光素子配列方向
に沿って切断した断面図、第３図は一実施例で用いられ
るＬＥＤチップの主要部を示す断面図、第４図は同ＬＥ
Ｄチップの発光面を示す平面図、第５図はＬＥＤチップ
の発光出力と温度の関係を示す図、第６図は他の実施例
を発光素子配列方向と直交する方向で切断した断面図、
第７図は従来のワイヤボンディング法により実装された
ＬＥＤチップを示す断面図、第８図はフリップチップ実
装を想定した場合に考えられるＬＥＤチップの主要部を
示す断面図、第９図は同ＬＥＤチップの発光面を示す平
面図である。
４０・・・・・・透明ガラス基板、４１・・・・・・配
線電極、４２・・・・・・ＬＥＤチップ、４３・・・・
・・駆動用ＩＣチップ、４４・・・・・・発光部、４６
・・・・・・個別電極パッド、５２・・・・・・共通電
極、５８・・・・・・導電性接着剤、６０・・・・・・
引出し電極部材、６６・・・・・・外枠、６８・・・・
・・ヒートシンク。
特許出瀕人 株式会社リコーFig. 1 is a cross-sectional view of one embodiment taken in a direction perpendicular to the light emitting element arrangement direction, Fig. 2 is a cross sectional view of the same embodiment taken along the light emitting element arrangement direction, and Fig. 3 is a cross sectional view of one embodiment. A cross-sectional view showing the main parts of the LED chip used, Figure 4 is the same LE
FIG. 5 is a plan view showing the light emitting surface of the D chip, FIG. 5 is a diagram showing the relationship between the light emitting output of the LED chip and temperature, and FIG. 6 is a cross-sectional view of another embodiment taken in a direction perpendicular to the direction in which the light emitting elements are arranged.
Fig. 7 is a cross-sectional view showing an LED chip mounted using the conventional wire bonding method, Fig. 8 is a cross-sectional view showing the main parts of the LED chip when flip-chip mounting is assumed, and Fig. 9 is a cross-sectional view of the LED chip mounted using the conventional wire bonding method. FIG. 3 is a plan view showing the light emitting surface of the chip. 40...Transparent glass substrate, 41...Wiring electrode, 42...LED chip, 43...
...Drive IC chip, 44... Light emitting part, 46
...Individual electrode pad, 52...Common electrode, 58...Conductive adhesive, 60...
Extraction electrode member, 66...Outer frame, 68...
··heat sink. Patent on the brink Ricoh Co., Ltd.
Claims (1)
Ｄチップを、各ＬＥＤチップの発光素子が一直線状に並
ぶように基板上に配置したＬＥＤプリントヘッドにおい
て、ＬＥＤチップは発光面に個別電極が設けられ、反対
側にある裏面に共通電極が設けられた構造をしており、
基板は透明基板であり、基板表面には配線が形成されて
おり、ＬＥＤチップの発光面が基板表面と対向して半田
バンプを用いたフリップチップ法によりフェイスダウン
法で実装されており、ＬＥＤチップ裏面の共通電極には
導電性接着剤により電気的に単一の引出し電極部材が接
続されており、ＬＥＤチップ発光面からの光出力が前記
基板を通過して取り出されることを特徴とするＬＥＤプ
リントヘッド。(1) LE equipped with multiple light emitting elements arranged in a straight line
In an LED print head in which D chips are arranged on a substrate so that the light emitting elements of each LED chip are arranged in a straight line, the LED chips have individual electrodes on the light emitting surface and a common electrode on the opposite back surface. It has a structure that
The substrate is a transparent substrate, wiring is formed on the surface of the substrate, and the LED chip is mounted face-down using the flip-chip method using solder bumps, with the light emitting surface of the LED chip facing the surface of the substrate. An LED print characterized in that a single extraction electrode member is electrically connected to the common electrode on the back surface with a conductive adhesive, and light output from the LED chip light emitting surface is extracted by passing through the substrate. head.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1581589A JP2790832B2 (en) | 1989-01-24 | 1989-01-24 | LED print head |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1581589A JP2790832B2 (en) | 1989-01-24 | 1989-01-24 | LED print head |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02196476A true JPH02196476A (en) | 1990-08-03 |
| JP2790832B2 JP2790832B2 (en) | 1998-08-27 |
Family
ID=11899345
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1581589A Expired - Fee Related JP2790832B2 (en) | 1989-01-24 | 1989-01-24 | LED print head |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2790832B2 (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04132961U (en) * | 1991-05-31 | 1992-12-10 | 京セラ株式会社 | optical printer head |
| JPH04356978A (en) * | 1991-05-31 | 1992-12-10 | Kyocera Corp | Picture device |
| US5283446A (en) * | 1991-08-30 | 1994-02-01 | Nec Corporation | Compact optical semiconductor module capable of being readily assembled with a high precision |
| JP2003110245A (en) * | 2001-09-28 | 2003-04-11 | Ibiden Co Ltd | Method for manufacturing optical element mounting substrate, optical element mounting substrate, and optical element |
| WO2004001861A1 (en) * | 2002-06-24 | 2003-12-31 | Nec Corporation | Photoelectric composite module and optical input/output device using the module as component element |
| US7519243B2 (en) | 2004-08-04 | 2009-04-14 | Fujitsu Limited | Substrate, substrate adapted for interconnecting optical elements and optical module |
| US7677943B2 (en) * | 2004-03-29 | 2010-03-16 | Articulated Technologies, Llc | Manufacturing of a photo-radiation source by binding multiple light emitting chips without use of solder or wiring bonding |
| US7880190B2 (en) * | 2003-09-17 | 2011-02-01 | Oki Data Corporation | Combined semiconductor device, LED print head, and image forming apparatus |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63318172A (en) * | 1987-06-19 | 1988-12-27 | Fujitsu Ltd | Light-emitting diode array |
-
1989
- 1989-01-24 JP JP1581589A patent/JP2790832B2/en not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63318172A (en) * | 1987-06-19 | 1988-12-27 | Fujitsu Ltd | Light-emitting diode array |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04132961U (en) * | 1991-05-31 | 1992-12-10 | 京セラ株式会社 | optical printer head |
| JPH04356978A (en) * | 1991-05-31 | 1992-12-10 | Kyocera Corp | Picture device |
| US5283446A (en) * | 1991-08-30 | 1994-02-01 | Nec Corporation | Compact optical semiconductor module capable of being readily assembled with a high precision |
| US5478778A (en) * | 1991-08-30 | 1995-12-26 | Nec Corporation | Method of manufacturing a compact optical semiconductor module capable of being readily assembled with a high precision |
| JP2003110245A (en) * | 2001-09-28 | 2003-04-11 | Ibiden Co Ltd | Method for manufacturing optical element mounting substrate, optical element mounting substrate, and optical element |
| WO2004001861A1 (en) * | 2002-06-24 | 2003-12-31 | Nec Corporation | Photoelectric composite module and optical input/output device using the module as component element |
| US7693360B2 (en) | 2002-06-24 | 2010-04-06 | Nec Corporation | Optoelectronic hybrid integrated module and light input/output apparatus having the same as component |
| US7880190B2 (en) * | 2003-09-17 | 2011-02-01 | Oki Data Corporation | Combined semiconductor device, LED print head, and image forming apparatus |
| US7677943B2 (en) * | 2004-03-29 | 2010-03-16 | Articulated Technologies, Llc | Manufacturing of a photo-radiation source by binding multiple light emitting chips without use of solder or wiring bonding |
| US7519243B2 (en) | 2004-08-04 | 2009-04-14 | Fujitsu Limited | Substrate, substrate adapted for interconnecting optical elements and optical module |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2790832B2 (en) | 1998-08-27 |
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| LAPS | Cancellation because of no payment of annual fees |