JPH0220176B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a gain control device for maintaining an input signal level of an A/D converter at an appropriate value.

A/
It is desirable that the input level of the D converter is lower than the value at which the A/D converter is saturated and maintained at a level sufficient to reduce quantization noise. One possible way to accomplish this would be to use a prior art analog automatic gain control circuit before converting the analog signal to a digital signal. Although this method is feasible, when performing digital time division processing, a gain control circuit is required for each analog signal line, leading to an increase in hardware and cost. For example, in radar signal processing, the period between one transmission pulse and the next transmission pulse is divided at regular time intervals (one divided section is called a range bin), and gain control is performed for each range bin. Therefore, as a means to prevent an increase in hardware and cost, a digital gain control circuit using digital signal processing was devised.

[Prior art]

A conventional device of this type is shown in FIG.

In FIG. 1, 1 is a step attenuator for attenuating the input signal, and 2 is the step attenuator.
An A/D converter that converts the output of the attenuator 1 into a digital signal, 3a a first scaler that scales the output of the A/D converter 2 to 1/M (M: constant), 4 the first scaler 3a
5a is a first subtractor that outputs the difference between the output of the absolute value circuit 4 and a threshold constant K; 7 is the first subtractor 5;
an adder that adds the a output and the integral value; 6 a register that holds the output of the adder 7 as the integral value;
3b is the output of register 6 by 1/N (N: constant)
A second scaler 5b is a second subtracter that subtracts a constant S from the output of the second scaler 3b and outputs it as a control signal for the step attenuator 1.

Next, the operation will be explained. The input signal is A/
It is attenuated by step attenuator 1 to prevent saturation in D converter 2. Step
The attenuator 1 is controlled by the output of the register 6, which is scaled to 1/N by the second scaler 3b and has S subtracted by the second subtracter. The output of the A/D converter 2 is scaled to 1/M by the first scaler 3a, and only the amplitude component is extracted by the absolute value circuit 4. This amplitude component is subtracted by a threshold constant K by a first subtractor 5a,
The signal is sent to an accumulator circuit consisting of an adder 7 and a register 6, and is integrated until the output of the A/D converter 2 reaches a certain level.

The above operation is for the case where the input amplitude>M・K, but when the input amplitude<M・K, for example, input amplitude=
If 0, the accumulator continues to integrate −K,
Starts oscillation due to overflow. To prevent this, a device (not shown) is required to determine the presence or absence of an input signal and control relinquishment of control of the gain control circuit.

As described above, the conventional gain control device requires a special device for controlling abandonment and recovery of gain control, which has the drawback of increasing hardware.

[Summary of the invention]

This invention was made to eliminate the drawbacks of the conventional ones as described above, and by providing a half-wave rectifier circuit inside the accumulator circuit, it is possible to abandon gain control and eliminate the need for special equipment. It is an object of the present invention to provide a gain control device that can perform recovery continuously.

[Embodiments of the invention]

FIG. 2 shows an embodiment of the present invention. FIG. 2 will be explained below. In the figure, 1 is a step attenuator for attenuating an input signal, 2 is an A/D converter that converts the output of the step attenuator 1 into a digital signal, and 3a is an A/D converter for converting the output of the step attenuator 1 into a digital signal.
A first scaler that scales the output of the D converter 2 to 1/M (M: constant); 4 is an absolute value circuit that outputs the absolute value of the output of the first scaler 3a; 5 is an output from the absolute value circuit 4; A subtracter that subtracts the threshold constant K; 6 a register that holds the integral value of the output of the subtracter 5; 7 an adder that outputs the sum of the output of the subtracter 5 and the output of the register 6; 8 the adder 7. A half-wave rectifier circuit 3b outputs the output of the adder 7 as is when the output is positive, and outputs zero when the output of the adder 7 is negative, and sends it as an input signal to the register 6. This is a second scaler that scales the signal to N (N: constant) and outputs it as a control signal for the step attenuator.

Next, the operation will be explained. When the input amplitude becomes smaller than M K from a certain steady state, the accumulator continues to integrate -K, but when the contents of register 6 become smaller than K, the output of half-wave rectifier circuit 8 becomes zero, and the register 6 output is stable at zero.
This automatically gives up gain control.
In this state, when the input amplitude becomes larger than M·K, gain control is automatically restored again.

In the above embodiment, a register is used in the accumulator circuit, but other memory elements can also be used.

〔Effect of the invention〕

As described above, according to the present invention, by providing a half-wave rectifier circuit inside the accumulator circuit, gain control can be abandoned and recovered without any special equipment, and the hardware can also be reduced. There is.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a conventional gain control device, and FIG. 2 is a diagram showing an embodiment of the present invention. In the figure, 1 is the step attenuator, 2 is the A/
D converter, 3 is a scaler, 4 is an absolute value circuit,
5 is a subtracter, 6 is a register, 7 is an adder, and 8 is a half-wave rectifier circuit. It should be noted that the same or corresponding parts in the figures are indicated by the same reference numerals.

Claims (1)

[Claims] 1. a step attenuator for introducing an analog input signal and attenuating said analog input signal by an amount determined by a digital control signal; an A/D converter for converting said step attenuator output into a digital signal; A first scaler that scales the converter output to 1/M (M: constant), an absolute value circuit that outputs the absolute value of the first scaler output, and a threshold constant that is subtracted from the absolute value circuit output and output. a subtracter, an adder that adds the subtracter output and the integral value, and a half-wave rectifier that outputs the adder output signal as is when the adder output signal is positive, and outputs zero when the adder output signal is negative. a second memory element that scales the output of the memory element to 1/N (N: constant) and outputs it as a digital control signal for the step attenuator; A gain control device comprising a scaler.