JPH022125A - Formation of through hole of semiconductor device - Google Patents

Abstract

PURPOSE:To improve step coverage and restrict electromigration and burnout by providing isotropy dry etching and anisotropy dry etching to an interlayer insulation film in sequence for opening and then by eliminating a sharp edge at the side surface of hole which is formed by both processings. CONSTITUTION:An interlayer insulation film 2 is formed on a first-layer wiring 1, a photoresist 3 is applied to it for patterning, and the interlayer insulation film 2 is etched by half the thickness by isotropy dry etching. Then, the remaining interlayer insulation film is removed by anisotropy dry etching to allow a first-layer wiring 1 to be exposed and a hole 7 to be opened. An acute corner 8 at the boundary between a part removed by this isotropy and anisotropy dry etching and the part removed by anisotropy dry etching is subject to isotropy dry etching again and the side surface of the hole 7 is slightly removed to allow a through hole 10 with a rounded and smooth side surface 9 to be formed. Then, a resist 3 is removed and a wiring material layer is formed. Then, patterning is performed and a second-layer wiring 5 is formed.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for forming a through-hole in a semiconductor device having a multilayer wiring structure, and in particular, a method for forming a through-hole in a semiconductor device that improves the step coverage of the through-hole portion. Regarding.

[Prior Art] FIGS. 4(a) to 4(d) are cross-sectional views showing a conventional through-pole forming method in the order of steps. First, as shown in FIG. 4(a), a photoresist 3 is applied to the interlayer insulation [2] on the first layer wiring 1, and then patterned, and then isotropic dry etching is performed using the photoresist 3 as a mask. Then, a portion of the interlayer insulating film 2 having a thickness of approximately half is etched.

Next, as shown in FIG. 4(b), anisotropic dry etching is performed to etch the remaining half of the interlayer insulation film 2A2 to form a hole in the interlayer insulation film 2. After that, Figure 4 (C)
As shown in FIG. 3, the photoresist 3 is removed and a through hole 4 is formed.

Finally, as shown in FIG. 4(d), the second layer wiring 5 is formed on the interlayer insulation H2 so as to fill the through hole 4. As a result, a semiconductor device having a two-layer wiring structure in which the first layer wiring 1 and the second layer wiring 5 are connected through the through hole 4 is obtained.

[Problems to be Solved by the Invention] However, in the conventional method described above, the shape of the through hole 4 is at the boundary between isotropic dry etching and anisotropic dry etching as shown in FIG. 4(d). It becomes an acute angle, and an edge portion 2a is generated at this portion. For this reason, the second
When the layer wiring 5 is formed, the step coverage of the second layer wiring 5 deteriorates in a portion near the edge portion 2a of the through hole 4, as in the region 6 circled with a circle in FIG. 4(d). This phenomenon causes problems such as electromigration and disconnection when a large current flows or when the pattern is fine, such as in a bipolar IC, resulting in problems in terms of reliability and process.

The present invention has been made in view of such problems, and includes:
It is an object of the present invention to provide a method for forming a through hole in a semiconductor device, which has good step coverage, suppresses electromigration and disconnection, and can improve the reliability of the semiconductor device.

[Means for Solving the Problems] A method for forming a through hole in a semiconductor device according to the present invention is a method for forming a through hole in a semiconductor device in which a through hole is formed in an interlayer insulating film of a semiconductor device having a multilayer wiring structure.
opening a hole by sequentially subjecting the interlayer insulating film to a first process of isotropic dry etching and a second process of anisotropic dry etching; and performing the first process and second process on the side surface of the hole. and removing a corner formed at the boundary.

[Function] In the present invention, first, the interlayer insulating film is subjected to a first isotropic dry etching process and a second anisotropic dry etching process.
The holes are opened by sequentially applying the treatments.

Next, the hole side portion formed by the first isotropic dry etching process and the second anisotropic dry etching process are performed.
Sharp corners formed at the boundary with the hole side portion formed by the treatment are removed. This corner portion may be removed by, for example, isotropic dry etching or wet etching. As a result, a through hole with smooth sides is formed. Therefore, the step coverage of the upper layer wiring formed on the interlayer insulating film embedded in this through hole is improved.

[Examples] Examples of the present invention will be specifically described below with reference to the accompanying drawings.

FIGS. 1(a) to 1(e) are cross-sectional views showing the method according to the present invention in the order of steps. First, as shown in FIG. 1(a), an interlayer insulating film 2 with a thickness of about 1 μm is formed on the first layer wiring 1, and then a photoresist 3 is coated on the interlayer insulating film 2 and patterned. do.

Thereafter, by isotropic dry etching, the interlayer insulating film 2 is etched to a thickness of about 0.5 μm using the photoresist 3 as a mask.

Next, as shown in FIG. 1(b), the remaining approximately 0.5 μm thick portion of the interlayer insulating film is etched away by anisotropic dry etching to expose the first layer wiring 1 and form the hole 7. will be established. In this case, an acute corner 8 is present at the boundary between the part removed by isotropic dry etching and the part removed by anisotropic dry etching.

Next, the interlayer insulating film 2 with the holes 7 formed in this way is
By isotropic dry etching, the side surface of the hole 7 is slightly removed as shown by the broken line in FIG. 1(b). As a result, as shown in FIG. 1(c), the corner portion 8 is rounded, the sharp portion disappears, and a through hole 10 having a gentle side surface 9 is formed.

The isotropic dry etching for rounding this corner 8 is as follows:
For example, the apparatus shown in FIG. 2 may be used. In this device, a flat lower electrode 13 is placed on a stage 15, and a wafer 14 having a layer structure shown in FIG. 1(b) is placed on the lower electrode 13. . Further, a cover 11a is airtightly placed on the stage 15 so as to cover the wafer 14, so that an etching chamber 11 is formed within the cover 11a. A disk-shaped upper electrode 12 is suspended on the upper inner surface of the cover 11a with its surface horizontal.
a is placed on the stage 15, the upper electrode 12 and the lower electrode 13 face each other in parallel. When high frequency power is applied between the upper electrode 12 and the lower electrode 13,
A discharge is generated between the two electrodes, and the layer forming surface of the wafer 14 is isotropically dry etched.

In this isotropic dry etching, the side surface of the hole 7 is etched and removed up to the broken line area as shown in FIG. 1(bl), so the amount of etching is small and the etching time is sufficient. For example, a mixed gas of CF4 gas and 02 gas may be introduced into the etching chamber 11, and a power of 250 W may be applied between the upper electrode 12 and the lower electrode 14 to perform etching for about 10 seconds. As a result, as described above, the corner 8 of the hole 7 is rounded to form a through hole 10 having a gentle side surface 9.

Next, as shown in FIG. 1(d), a photoresist 3 is applied.
remove. Thereafter, as shown in FIG. 1(e), a wiring material layer is formed by sputtering and then patterned to form a second layer wiring 5. Since the side surface 9 of the through hole 10 in the second layer wiring 5 is formed gently, the step coverage within the through hole 10 does not deteriorate, and migration to the electronics 1 and disconnection are avoided.

Also, by using isotropic dry etching to round the corner 8, the length of the - side is 2.0 μm.
It is also possible to stably form through-holes as small as m or less.

Note that the process for removing the corner 8 described above is not limited to isotropic dry etching, but may also be a process of rounding the corner 8 by wet etching using the apparatus shown in FIG. In this wet etching apparatus, a wafer carrier 18 containing a plurality of wafers 14 spaced apart from each other by an appropriate length is immersed in an etching tank 16 in which an etching solution 17 is stored. As a result, the layer forming surface of the wafer 14 is wet-etched, and the corners 8 of the holes 7 in the interlayer insulating film 2 are removed. The etching solution is, for example, 63BHF (dilute hydrofluoric acid containing 6% HF and 30% NH4F), and an etching time of about 30 seconds is sufficient.

[Effects of the Invention] As explained above, according to the present invention, the interlayer insulating film is subjected to isotropic dry etching and anisotropic dry etching to expose the underlying wiring, thereby forming holes, and then isotropically etching the interlayer insulating film. Since the corners of the holes are removed by dry etching or wet etching, the step coverage of the upper layer wiring is improved, disconnection and electromigration are prevented, and the reliability of the semiconductor device is increased. Further, when isotropic dry etching is used to remove the corner portions, fine through holes with side lengths of 2.0 μm or less can be stably formed.

[Brief explanation of the drawing]

1(a) to (e) are cross-sectional views showing the method according to the present invention in the order of steps, FIG. 2 is a schematic diagram showing a dry etching device, and FIG. 3 is a schematic diagram showing a wet etching device.
FIGS. 4(a) to 4(d) are cross-sectional views showing a conventional through-hole forming method in the order of steps. 1; first layer wiring, 2; interlayer insulating film, 3; photoresist, 4; through hole, 5; second layer wiring, 7; hole, 8; corner, 9; side surface, 10; through hole, 11; Etching chamber, 12; upper electrode, 13; lower electrode, 14; wafer, 15; stage, 16; etching bath, 17; etching solution, 18; wafer carrier (b) (C) Fig. 1 (1) Fig. 8 (d) Figure 1 (2)

Claims (1)

[Claims] (1) In a method for forming a through hole in a semiconductor device in which a through hole is formed in an interlayer insulating film of a semiconductor device having a multilayer wiring structure, the interlayer insulating film is subjected to a first process of isotropic dry etching and a first process of anisotropic dry etching. A semiconductor device comprising the steps of sequentially performing two treatments to open a hole, and removing a corner formed at a boundary between the first treatment and the second treatment on a side surface of the hole. Through-hole formation method.