JPH022175A - Thin film transistor and its manufacturing method - Google Patents

Abstract

PURPOSE:To make film quality an film thickness uniform by providing a gate electrode having a sequentially tapered edge on an insulation substrate and a counter electrode on a semiconductor thin film formed through a gate insulation film to a gate electrode to provide a source electrode and a drain electrode. CONSTITUTION:An Al thin film 2 is formed on an insulation substrate 1 through vacuum evaporation as a gate electrode material. A positive resist 7 is applied to carry out patterning of the Al thin film 2 as a gate electrode and then ultraviolet(UV) rays are radiated using a photo mask 8. When the resist 7 is removed, a gate electrode pattern is formed which has a sequentially tapered edge. A gate insulation film having uniform film quality and film thickness can be formed in this way by ECR plasma CVD method whether a gate electrode is provided or not.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a thin film transistor and a method for manufacturing the same, and particularly aims to provide a thin film transistor with excellent reliability.

BACKGROUND OF THE INVENTION Conventionally, Si, N, etc. have been used as insulating films for thin film transistors using techniques such as plasma CVN, Suhanoku evaporation + electron beam evaporation, and ion beam evaporation.

5in2. Ae203. Thin films of Ta, 05, and composite materials thereof have been used, but in recent years, thin films of Si3N4, S02, and composite materials thereof have been attracting attention by ECR plasma CVD. ECR Plasma Cv
The insulating film obtained by method D has excellent film quality and is processed at a low temperature, so it is very useful as a gate insulating film of a thin film transistor.

Problems to be Solved by the Invention FIG. 3 shows a top view of a conventional thin film transistor. At the same time, the end face of the goo 1-electrode 2 is formed into a right-angled or rather inverted tapered shape by a conventional photo-etching process. However, in terms of performance and reliability of the thin film transistor, it is necessary that the step coverage between the gate electrode 2 and the substrate 1 be good.

The step coverage depends on the relative relationship between the thickness of the gate electrode and the thickness of the gate insulating film, but it also depends on the process of forming the insulating film. Thin films deposited by a method in which deposited atoms or molecules are highly directional with respect to a substrate, such as the ECR plasma CVD method, generally have poor step coverage. Furthermore, in the ECR plasma CvD method and the ion beam method, high-quality films are obtained due to the effect of ion bombardment during film deposition, so the flat part shown in Figure 4 and the one shown in A' Because the effect of ion bombardment differs greatly near a level difference, the film deposited in a place like A' is of poorer quality than the film deposited in a flat place like the one shown in Figure A'. Thick and thin. Therefore, the problem of the present invention is that the film quality of the gate insulating film of a thin film transistor deposited by ECR plasma CVD method or ion beam method is different from the flat part on the substrate even in the vicinity of the stepped part of the gate electrode on the substrate. The problem is how to obtain a structure and manufacturing method for a thin film transistor in which the film thickness is uniform regardless of the level difference.

Means for solving the problem A gate electrode having a forward tapered end face shape is formed on an insulating substrate, a gate insulating film is formed on the gate electrode, and the gate insulating film is formed on the gate electrode via the gate insulating film. A thin film transistor is formed by providing opposing electrodes on the mJ semiconductor thin film and the mJ semiconductor thin film as a source electrode and a drain electrode.

In addition, the thin film transistor is fabricated by a process of vapor depositing a goo-1 electrode material on an insulating substrate, and after applying a positive resist, a photomask and a photoresist are left at an appropriate distance and UV radiation is applied.
A step in which the end face of the patterned resist is made into a forward tapered shape by exposure and development, and a step where the end face of the gate electrode is made into a forward tapered shape by etching the gate electrode material by reactive ion etching (hereinafter referred to as RIE). The semiconductor device is manufactured by a step of forming a gate insulating film, a step of forming a semiconductor thin film on the gate electrode via the gate insulating film, and a step of forming a soak electrode and a drain electrode on the semiconductor thin film.

By making the end face of the working gate electrode into a forward tapered shape, the coverage of the gate insulating film is good, and the film quality and film thickness uniformity can be maintained even in ECR plasma CVD method or on-beam method.

Embodiment FIGS. 4a and 4b show the difference in effects depending on the shape of the end face of the gate electrode 2. As shown in FIG. 4a, the shape of the end face of the conventional gate electrode is either vertically steep or reversely tapered due to side etching during etching of the gate electrode material. In this case, the EOR
When forming the gate insulating film 3 on the substrate using plasma CJVD method etc., a gate insulating film with excellent performance can be formed at the position A', but at the position A', the deposited ionized atoms and Since the molecules are directionally incident on the substrate, the ion bombardment effect is not sufficient, and the film quality is inferior to that of the positioning film, resulting in a thinner film. However, if the end face is formed into a forward tapered shape like the gate electrode 2 as shown in FIG. 4bK, then the position B
The film quality and film thickness of the gate insulating film at and B' are ECR
Even if it is formed using a plasma CVD method or the like, there is no big difference. The present invention realizes a thin film transistor using the method described above and shown in FIG.

An embodiment of the present invention will be described below.

As shown in FIG. 2L, an Ae thin film 2 is placed on a Corning 7O59 substrate as an insulating substrate 1 as a gate electron microscopy material.
Approximately 600 layers are formed by vacuum evaporation, and approximately 100 layers are formed if it also serves as wiring during integration of thin film transistors. Next, as shown in Fig. 2 or b', the Ae thin film 2
In order to pattern the gate electrode as a gate electrode, apply a positive resist 7 and use a photomask 8 to expose it to ultraviolet rays (UV).
) irradiate light. At that time, as shown in b, it is necessary to provide an appropriate distance between the positive resist 7 and the photomask 8, for example, about several μm, or, in order to improve controllability, to prepare a 5io2 thin film with a thickness of about 1 μm on the photomask in advance. is coated as a spacer 9, the positive resist 7 and the photomask 8 are brought into close contact with each other, and UV light is irradiated. By doing so, the UV light will be diffracted at the edge of the photomask 8 and exposed.
The resist after development has a cross-sectional shape tapered around 1 as shown in FIG. 2C. Furthermore, when the substrate K is subjected to IJ active ion etching (RIE), the positive resist 7 is etched to a certain extent along with the λe thin film 2, so when the positive resist 7 is removed, the end surface as shown in FIG. A gate electrode pattern having a tapered cross-sectional shape is produced. Further, the same thing can be done using a negative resist and a black and white inversion photomask of the photomask shown in FIG. Figure 4d
With a gate electrode like this, a gate insulating film of uniform quality and thickness can be formed by the ECR plasma CVD method regardless of the presence or absence of a gate electron pupil for the reasons described above using Figure 4. . Therefore, we installed an ECR on a board like the one shown in Figure 4 (d).
1,000 SiN layers were formed using the plasma method, and K ca
A thin film transistor of the present invention as shown in FIG. 1 was obtained by forming 1,000 SE thin films by vacuum evaporation, converting them into a pattern by a photoetching process, and forming NiCr/Au 7jlh as source and drain electrodes by a lift-off process. obtain.

SiN was fabricated using the ECR plasma CVD method as a gate insulating film for a thin film transistor with a conventional structure as shown in Figure 3.
FIG. 5 shows a comparison between the thin film transistor of the present invention shown in FIG. FIG. 5 shows how the drain current of the thin film transistor in the ON state changes over time. The conventional structure tends to cause a sudden increase or decrease in drain current, as shown by q and H in FIG. This is due to the fact that the quality of the gate insulating film near the edge of the gate electrode is poor compared to other parts, so that it may be destroyed by an electric field applied for a long time, or an increase in leakage current may occur through that part.

On the other hand, in the case of the thin film transistor of the present invention, as shown in FIG. 5P, many of the thin film transistors are stable for a long time and have very high reliability.

Furthermore, in the case of the thin film transistor of the present invention, it is possible to make the gate insulating film thinner, and it goes without saying that this greatly contributes to higher performance and higher integration of the thin film transistor.

Effects of the Invention According to the present invention, not only the reliability of thin film transistors can be improved, but also high performance and high integration can be realized.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a thin film transistor of the present invention, FIG. 2 is an explanatory diagram of the process of forming a gate electrode of a thin film transistor of the present invention, FIG.
The figure is an explanatory diagram of the gate insulating film forming process of the conventional method and the present invention.
FIG. 5 is a diagram showing the change in drain current over time in the ON state of the conventional thin film transistor and the present invention. 1... Insulating substrate, 2... Gate electrode,
3...Gate insulating film, 4...Semiconductor thin film, 6...Source electrode, 6...Drain reprint, 7...Positive resist, 8... ...Photomask, 9... Name of spacer agent Patent attorney Toshi Nakao and one other person

Claims (5)

[Claims] (1) A gate electrode whose end surface has a cross-sectional shape of a forward taper on an insulating substrate, a gate insulating film formed on the gate electrode, a semiconductor thin film formed on the gate electrode via the gate insulating film, and the A thin film transistor characterized in that it is obtained by providing a semiconductor thin film with opposing electrodes to serve as a source electrode and a drain electrode. (2) forming a gate electrode material on the insulating substrate;
A step of applying a resist, exposing the insulating substrate and a photomask to light with an appropriate interval, and developing the resist, a step of etching and patterning the gate electrode material by reactive ion etching, and a gate insulating film. 1. A method for manufacturing a thin film transistor, comprising the steps of: forming a semiconductor thin film; forming and patterning a semiconductor thin film; and forming a source electrode and a drain electrode on the semiconductor thin film. (3) A patent claim characterized in that in the step of exposing an insulating substrate and a photomask with an appropriate distance, the appropriate distance is obtained by forming a thin film that is transparent in the ultraviolet region on the photomask in advance. A method for manufacturing a thin film transistor according to item 2. (4) The method of forming the gate insulating film is ECR plasma CV
3. The method for manufacturing a thin film transistor according to claim 2, wherein the method is method D. (5) The method of manufacturing a thin film transistor according to claim 2, wherein the method of forming the gate insulating film is a method of forming the film using an ion beam.