JPH02236637A - Programmable fuzzy logic circuit - Google Patents

Abstract

PURPOSE:To respond to the increment of the number of levels with one memory device for arithmetic part by providing a memory device for arithmetic part where an arithmetic result outputted corresponding to input is stored in an address designated by the input, and enabling the arithmetic result to be rewritten. CONSTITUTION:The memory device 13 for arithmetic part where the arithmetic result outputted corresponding to the input is stored in the address designated by the input from an input signal line 11 is provided, and the arithmetic result can be rewritten. In the memory device 13 for arithmetic part, the arithmetic result that is the result of a fuzzy logical operation on the input is stored in a designated address assuming the input as an address signal. Therefore, the arithmetic result of the fuzzy logical operation can be obtained only by reading out a value stored in the address. Also, since the arithmetic result can be rewritten, another fuzzy logical operation can be performed by rewriting the arithmetic result. Thereby, a programmable fuzzy logic circuit can be obtained by rewriting the arithmetic result one after another according to a program.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to a circuit used to perform fuzzy logic operations that take "ambiguity" into consideration.

[Conventional technology]

Fuzzy logic is a logic that deals with "ambiguity" and was introduced in 1965 by L. It is based on the fuzzy set proposed by A. Zadeh. Ambiguity is inherent in human thoughts and actions. Therefore, even if you try to make a machine work with the same "ambiguity" that humans have, the "ambiguity"
Conventional control technology that does not allow for However, if fuzzy logic opens the way to theorizing and quantifying "ambiguity," it may be possible to automate thoughts and actions that previously relied on human experience and intuition, and research in this area is currently underway. It is being actively carried out. First, the difference between conventional sets (crisp sets) and fuzzy sets will be explained using Figures 4 and 5. FIG. 4 is a diagram showing an example of a characteristic function of a conventional set (Crisbu set). In a crisp set, a boundary is defined, and whether something falls within the boundary or not determines whether it belongs to a certain set or not. Therefore, it is inconceivable that something could belong to some extent to both across the border. In other words, there are only two possible values for the characteristic function: "1" (belongs) and "0" (does not belong). In Figure 4, "height" is taken as an element, and 170
It shows the characteristic function when people who are taller than cm are considered to be a set of "tall people J".Function value = 1 means that they belong to the set of "tall people", and function value = 0 means that they belong to the set of "tall people". ``It means that it does not belong to the set of tall people.'' The characteristic function of a fuzzy set is called a membership function, and Figure 5 shows an example of a membership function of a fuzzy set. In the membership function, the function value can take not only 1 and 0 but also values in between (for example, 0.8).The function value = 1 means 100% belonging, and the function value =
0.8 means that 80% belong but 20% do not. Function value = 0 means 100% does not belong. In Figure 5, as in Figure 4, "height" is used as an element.
is taking. In this membership function, when the height is 165 cm, the function value is -0.2. This means that 16
For people with a height of 5cm, 20% will be added to a group of "tall people"
It tells us that we belong. On the other hand, the height is 170cm
In the case of people, the function value = 0.8. This tells us that 80% of people who are 170 cm belong to the group of ``tall people''. Much of the research on fuzzy logic has focused on its application to software systems using digital computers, but in order to process more complex systems at high speed, a dedicated hardware system for fuzzy logic operations is required. Ru. The way to configure this dedicated hardware system is to
There are methods that use digital circuits and methods that use analog circuits. However, when considering compatibility with current digital computers, it is more advantageous to configure it with digital circuits. To perform fuzzy logic operations in a digital circuit, the function value between l and 0 is divided into several levels, the membership function is approximated by a step-like curve (so-called discretization of the membership function), and each level is Perform digital calculations on . In other words, the process is actually multi-valued rather than binary. As the number of levels to be divided increases, the accuracy of the approximation improves, so better fuzzy logic operations can be performed. FIG. 6 is a diagram showing an example of approximating a fuzzy set by dividing it into multiple levels. The number of levels in this case is eight, from 0 to 7. In Figure 6, A is the membership function. The mouth is a step-like curve. E1 or E
+a is the value of the element. Since it is approximated by the mouth curve, for example, when the value of the element is E1, the level value is considered to be 6 (the function value of the corresponding membership function is 6/7). Since one operation is performed by one dedicated digital circuit, E. A digital circuit is prepared that outputs level 5 when the element value of is input. Similarly, a digital circuit is prepared which outputs level 4 when the element value of E is input. By integrating the above operations, an approximate calculation of the membership function is performed using a digital circuit. In addition, fuzzy set. Literature related to membership functions etc. includes Japanese Patent Application Laid-Open No. 62-95673, M. To
gaIandllJatanabe“AVLSI I
MPL[! MENTATTONOF FUZZY
INFERHNC [! ENGINE:TOWARD
AN EXPI! IITSYSTEM ON
A (JIIP' Proc. of the
2nd Conf, onArt. Int.
Appli. +pp. l92-197 Maiam
i Beach, 1985, etc.

[Problem to be solved by the invention]

(Problem) However, as mentioned above, the membership function is divided into multiple levels and one
Providing two dedicated arithmetic circuits (digital circuits) to perform fuzzy logic operations has the following problems. The first problem is that the more you try to improve the close detection by increasing the number of levels, the more types of fuzzy logic operations will become enormous, and the number of dedicated arithmetic circuits that must be prepared will also become enormous. It is a point. The second problem is that once the dedicated arithmetic circuit is configured with hardware, it is impossible to change the content of the arithmetic operation. (Explanation of the problem) First, the first problem will be explained. FIG. 7 is a diagram explaining that when the number of levels of one input is 2, there are 16 types of operators (=methods of calculation) for calculation of 2 inputs and 1 output. Figure 7 (a) shows the configuration of the arithmetic circuit.
70 is a first input signal line, 71 is a second input signal line, 72 is an arithmetic circuit, and 73 is an output signal line. Here, the number of levels of one input is two, that is, "0" and "r1". The short line drawn across the input signal line 70 and the number (1) above it mean that one pit signal is transmitted through this signal line. The same applies to the other signal lines in FIG. 7 and the signal lines in other figures. Figure 7 (2) shows the combination of inputs and outputs of such an arithmetic circuit. There are four types of combinations of the first input and the second input since each has two levels (0 and 1). What kind of combinations of output values can be considered for these four types are as shown in the figure. It can be seen that there are 16 ways from N0.16. Figure 7 (mouth). (c) is each N
O. 6, NO. Person in case of 12. This shows the output relationship in an easy-to-understand manner. For example, in Figure 7 (mouth), the first
The first input from the input signal line 70 is 0, the second input signal line 7
This indicates that when the second input from 1 is 1, an output of 1 is output from the output signal line 73. In other words, NO. The arithmetic circuit 72 for performing the arithmetic operation of No. 6 is made to operate in this manner. As described above, when the number of input levels is 2, there are 16 operators with 2 inputs and 1 output, and in order to be able to handle any operation required, basically Requires 16 dedicated logic operation circuits. Generally, when the number of input levels is n, there are n% of 2-input, 1-output operators. Even as n-3, 19
, 683, and the same number of dedicated logic operation circuits are required. As can be seen from these facts, if one attempts to perform fuzzy logic operations with an infinite number of levels, an enormous number of dedicated logic operation circuits are required. Next, the second problem will be explained. Research on fuzzy logic is currently being actively conducted, and there is a possibility that useful fuzzy logic operations will be developed and used one after another in the future. Therefore, a fuzzy logic operation circuit is required to be flexible enough to easily change the operation contents. However, once configured with hardware, the above-mentioned dedicated arithmetic circuits, which cannot change the calculation contents, cannot meet these demands. The present invention aims to solve the above-mentioned problems.

[! Means to solve problem i】

In order to solve the above problem, the programmable fuzzy logic circuit of the present invention takes the following measures so that even if the content of fuzzy logic operations is changed, it can be handled without creating a new dedicated arithmetic circuit. Ta. That is, the programmable fuzzy logic circuit of the present invention includes a storage device for an arithmetic section in which arithmetic results to be outputted corresponding to the inputs are stored at addresses specified by the inputs, and the arithmetic results are rewritable. I decided to do so.

[For production]

In the storage device for the arithmetic unit, the results of fuzzy logic operations performed on inputs are stored at addresses designated by treating the inputs as address signals. Therefore, the result of a fuzzy logic operation can be obtained simply by reading the value stored at that address. Since the operation result is rewritable, by rewriting it, another fuzzy logic operation can be performed. That is, by rewriting one after another according to a program, a programmable fuzzy logic circuit can be obtained.

【Example】

Embodiments of the present invention will be described in detail below with reference to the drawings. Figure 1 shows the basic block configuration of the main part of the present invention.
In FIG. 1, 10 is a program address signal line;
11 is an input signal line, I2 is an input selection circuit, l3 is a storage device for the calculation section, 14.15 is a bidirectional buffer, 16 is a data signal line for programming, and l7 is an output signal line. The "m" written along each signal line indicates that the signal line is m-bit parallel. The value of m that is chosen is related to the maximum level value N (7 in Figure 6) of the levels at which the membership function is divided. That is, N=2''-1 is selected. The input selection circuit 12 connects the program address signal line 10
It serves to select only one of the input from the input signal line 11 and the input from the input signal line 11 and send it to the storage device 13 for the calculation section. For example, a multiplexer or the like is used. The storage device 13 for the calculation unit is configured to output calculation output using a so-called look-up table method. That is, eight m-bit signals are input to the storage device 13 for the calculation section, and this input is used as information for specifying an address within the storage device 13 for the calculation section. The calculation result to be output when inputting this input is written in advance to the specified address. Then, when an address is specified by input, the desired calculation output is obtained by reading out the calculation result previously written to that address. The calculation results are written in advance to the storage device 13 for the calculation unit as follows. At this time, the input selection circuit 12 passes the input from the program address signal 110, and
Enter. This input specifies the address of the storage device l3 for the calculation unit. The data (that is, the calculation result) to be written to the specified address is transferred to the program data signal line 16.
It is sent from. Therefore, at this time, bidirectional buffer 1
4 is controlled to pass data from the program data signal line 16 and send it to the arithmetic section storage device I3. Thus, the data from the program data signal line l6 is written to the address specified by the signal from the program address signal 1110. The calculations performed using the storage device 13 for the calculation section prepared in this way are performed as follows. During calculation, the input selection circuit 12 is configured to pass the signal from the input signal line 11. Further, the bidirectional buffer 14 is negated (turned off), and the bidirectional buffer l5 is
It is controlled so that the signal sent from the storage device l3 for the calculation section is passed to the output signal line 17. When an input is input from the input signal line 11, this input is used as an address signal to designate the address of the storage device 13 for the calculation section. Then, the data (calculation result) previously written to the designated address is read out to the output signal line 17 via the bidirectional buffer l5. Now you have obtained the calculation result. In addition, in Figure 1, it is a logic operation circuit with 1 input and 1 output, but if you want to have 2 inputs and 1 output, add another input signal line corresponding to input signal line 11 and use it for programming. The address signal 49lio may be made 2m bits parallel. Furthermore, the bidirectional buffers 14 and 15 and the input selection circuit 12 can be omitted. FIG. 2 shows a programmable program related to an embodiment of the present invention.
This shows a fuzzy logic circuit. The symbols correspond to those in Figure 1. 18 is a counter, 19 is a storage device for supplying logical operation results, and 20 is a main part. The main part 20 corresponds to the configuration shown in FIG. In the example shown in FIG. 2, a 6-bit parallel signal is used to specify the address of the storage device 13 for the arithmetic unit (therefore, the number of addresses that can be specified is 2'=64).
, The input method is two inputs. Therefore, input signal line 11
is the first input signal line 1 1-1 and the second input signal line 1l-
It consists of two input signal lines. Since these two inputs specify the address of the storage device 13 for the arithmetic section, each input signal line is 3-bit parallel so that the total is 6-bit parallel. The logical operation result supply storage device 19 is for preparing several sets of operation results to be written into the operation unit storage device l3. When it is desired to change the contents of a fuzzy logic operation, a set of operation results suitable for the operation is supplied to the operation section storage device l3. The counter l8 generates an address signal when writing the calculation result to the storage device 13 for the calculation section. Therefore, the address signal from the counter 18 is sent to the arithmetic section storage device 13 via the input selection circuit 12 in order to designate the address to be written, and the logical operation result is sent to the storage device 13 for the arithmetic unit to indicate the address where the data to be written is stored. The data is sent to the supply storage device l9. Although 6 bits are sufficient to specify the address of the storage device 13 for the arithmetic unit, the counter 18 receives 2 bits more than A,
~A0 8-bit output is output. These extra upper two bits (Ay, Aa) are sent only to the storage device 19 for supplying logical operation results, and are used to separate the aforementioned sets of operation results, as explained in FIG. 3 below. FIG. 3 shows the output bits A6, A? of the counter in FIG. This is a diagram explaining the role of. Figure 3 (a) shows the top 2
This shows that there are four combinations of pit values (a, b, c, d). Since 64 addresses can be specified with the lower 6 bits (Al to AI), the upper 2 bits end up specifying the entire address area with 64 addresses, as shown in Figure 3 (opening).
It serves to divide the address into four nod areas a, b, c, and d. Therefore, in this case, the logical operation result supply storage device 19 writes the contents to the calculation unit storage device 13 to the contents of the part a and the contents of the part b, for a total of four different types. This means that it has the ability to change the calculation contents. In other words, it becomes possible to change the calculation contents one after another according to the program. If a storage device with a large storage capacity is used as the logical operation result supply storage device 19, many types of operations can be handled. Note that the D. 1 to D2 are output terminals, and the outputs are also 3-bit parallel values in this case. Regarding the number of input levels, since the first and second input signal lines 11-1 and 11-2 are 3-bit parallel, the number of input levels is 2'', or 8. Therefore, as shown in FIG. This corresponds to dividing the membership function of a fuzzy set into 8 levels from 0 to 7. On the other hand, since the output of the arithmetic section storage device 113 is also 3-bit parallel, the output value is 0. There are 8 types of ~7.An example of the output relationship of the fuzzy logic operation circuit in such a case is shown below.Figure 8 shows the 2-input 1-output operation when the number of input levels is 8. This is a diagram showing an example of a child output relationship table.The value of the intersection between the level of the first input and the level of the second input is
This becomes the output of the storage device 113 for the calculation section. For example, when the level of the first input is "4" and the level of the second input is "6", the output is "4". This person, the output relation table is 2
The output is the smaller value of the two inputs.
This is an example of an arithmetic circuit called a "minimum circuit". This is because the huge number of people mentioned above (the number when n = 8) can be considered, and one of the output relation tables.
It's just a thing. Storage device 13 for the calculation unit and storage device 1 for supplying logical operation results
The storage device used for 9 is RAM (memory device that can be written and read at any time). EPROM (ultraviolet erasable read-only memory), E"FROM (@air erasable read-only memory).Flip-flop circuits etc. can be used, and in some cases R
It is also possible to use OM (KN Exclusive Memory). Also, a storage device 19 for supplying logical operation results.
It is also possible to omit and program directly from the digital computer. (Application example) In the above, a logic circuit that performs fuzzy logic operations is constructed in a storage device, and the result of the operation is obtained using a look-up table method. I proposed something that could be changed (programmable). By the way, the membership function is stored in a storage device. Therefore, in a fuzzy inference device whose main part is composed of a membership function part and a fuzzy logic operation part, the main part can be composed entirely of a storage device. This means that it is also possible to combine the membership function section and the fuzzy logic operation section into a programmable system. Next, we will explain an example of such an application. FIG. 9 shows a conventional fuzzy inference device. In FIG. 9, 8l to 84 are input signal lines, 85 to 88 are membership function storage devices, 89 and 90 are fuzzy logic operation circuits, 91.92 are counters, 93.94 are membership function storage devices, 95. 96 is a fuzzy logic operation circuit, and 97 and 9 are output signal lines. This fuzzy inference device has four input signal lines (81 to 8
In 4), there are two output signal lines (97.98), so
This is a device that executes one fuzzy production rule with four inputs and two outputs. Fuzzy logic operation circuits 89, 90, 95 and 96 are
It consists of a dedicated logical operation circuit. First, I will explain the overall operation. What is input from the input signal line 8l is a signal corresponding to the element in FIG. A membership function storage device 85 stores a certain membership function in advance, and outputs an output corresponding to an input signal. The same applies to membership function storage devices 86-88. The fuzzy logic operation circuits 89 and 90 are configured to perform predetermined fuzzy logic operations. These receive four inputs from the membership function storage device 85, etc.
Each outputs one output. The fuzzy inference device consists of a part called the condition part (or antecedent part) and a part called the result part (or consequent part). The part up to circuits 89 and 90 is the condition part. The part after that is the result part. Now, the output of the condition part is the fuzzy logic operation times of the result part +
Input to IPI95.96. In these as well, a predetermined fuzzy logical AND operation is performed.
The outputs of the membership function storage devices 93 and 94 are also input here. Membership function storage 93.9
4 input signals are supplied from counters 91 and 92, respectively. Counters 91 and 92 sequentially issue signals corresponding to elements of membership functions stored in membership function storage devices 93 and 94 from smallest to largest (or vice versa). Then, the corresponding membership function values are sequentially output. Fuzzy logical operation circuits 95.96 perform fuzzy AND operation between the output from the condition section and the membership function values sequentially output from membership function storage device 93.94, and the output is sent to output signal line 9798. can get. Figure 10 shows a fuzzy inference device to which the present invention is applied. The symbols correspond to those in FIG. and 89-1.90-1.95-1 and 96-1
is a storage device for the arithmetic section, B is a conditional section, and C is the entire fuzzy inference device. The difference from FIG. 9 is that the fuzzy logic operation circuits 89, 90
．． The point is that 95 and 96 are replaced with storage devices for the arithmetic unit by application of the present invention. It has already been described in detail that each fuzzy logic arithmetic circuit is replaced with a memory device for the arithmetic unit to make it programmable. In this application example, we propose to put together several parts constituting a fuzzy inference device and make them programmable in the manner described in FIGS. 1 and 2. For example, the condition part B surrounded by the dotted line in FIG. 10 can be performed all at once, or the entire fuzzy inference device C surrounded by the dashed line can be performed all at once. Of course, Keishiro (
It is also possible to perform only the entire fuzzy inference device C except for the condition part B) at once. Furthermore, in actual fuzzy inference applications, dozens of fuzzy inference devices C are often connected in parallel, but it is also possible to use all of them at once. FIG. 11 shows a basic principle diagram for making a fuzzy inference device programmable. In FIG. 11, 100 is a program address signal line, 101 and 102 are input signal lines, 103 is an input selection circuit, 104 is a storage section, 105,
106 is a bidirectional buffer, 107 is a program data signal line, and 108 is an output signal line. This configuration
It is similar to the figure. When the condition section B is made programmable all at once, the storage section 104 includes the membership function storage devices 85 to 88 and the calculation section storage devices 89-1 and 90-1. When the entire fuzzy inference device C is made programmable all at once, it includes membership function storage devices 93.94 and calculation section storage devices 195-1.96-1. When setting data in these in advance, the input selection circuit 103 selects the program address signal line l00. The address signal from the program address signal line 100 specifies the address of the membership function storage device 85 or the like, or specifies the address of the calculation unit storage device 189-i or the like. The program data signal line 107 is connected to the memory at the address specified by the program address signal line 100.
The data sent from the terminal via the bidirectional buffer 105 is stored. The program data signal line 107 sends data signals to the membership function storage device 85 and the like, and sends data signals to the calculation section storage device 89-1 and the like. When performing fuzzy logic operations, the input selection circuit 103 selects the input signal lines 101 and 102. Note that although the figure shows a case of two inputs, the number of inputs is not limited to two. With the input signal as address,
Output is retrieved from the membership function storage in a run-up table manner. In the storage device for the arithmetic unit, the input is an address,
The calculation results are retrieved using a lookup table method. The output thus obtained is stored in a bidirectional buffer 106
, and goes out to the output signal line 108.

【Effect of the invention】

According to the present invention as described above, the following effects are achieved. (2) When approximate fuzzy logic operations are performed using digital circuits, even if the number of levels is increased to achieve better approximation, only one memory device is required for the operation section. Conventionally, the types of fuzzy logic operations with an infinite number of levels have been enormous, and the number of dedicated arithmetic circuits that must be prepared has also been enormous. However, in the present invention, even if the content of the fuzzy logic operation to be performed changes, it can be handled by simply rewriting the storage content of the storage device for the calculation unit, so only one operation is required. ■ Research on fuzzy logic is currently being actively conducted, and there is a possibility that various fuzzy logic operations that have not been used in the past will be used one after another in the future. However, it is possible to take immediate action by simply rewriting the contents of the storage device for the arithmetic unit. ■ The main parts of the fuzzy inference device are all composed of storage devices, and all of them can be made programmable.

[Brief explanation of drawings]

Figure 1: Basic block diagram of the main parts of the present invention Second
Figure: Programmable fuzzy logic circuit according to an embodiment of the present invention. Figure 3: Output bits A & , A of the counter in Figure 2.
Figure 4 to explain the role of 'r...Figure 5 to illustrate an example of the characteristic function of a conventional set (crisp set)Figure 6 to illustrate an example of the membership function of a fuzzy set. ...Figure 7 shows an example of approximating a fuzzy set by dividing it into multiple levels...If the number of levels of one input is 2, then 2
Figure 8 explains that there are 16 types of input/output operators...Figure 9 shows an example of a 2-input, 1-output operator and output relationship table when the number of input levels is 8 ... Conventional fuzzy inference device Fig. lθ ... First fuzzy inference device to which the present invention is applied
Figure 1...Basic principle diagram when making a fuzzy inference device programmable In the diagram, IO is a program address signal line, 11
is an input signal line, 12 is an input selection circuit, 13 is a storage device for the calculation section, 14.15 is a bidirectional buffer, l6 is a data signal line for programming, 17 is an output signal line, 18 is a counter, and l9 is a logical operation result. supply storage device, 20 is the main part;
70 is a first input signal line, 7l is a second input signal line, 72 is an arithmetic circuit, 73 is an output signal line, 81 to 84 are input signal lines, 85 to 88 are membership function storage devices,
89.90 is a fuzzy logic operation circuit, 91.92 is a counter, 93.94 is a membership function storage device, 95
．． 96 is a fuzzy logic operation circuit, 97.98 is an output signal line, B is a conditional part, C is the entire fuzzy inference device, 100 is a program address signal line, 101 and 102 are input signal lines, 103 is an input selection circuit, 104 is the storage section, 105
, 106 are bidirectional buffers, 107 is a program data signal line, and 108 is an output signal line. N1 diagram

Claims (1)

[Claims] A programmable fuzzy logic circuit comprising a storage device for an arithmetic section in which an arithmetic result to be outputted corresponding to the input is stored at an address specified by the input, and the arithmetic result is rewritable. .