JPH02260462A - Thin-film memory element - Google Patents

Abstract

PURPOSE:To reduce a leakage current between a gate electrode and a source electrode and a drain electrode by a method wherein a gate insulating film is formed of a two-layer film, an insulating film on the side of the gate electrode is formed of a non-memory insulating film which does not have a charge storage function and an insulating film on the side of a semiconductor layer is formed of a memory insulating film having the charge storage function. CONSTITUTION:This element is formed of a gate electrode 12 which has been formed on an insulating substrate 11; a gate insulating film 13 which has been formed on the gate electrode 12 and which is composed of SiN(silicon nitride); a semiconductor layer 14 which is has been formed on the gate insulating film 13 so as to be faced with the gate electrode 12 and which is composed of i-type a-Si; and a electrode 16 and a drain electrode 17 which is have been formed via an n-type a-Si layer 15. In this case, the gate insulating film 13 is formed as a two-layer film where a non-memory insulating film 13a which does not have a charge storage function is formed on the side of the gate electrode 12 and a memory insulating film 13b having the charge storage function is formed on the side of the semiconductor layer 14. Thereby, it is possible to reduce a leakage current between the gate electrode 12 and the source electrode and the grain electrode 16, 17.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to electrically writable/readable/erasable thin film memory elements.

[Conventional technology]

Recently, thin film memory devices using thin film transistors have been developed as electrically writable/readable/erasable memory devices.

FIG. 5 shows a conventional thin film memory element, in which an inverted staggered thin film transistor is used. This thin film memory element has an inverted staggered thin film transistor having a memory effect formed on an insulating substrate l made of glass or the like.
A gate insulating film 3 made of 5IN (silicon nitride) is formed on the gate electrode 2 over almost the entire surface of the substrate 1, and an i film is formed on the gate insulating JII 3 to face the gate electrode 2. IM a-S l(
The semiconductor layer 4 is made of amorphous silicon (amorphous silicon), and a source electrode 6 and a drain electrode 7 are formed on the semiconductor layer 4 via an n-type A-81 layer 5.

Note that the gate electrode 2 and the source and drain electrodes 6 and 7
are connected to unspecified wiring. and,
The gate insulating film 3 is an insulating film having a charge storage function in order to provide a memory effect to the thin film transistor. The composition ratio St/N of Sl atoms and nitrogen atoms N is close to the stoichiometric ratio [SI /N - 0°75].
NM (SiN film of Si/N-0.85 to 1.15)
It consists of

This thin film memory element has systeresis in its gate voltage-drain current (current flowing between the source and drain) characteristics, making it difficult to read/write seriously. / Has a memory effect that can be erased.

[Problem to be solved by the invention]

However, in the conventional thin film memory element described above, the gate insulating film 3 is made of SiN with Si/N=0.85 to 1.15.
Since it is formed of a film, the gate electrode 2, the source,
There were problems in that the leakage current between the drain electrodes 6 and 7 was large and the memory characteristics were also poor.

This means that the SiN film with Sl/N-0.85 to 1.15 has a Sl/N ratio of stoichiometric ratio (Sl/N-0.75).
This is because the electrical resistance is lower than that of the SiN film, and therefore, in the conventional thin film element described above, a large leakage current flows between the gate electrode 2 and the source and drain electrodes 6 and 7. Furthermore, since charges injected from the semiconductor layer 4 side and trapped in the gate insulating film (SI Nfi) 3 are released to the gate electrode 2 side, the hysteresis width is small and sufficient memory characteristics cannot be obtained. could not.

The present invention has been made in view of the above-mentioned circumstances, and its purpose is to reduce the leakage rtS current between the gate electrode and the source and drain electrodes, and to increase the hysteresis width to improve the memory characteristics. An object of the present invention is to provide a thin film memory element with improved performance.

[Means to solve the problem]

The thin film memory element of the present invention is formed by laminating a gate electrode, a gate insulating film, a semiconductor layer, a source and a drain electrode, and the gate insulating film is a two-layer film, and the insulating film on the gate electrode side is The non-memory insulating film does not have a charge #i product function, and the insulating film on the semiconductor layer side is a memory insulating film having a charge storage function.

It is desirable that the non-memory insulating film is thicker than the memory insulating film.

[Effect]

That is, in the thin film memory element of the present invention, the gate insulating film is a two-layer film as described above, so that the 1u1 between the memory insulating film and the gate electrode, which has a charge storage function, does not have a charge storage function. A high-resistance non-memory insulating film is interposed, and this thin film memory element can reduce leakage current between the gate electrode and the source and drain electrodes, and also prevents leakage current from being trapped in the memory insulating film. Since the non-memory insulating film can prevent discharge of accumulated charges toward the gate electrode, the hysteresis width can be increased and memory characteristics can be improved.

In addition, in this thin film memory element, if the non-memory insulating film is made thicker than the memory insulating film, leakage 'Rs'
a can be made smaller (and the bisteresis width can be made larger).

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to FIGS. 1 to 3.

FIG. 1 shows a cross section of the thin film memory element of this embodiment, and here shows a thin film memory element using an inverted stagger type thin film transistor.

This thin film memory element has an insulating substrate 11 made of glass or the like.
An inverted staggered thin film transistor having a memory effect is formed on the inverted staggered thin film transistor.
A gate insulating film 13 made of SIN is formed on the gate electrode 12 over almost the entire surface of the substrate 11, and a type 1 a-3t is formed on the gate insulating film 13 to face the gate electrode 12. A source electrode 16 and a drain electrode 17 are formed on the semiconductor layer 14 via an n-type a-8I layer 15. Note that the gate electrode 12 and the source and drain electrodes 16 and 17 are connected to wiring (not shown), respectively. SiN film in which the composition ratio S1/N of silicon atoms St and nitrogen atoms N is close to the stoichiometric ratio ES amount/N-0,751) 1
3a, and a memory insulating film (SiN film with S1/N-0, 85 to 1.15) 13b having a charge storage function on the semiconductor layer 14 side. The thickness of the insulating film 13a is 2000, and the thickness of the memory insulating film 13b is 100.

This thin film memory element can be manufactured as follows. First, a metal film such as Cr (chromium) is deposited on the insulating substrate 11 to a thickness of 1000 mm, and the gate electrode 12 is formed by patterning. Next, a non-memory insulating film 13a is formed over the entire surface of the substrate 11.
and memory insulating film 13b are sequentially deposited to the above-mentioned thickness, and furthermore, an L-type A-8L semiconductor layer 14 and an N-type A-51 layer 15 are sequentially deposited thereon. The i-type A-81 semiconductor layer 14 is formed to a thickness of 1500 nm, and the nWla-81 layer 15 is formed to a thickness of 250 nm. The above non-memory
l! Deposition from layer 13a to n-type a-Si layer 15 is performed continuously by plasma CVD. That is, the deposition of the non-memory insulating film 13a is performed using 5IH, which is the main component gas.
The flow rate ratio of 4 and NH3 is 5INI to be deposited on the substrate 11.
The value of Sl/N of II is the stoichiometric ratio (Sl/N-0,7
5), and the memory insulating film 13 is
For the deposition of b, the flow rate ratio of 5IH4 and NH is adjusted so that the value of SL/H of the deposited SiN film is (Sl/N-0,85~
1.15). Further, the i-type a-S1 semiconductor layer 14 is deposited by switching the main component gas to 5IH4, and the nWa-Si layer 15 is deposited by switching the main component gas to 5IH4.
'PH3, which is a J1 impurity gas, is mixed and deposited at a predetermined flow rate ratio. Next, on the n-type a-S1 layer 15,
A metal film of 500 nm is deposited by a sputtering method or the like, and this metal film is turned by 1 to form source and drain electrodes 16 and 17, and the n-type a-31 layer below. 15 as source and drain electrodes 1
6. Remove all but the bottom part of 17, and then i 111
The a-S1 semiconductor layer 14 is patterned into a device shape to complete a thin film memory device.

In the thin film memory element described above, since the gate insulating film 13 is a two-layer film as described above, the leakage current between the gate electrode 12 and the source and drain electrodes 16 and 17 can be reduced (and the hysteresis width can be reduced). can be increased to improve memory characteristics.

That is, the thin film memory element has its gate insulating film 1
By making 3 a two-layer film as described above, a non-memory insulating film 13a having no charge storage function is interposed between the memory insulation film 13b having a charge storage function and the gate electrode 12. non-memory insulating film that does not have a charge storage function (St/N value is stoichiometric ratio [51/N-0,7
5iNl close to 51! >13a has high electrical resistance, so
According to this thin film memory element, it is possible to reduce the leakage current between the gate electrode 12 and the source and drain electrodes 16 and 17. Furthermore, according to the thin film memory element,
Since the non-memory insulating film 13a can prevent charges trapped in the memory insulating film 13b from being released toward the gate electrode 12, the hysteresis width can be increased and memory characteristics can be improved.

Note that the thin film memory element traps charges injected from the semiconductor layer 14 side at the interface of the gate insulating film 13 with the semiconductor layer 14 or in the gate insulating film 13.
Even if the gate insulating film 13 is a two-layer film as described above, the memory insulating film 1 has a charge storage function at the interface with the semiconductor layer 14.
As long as 3b exists, memory effect (hysteresis)
Further, in the thin film memory element, since the non-memory insulating film 13a is made thicker than the memory insulating film i3b, the leakage current can be made smaller and the hysteresis width can be made larger.

That is, FIGS. 2 and 3 show the results of examining leakage current and hysteresis width by keeping the total thickness of the gate insulating film 13 constant and changing the film thickness ratio of the memory insulating layer M13b in the gate insulating film 13. As shown, non-memory isolation 111
3 Gate insulating film with a film thickness ratio of 0% (memory insulating M1
In a thin film memory element with a gate insulating film of only 3b,
Although the leakage current is large (and the hysteresis width is small,
As the film thickness ratio of the non-memory insulation $13a is increased, the leak 'RX flow becomes smaller as shown in FIG. 2, and the hysteresis width becomes larger as shown in FIG. 3. Note that when the film thickness ratio of the non-memory insulating film 13a is set to 100%, the hysteresis width becomes almost 0. Therefore, like the thin film memory element, the non-memory insulation $13
If a is made thicker than the memory insulating film 13b, the leakage current can be reduced and the hysteresis width can be made larger. If the thickness of the memory insulating film 13b is 100, it is possible to obtain a thin film memory element with almost no leakage current and a sufficiently large hysteresis width.

FIG. 4 shows another embodiment of the present invention, and the thin film memory element of this embodiment is obtained by adding a second gate electrode 18 for reading to the thin film memory element of the above embodiment. , this second gate electrode 18 is an insulating film (Si/N value is stoichiometric ratio [S
i/N-0,75] via a SIN film) 19.

In this thin film memory element, writing and erasing are performed by applying a gate voltage to the original gate electrode 12, and reading is performed by applying a gate voltage to the second gate'I8 pole 18. In addition to the effects of the thin film memory element of the above-described embodiment, the memory element has the advantage that even if reading is repeated, stable reading can be performed at all times.

In the above embodiments, a thin film memory element using an inverted stagger type thin film transistor was explained, but the present invention is applicable to a thin film memory element using any of stagger type, inverted stagger type, and Cobranar type thin film transistors. Of course, it can also be applied.

〔Effect of the invention〕

The thin film memory element of the present invention is formed by laminating a gate electrode, a gate insulating film, a semiconductor layer, and a source and drain electrode, and the gate insulating film is a two-layer film, and
The insulating film on the gate electrode side is t! Since it is a non-memory insulating film that does not have an i charge storage function, and a memory insulating film that has an insulation 11%-G charge storage function on the semiconductor layer side,
Gate electrode and source.

The leakage current between the drain electrodes can be reduced, and the non-memory insulating film can prevent the PIi charge trapped in the memory insulating film from being released toward the gate electrode, so the hysteresis width can be reduced. The memory characteristics can be improved by increasing the size.

Furthermore, in this thin film memory element, if the non-memory insulating film is made thicker than the memory insulating film, the leakage current can be made smaller and the hysteresis width can be made larger.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of a thin film memory element showing an embodiment of the present invention, and FIGS. 2 and 3 show the relationship between the thickness ratio of the non-memory insulating film in the gate insulating film, leakage current, and hysteresis width. FIG. 4 is a sectional view of a thin film memory device showing another embodiment of the present invention, and FIG. 5 is a sectional view of a conventional thin film memory device. 11... Insulating substrate, 12... Gate electrode, 13...
・Gate insulating film, ], 3 a... Non-memory insulating film,
13b...Memory insulating film, 14...Semiconductor layer, 16
...Source electrode, 17...Drain electrode, 18...
・Second gate electrode for reading.

Claims (2)

[Claims] (1) A thin film memory element that can be electrically written/read/erased, which is formed by laminating a gate electrode, a gate insulating film, a semiconductor layer, and source and drain electrodes, and the gate insulating film is a two-layer film. Also, a thin film memory element characterized in that the insulating film on the gate electrode side is a non-memory insulating film that does not have a charge storage function, and the insulating film on the semiconductor layer side is a memory insulating film that has a charge storage function. (2) The thin film memory element according to claim 1, wherein the non-memory insulating film is thicker than the memory insulating film.