JPH02260596A - Method of mounting integrated circuit chip - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an integrated circuit device such as an LSI in which the wiring pitch of the lead wires is narrow, in which the lead wires are connected to the wiring pattern of the printed wiring board by soldering. It concerns how density is implemented.

[Conventional technology]

Some integrated circuit devices such as LSIs are equipped with a large number of lead wires, so that the wiring pitch of the lead wires is extremely narrow (for example, 0.3 aua or less).

A conventional mounting method for mounting such an integrated circuit element on a PWB (printed wiring board) will be described with reference to FIGS. 5 and 6.

A wiring pattern 12 is formed on PWBII. Then, as shown in FIG. 5, 1. This wiring pattern 1
2 are arranged in line at predetermined positions in accordance with the wiring pitch of the lead wires 13a in the integrated circuit element 13.

On each connection portion 12a in the wiring pattern 12,
First, a solder film 14 (not shown in FIG. 5) made of cream solder is printed or applied in accordance with the pattern of each connection portion 12a. Next, the integrated circuit element 13 is
vJ on ll, if! Then, each lead wire 13a is positioned on each solder film 14, respectively.

Then, the solder films 14 are melted by being heated by a far-infrared heater or passing through a PWBII in which the integrated circuit element 13 is placed in a flow furnace. Then,
As shown in FIG. 6, each lead wire 13a is connected to each connection portion 12a in the wiring pattern 12, and the mounting of the integrated circuit element 13 is completed.

The solder films 14 can also be melted by pressing a heater chip heated to a predetermined temperature on each lead wire 13a of the PWBll on which the integrated circuit element 13 is mounted. In addition, this thermocompression bonding method has the advantage that the melted solder film 14 also wraps around the lead wire 13a, which increases the connection strength and facilitates visual confirmation of the connection.

[Problem to be solved by the invention]

However, since these solder films 14... diffuse into the surrounding area when melted, the formation area becomes warped to some extent. Therefore, when mounting the integrated circuit element 13 in which the wiring pitch of the lead wires 13a is narrow as described above, the fifth
As shown in the figure, even in the conventional mounting method, the width of each connection portion 12a in the wiring pattern 12 is
The solder film 14 is formed to have a width equal to or narrower than that of the solder film 3a, so that the diffusion range of the solder film 14 is made as small as possible.

However, when mounting an integrated circuit element 13 in which the wiring pitch of the lead wires 13a is, for example, 0.3 na or less, there is a limit to how narrow the width of each connection portion 12a can be.

Therefore, in the conventional integrated circuit device mounting method, the wiring pitch of the lead wires 13a is extremely narrow in the integrated circuit device 1.
3, a problem arises in that it is not possible to completely prevent adjacent solder films 14 from coming into contact with each other and causing a short circuit between the terminals, as shown in FIG.

Further, when the solder films 14 are melted using a reflow oven and such contact occurs between adjacent solder films 14, the cream solder of one solder film 14 is absorbed by the other side, and the part of the solder film 14 is melted. Another problem occurred in that the lead wire 13a rose above the connecting portion 12a and became an oven.

Furthermore, when the solder film 14 is melted using a reflow oven, when the melted solder film 14 is cured, the misalignment between the lead wires 13a... and the connecting portions 12a... is normally corrected by self-alignment. It works to correct depending on the effect. However, when the adjacent solder films 14 melt and come into contact with each other as described above, the self-alignment effect that attempts to pull the lead wires 13a back to the correct position during curing is weakened, and the lead wires 13a... Another problem has arisen in that the positional shift of the

[Means to solve the problem]

In order to solve the above-mentioned problem, a method for mounting an integrated circuit element according to the present invention forms a solder film on each connection part in a wiring pattern of a printed wiring board, and each of the integrated circuit elements is mounted on the solder film. In an integrated circuit device mounting method in which each lead wire is connected to a wiring pattern by melting a solder film while the lead wires are stacked one on top of the other, the wiring pattern on the printed wiring board before the solder film is formed is A heat-resistant insulating film is formed over each connection part of the wiring pattern, and openings are formed in the heat-resistant insulating film so that adjacent leads are staggered in the longitudinal direction of the lead wire. The present invention is characterized in that the solder film is formed on each opening of the heat-resistant insulating film.

[For production]

Connection portions of wiring patterns are arranged on the printed wiring board in accordance with the wiring pitch of the lead wires in the integrated circuit element to be mounted.

In order to mount an integrated circuit element on this printed wiring board, first, at least the connecting portions of the wiring pattern are covered with a heat-resistant insulating film. Openings are formed at positions staggered in the longitudinal direction of the lead wire.

Next, a solder film is formed on each opening of this heat-resistant insulating film. However, the openings in the heat-resistant insulating film are formed in a staggered manner so that adjacent openings are staggered as described above. Therefore, the solder films are also formed in a staggered manner so that adjacent ones are staggered. These solder films are formed, for example, by printing or applying cream solder in a predetermined pattern. After the solder film is formed in this manner, the integrated circuit element is placed at a predetermined position on the printed wiring board, and each lead wire is aligned on the solder film.

Then, when the solder film is heated and melted, each lead wire and each connection portion of the wiring pattern are connected via this solder film. At this time, each solder film is melted and diffused into the surrounding area. However, as described above, since adjacent solder films are formed alternately, the possibility that the regions expanded by this diffusion overlap and come into contact with each other is extremely reduced. The solder film can be heated by a far-infrared heater or by passing the printed wiring board through a flow furnace. Further, thermocompression bonding can be performed by pressing each lead wire with a heater chip heated to a predetermined temperature.

When each lead wire and each connection part in the wiring pattern are connected via the solder film in the above manner, the mounting of the integrated circuit element is completed. At this time, it is almost impossible for adjacent solder films to come into contact with each other.

〔Example〕

An embodiment of the present invention will be described below based on FIGS. 1 to 3.

This embodiment shows a case where an integrated circuit element with a wiring pitch of lead wires of 0.3a* or less is mounted on a PWB (printed wiring board).

As shown in FIG. 1, there is a wiring pattern 2 on PWBl.
is formed. The connecting portions 2a... in this wiring pattern 2 are arranged at predetermined positions from the right side to the left side in the figure, in accordance with the wiring pitch of the lead wires 3a... in the integrated circuit element 3 shown in FIGS. 2(a) and 2(b). They are drawn out in parallel to the position.

In order to mount the integrated circuit element 3 on the above PWBI, first, the connection portion 2a of the wiring pattern 2 on this PWB I.
...A resist film 5 is formed at a position covering the entire surface. This resist film 5 is heat resistant to the melting temperature of the solder and has electrical insulation properties. Also,
This resist film 5 is coated with each connection portion 2 of the wiring pattern 2.
Rectangular openings 5a are formed along the connecting portions 2a at a portion of the connecting portions 2a. These openings 5a are arranged in staggered positions with gaps d between adjacent openings 5a in the left-right direction in the drawing.

Next, each opening 5 in these resist films 5...
a... On top, solder film 4... (not shown in FIG. 1)
form each. However, each opening 5a...
As described above, these are formed in a staggered manner so that the ones in contact with IiJ are staggered. Therefore, the solder films 4 are also formed in a staggered manner so that adjacent ones are staggered.

It should be noted that when the solder films 4 are formed in a staggered manner as described above, there is a margin in the interval between adjacent ones, so that pattern formation of the solder films 4 is facilitated.

These solder films 4 are formed by printing or applying solder cream in accordance with the pattern of each of the openings 5a. In this way, the solder film 4...
Once formed, the integrated circuit element 3 is placed at a predetermined position on the PWB l, and each lead wire 3a is connected to the solder 114.
...Align each on top.

Then, when the PWBl with this integrated circuit element 3 mounted thereon is heated by a far-infrared heater or passed through a flow furnace,
Solder film 4... is melted. Then, as shown in FIG. 2, the lead wires 3a... and the connecting portions 2a... in the wiring pattern 2 are connected, respectively. That is, the connection part 2 has the opening 5a of the resist film 5 formed on the right side in the figure.
In a, as shown in FIG. 2(a), the leading ends of the lead wires 3a are connected via the solder film 4. Also, a connecting portion 2a in which an opening 5a of the resist film 5 is formed on the left side in the figure.
Now, as shown in FIG. 2(b), the base side of the lead wire 3a is connected via the solder film 4.

The PWB 1 on which the integrated circuit element 3 is mounted melts the solder film 4 by pressing a heater chip heated to a predetermined temperature on each lead wire 3a, and melts the solder film 4 on each lead wire 3a. It is also possible to make a connection between the connecting portion 2a and the connecting portion 2a.

Here, when the solder films 4 are heated and melted as described above, these solder films 4 are diffused toward the periphery of the pattern formed by printing or coating. However, since the patterns of these solder films 4 are originally formed in a staggered manner, even if the area expands due to melting, as shown in Fig. 3, there is sufficient space between adjacent ones. A gap is created, and the possibility that the melted solder 1114 overlaps and contacts each other is extremely reduced.

When each lead wire 3a... and each connection part 2a... in the wiring pattern 2 are connected via the solder film 4... as described above, the mounting of the integrated circuit element 3 is completed.

At this time, there is almost no chance that the adjacent solder films 4 come into contact with each other.

FIG. 4 shows another embodiment of the invention. In this embodiment, the openings 5a on the resist film 5 are opened in an oval shape along the connecting portions 2a. When the opening 5a of the resist film 5 is opened in such a shape, the solder film 4 (not shown in FIG. 4) to be formed in the next step can be soldered easily, and the resist WA5 can be opened through the opening 5a. It can be made difficult to peel off. However, the shape of the opening 5a is not limited to the above rectangular or oval shape.

〔Effect of the invention〕

As described above, the integrated circuit element mounting method according to the present invention forms a solder film on each connection part in the wiring pattern of a printed wiring board, and connects each lead wire of the integrated circuit element on these solder films. In an integrated circuit mounting method in which each lead wire is connected to a wiring pattern by melting the solder film in an overlapping state, the wiring pattern on the printed wiring board before the solder film is formed is The heat-resistant insulating film is covered with a heat-resistant insulating film, and openings are formed in the heat-resistant insulating film so that adjacent leads are staggered in the longitudinal direction on each connection part of the wiring pattern. The solder film is formed on each opening of the heat-resistant insulating film.

As a result, the solder films are formed in a staggered pattern, so that even when the solder films are heated and melted and diffused into the surroundings, adjacent solder films hardly come into contact with each other.

Therefore, according to the mounting method of the present invention, it is possible to prevent short circuits between terminals, oven of lead wires, and misalignment of lead wires and wiring patterns when high-density mounting of integrated circuit elements on a printed wiring board is performed. This effect is achieved.

[Brief explanation of drawings]

1 to 3 show an embodiment of the present invention, in which FIG. 1 is a partial plan view showing a part of the wiring pattern on the PWB, and FIGS. 2(a) and 3(b) are respectively FIG. 3 is a partial vertical cross-sectional view of a PWB on which an integrated circuit element is mounted, and FIG. 3 is a partial plan view of the PWB with the integrated circuit element omitted after the solder film is melted. FIG. 4 shows another embodiment of the present invention, and is a partial plan view showing a part of the wiring pattern on the PWB. 5 to 7 show conventional examples, in which FIG. 5 is a partial plan view showing a part of the wiring pattern on the PWB, and FIG. 6 is a partial longitudinal section of the PWB on which integrated circuit elements are mounted. 7 are partial plan views of the PWB after the solder film is melted. 1 is PWB (printed wiring board), 2 is wiring pattern, 2
3 is a connection portion, 3 is an integrated circuit element, 4 is a solder film, 5 is a resist film (heat-resistant insulating film), and 5a is an opening. Patent applicant Sharp Tomizu Tomizu Co., Ltd.

Claims (1)

[Claims] 1. A solder film is formed on each connection part in the wiring pattern of the printed wiring board, and each lead wire of the integrated circuit element is overlaid on these solder films and the solder film is melted to separate each lead wire and wiring. In a method for mounting an integrated circuit element that connects to a pattern, at least the connecting portion of the wiring pattern on the printed wiring board before the solder film is formed is covered with a heat-resistant insulating film, and each connecting portion of the wiring pattern is covered with a heat-resistant insulating film, and each connecting portion of the wiring pattern is openings are formed in the heat-resistant insulating film at positions staggered in the longitudinal direction of the lead wire, and the solder film is formed on each opening of the heat-resistant insulating film. A method for mounting integrated circuit elements.