JPH02264504A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To use the result of monitor optionally for the control of the inside of a semiconductor integrated circuit by using a monitor circuit for feedback output terminal state so as to monitor the state of the output terminal thereby outputting the result of monitor from the monitor circuit. CONSTITUTION:Since an inverting clock output terminal 13 connects ground, an input to an inverter 20 is always zero and an input to a shift register 16 is always logical '1'. The content of the shift register 16 is shifted one after another by the clock input from an external oscillator 14 and go all to logical '1' after several clocks. In this case, inputs to plural-input NAND 17 are all logical '1' and a control signal 22 being its output is zero. If the inverted clock output terminal 13 is opened or at a power voltage level, the control signal 22 goes to logical '1'. The control signal 22 is optionally used as the control signal 22 of a semiconductor integrated circuit 11.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit that obtains an operating clock using an external oscillator.

[Conventional technology]

FIG. 3 is a block circuit diagram showing a conventional semiconductor integrated circuit and its peripheral circuits which obtain an operating clock using an external oscillator.

In the figure, (1) is a semiconductor integrated circuit, (2) is an oscillator, (8) is a feedback resistor, (4) is an inverter, (51 (6)
) is the capacitor, (A) is the external clock input terminal, (8
) is an inverted clock output terminal, and (9) is an operating clock.

Figure 4 shows a conventional semiconductor integrated circuit similar to that shown in Figure 3, which uses an externally input clock without using an external oscillator.
FIG. 3 is a block circuit diagram when trying to obtain an operating clock. .

In FIG. 4, (1) + (4) and (γ) to (9) are equivalent to those shown in FIG. The scream is an external oscillator.

The inverted clock output terminal (8) is open.

Next, the operation will be explained.

In FIG. 3, a circuit composed of an oscillator (2), a feedback resistor (8), an inverter (4), and capacitors (51, (6)) is a basic oscillation circuit called a Colpitts type.

The semiconductor integrated circuit (1) obtains an operating clock (9) from this oscillation circuit.

In FIG. 4, a semiconductor integrated circuit (1) obtains an operating clock (9) from an external oscillator α without using an external oscillator (2).

[Problem to be solved by the invention]

Conventional semiconductor integrated circuits are configured as described above, so when trying to obtain an operating clock using an external oscillator, the inverted clock output terminal is left open, so it is virtually unused. was there.

The present invention was made to solve the above-mentioned problems, and provides a semiconductor device that can monitor the state of an unused inverted clock output terminal and use the monitoring results as a control signal for a semiconductor integrated circuit. 1. [Means for solving the problem] A semiconductor integrated circuit having an internal oscillation circuit using an external oscillator according to the present invention has a feedback output terminal. A circuit is added to monitor the status of the

[Operation] In the semiconductor integrated circuit according to the present invention, the state of the output terminal is monitored by the feedback output terminal state monitoring circuit, and the monitoring circuit outputs the monitoring result.

The monitoring results can be used arbitrarily for internal control of the semiconductor integrated circuit. .

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block circuit diagram of a semiconductor integrated circuit and its peripheral circuits. In the figure, (11) is a semiconductor integrated circuit,
(12) is an external clock input terminal, and (i3) is an inverted clock output terminal. In this example, the inverted clock output terminal (13) is grounded. External oscillator (14)
The input clock signal is sent to the inverter (18), (
23) to generate an internal operating clock (15).

The inverted clock is inputted from the inverted clock output terminal (13 to the inverter Wt-, and to the shift register 0 port. The timing at which the shift register αQ shifts is determined by the external clock input terminal (inputted to 12, converted into an inverter) and several stages. The circuit is configured such that it can be determined by a signal output after passing through a delay circuit C!υ composed of an inverter.

In addition, the contents of each register in the shift register (1t9) are as follows:
It is constantly monitored by the multiple input NAND gate (lη), and is configured so that 10' is output as the control signal (2) only when the contents of the shift register (IQ) are all ``1''.

Next, the operation will be explained.

In Figure 1, since the inverted clock output terminal αJ is grounded, the input to the inverter (A) is always in the 0' state, and the input to the shift register (1e) is always in the 11' state. (The contents of the shift register qtil are shifted one after another by the clock input from 1st clock, and after a few clocks they all become 11". At this time, all the inputs to the multi-input NAND αη become 1, and the output of the control The signal ■ becomes 10'.

If the inverted clock output terminal a3 is open or at the power supply voltage level, the control signal becomes 11'.

The control signal is the control signal for the semiconductor integrated circuit 0υ,
Can be used arbitrarily.

FIG. 2 is a block circuit diagram when an internal operating clock is obtained from an external oscillator to the semiconductor integrated circuit αυ shown in FIG. In the figure, υ~α3, ff5)~θ
is the same as that shown in FIG. 1, so its explanation will be omitted. (The circuit shown in FIG. 2 is operationally equivalent to the conventional technique shown in FIG. 3.

〔Effect of the invention〕

As described above, according to the present invention, since the circuit for monitoring the state of the output terminal of the internal oscillator circuit is provided, it is possible to control the semiconductor integrated circuit when trying to obtain an internal operating clock by inputting an external clock. It is possible to generate control signals without providing new terminals.

[Brief explanation of drawings]

FIG. 1 shows a semiconductor integrated circuit according to an embodiment of the present invention,
A block circuit diagram of the peripheral circuit. Figure 2 is a block circuit diagram of the semiconductor integrated circuit shown in Figure 1 in which the internal operating clock is obtained from an external oscillator. Figure 3 is a conventional semiconductor integrated circuit and its surroundings. FIG. 4 is a block circuit diagram of the circuit in which the semiconductor integrated circuit shown in FIG. 3 is operated by an external oscillator to obtain a clock. In the figure, aυ is a semiconductor integrated circuit, α2 is an external clock input terminal, (131 is an inverted clock output terminal, σ is an external oscillator, (1 is a circular operation clock, αD is a shift register, (17) tri multi-manpower N A N D,
(1g+, αI, (21, c!31 is an inverter,
(211 is a delay circuit, 2 is a control signal, 2 is a resistor, 2 is an oscillator, and 2 is a capacitor. In the figure, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] A semiconductor integrated circuit that has an external resonator and an internal oscillation circuit, and is equipped with a circuit that monitors the state of the feedback output terminal.