JPH02265255A - Probe apparatus system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] [Purpose of the invention] (Industrial application field) The present invention relates to a probe device system.

(Prior Art) Due to recent technological innovations in semiconductor manufacturing processes, large quantities of IC chips for specific applications are required, and as a result, high-volume, low-mix production processes are increasing.

On the other hand, due to the high integration of ICs, the time required to measure one semiconductor wafer becomes longer, and it takes longer to load the wafer onto the measurement stage.
The operating rate of the loader section for unloading is decreasing.

Conventionally, in order to prevent such a decrease in the operating rate of the wafer loader section, a probe device has been provided in which a plurality of stage mechanisms for measuring wafers are arranged in one loader section (Japanese Patent Laid-Open Publication No. 57-68043. Japanese Patent Publication No. 1983
-115843, JP-A-60-491342. Japanese Patent Publication No. 61-188238. JP-A-81-220349, JP-A-63-129640).

(Problem to be Solved by the Invention) However, in the conventional probe device as described above, there is no problem when a single loader section is disposed between two measurement stages, but in reality When there are three or more measurement stages, the wafer cannot be transferred to the third measurement stage unless a special loader section is provided in addition to the single loader section.

Here, when testing the electrical characteristics of a semiconductor wafer, the withstand voltage of the wafer is determined by Δ-1 before the test, and selection processing is performed when performing a probe test, or
After the probe test is completed, marking processing for defective chips, open processing, short pattern bonding processing, etc. are performed according to the test results. In this way, when trying to supply wafers from the same loader unit for processing before and after probe inspection, the above processing does not need to be performed on all chips on the wafer, so the throughput is relatively high and it is necessary to use multiple machines. It is sufficient to provide one unit for each measurement stage.

In this way, when increasing the wafer supply operating rate for wafer electrical characteristic inspection and the processing required before and after the inspection,
Although it was necessary to share the loader section for three or more systems, this was not possible with the conventional configuration.

Therefore, an object of the present invention is to perform the electrical characteristic inspection of the object to be processed and the processing performed before and/or after this inspection by increasing the operating rate for supplying and collecting the object to be processed. The objective is to provide a probe device system that can.

C Configuration of the Invention] (Means for Solving the Problems) The present invention includes a moving path along which a carrier containing a plurality of objects to be processed moves, and a plurality of carriers disposed in the middle of this moving path to accommodate the objects to be processed. a plurality of measurement stages that perform electrical property testing; at least one processing device that is disposed midway along the moving path and performs processing that is performed before and/or after the electrical property testing; The present invention is characterized by further comprising a control means for controlling the carrier to stop at a position facing the measurement stage or the processing device on the path and for controlling the transfer operation of the object to be processed at this position.

(Function) In the present invention, the carrier containing the object to be processed is
It is movable with respect to the fixed stage and the processing equipment used before and after measurement, and the objects to be processed can be transferred at each stop position, so the objects to be processed can be supplied from the carrier and the objects to be processed can be transferred to the carrier. collection operations can be realized with a single carrier, and its operating rate can be significantly increased.

(Example) Hereinafter, an example to which the present invention is applied will be specifically described with reference to the drawings.

In FIG. 1, this probe device system includes, for example, two
Two carrier cassettes containing five wafers in a horizontal state spaced apart from each other at a predetermined pitch in the vertical direction are mounted on a moving section 10 serving as a carrier.
It is movable along a rail 20 which is a movement path, and the wafer entrance/exit can be rotated 180 degrees. Furthermore, the moving unit 10 is capable of transferring carrier cassettes to and from a carrier stocker 30 disposed at one end of the rail 20, for example. The carrier stocker 30 has a multi-stage shelf structure, and accommodates a large number of carrier cassettes carrying wafers that need to be measured with this probe system.

For example, on both sides of the rail 20, a wafer measuring section and a processing section required before and after the measurement are disposed. That is, an inspection system, for example, four probers 4, is installed on one side of the rail 20.
A measurement stage of a wafer prober is provided as a wafer prober 50, and a processing system such as a marking blower 50 is provided on the opposite side.
VTH prober 60. Processing system such as bare device 70
One each is installed.

The prober 40 places a wafer on it.

It has a measurement stage 42 that is movable in the Y plane, in the Z direction of the height direction, and in the θ direction that is the rotation direction of the Z direction,
A stylus such as a probe card (not shown) is arranged above the stage 42, and can make contact with the electrode pads of each chip on the wafer. Note that each stylus is connected to a tester (not shown) provided for each prober 40, and by transmitting a test signal pattern from this tester and monitoring its output, various electrical characteristic tests are possible. . Note that it is also possible to use one tester as four probers 40.

In the prober 40, pre-alignment of the wafer is possible on the measurement stage 42, and then the stage 4
2 is moved to an alignment bridge 44 having an image recognition function (not shown) above, and fine alignment can be executed from pattern recognition through image processing.

The marking prober 50 is also connected to a marking stage 52 . It has an alignment bridge 54, and marks defective chips using a scratch method, an inkjet method, or the like based on the inspection results from each of the probers 40.

The VTH prober 60 inspects whether or not the wafer has a predetermined withstand voltage before being measured by the prober 40, and performs a process of selecting wafers that require measurement.

This withstand voltage measurement is performed on chips at predetermined four or five points on the wafer.

The repair device 70 repairs only defective portions that can be repaired based on the inspection results of the prober 40. The contents of this repair can be roughly divided into short pattern cutting processing and open pattern connection processing. Examples of this type of bare device 70 include one that uses a focused ion beam to introduce sputtering gas or film-forming gas, connects short-circuited areas by sputtering, and connects open areas by deposition. Can be done (Special Publication Publication No. 83-25860.Monthly Sem1
conductor World 198B, I P9
3-103).

A carrier cassette of the moving section 10 and this moving section 10
The wafer handler 80 transfers the wafer to and from the prober 40 and the like that are in the process of being transported. As this wafer handler 80, the previous application by the present applicant (
The method disclosed in Japanese Patent Application No. 63-234461) can be suitably employed.

As shown in FIG. 2, this wafer handler 80 has a pair of multi-jointed arms 82, 84 arranged at an angle so that their movement planes intersect.

Then, an arm connecting member 86 is provided, which has an inclined part 86a whose both ends are inclined at the same angle as the multi-jointed arm 82, 84, and a horizontal part 86b formed between the inclined parts 86a,
The inclined portions 86a, 86a are connected to the pair of multi-joint arms 8.
It is rotatably supported at the moving end of 2.84. Then, on this arm connecting member 86, this arm connecting member 8
Tweezers 88 are fixed along a direction perpendicular to the longitudinal direction of 6. Note that the tweezers 88 have vacuum suction parts 88a, 88a that can support the wafer W by vacuum suction, for example, at both ends thereof.

One multi-jointed arm 82 has a first arm 82a and a second arm 82a.
Similarly, the other multi-jointed arm 84 is composed of a first arm 84a and a second arm 84b, and each arm has three joints (a, b, c) that are rotatable at both ends. ).

Further, the base 90 that rotatably supports the first arms 82a and 84a is connected to a motor 92. One first arm 82a is rotationally driven by a belt 94, and the base 90 itself is rotatable in the θ direction in FIG. 2 and vertically movable in the Z direction, which is the height direction. There is. As a result, the tweezers 88 are movable in directions A and B in FIG.
In addition, the tweezers 88 can be rotated and moved up and down.

Next, the drive control system of this probe device system will be explained with reference to FIG.

The CPU 100 is in charge of all controls of this system, and includes information on the type and number of wafers in each carrier cassette lot in each carrier cassette in the carrier stocker 30, and information on wafers in the carrier cassette currently being measured or processed (alignment information). , chip addresses to be measured, defective chip addresses, defect contents, etc.) are stored and managed. This C
The following various drive control units are connected to the PU 100. The carrier movement control section 102 controls driving and stopping of the moving section 10 on which the carrier cassette is mounted. Four prober control units 104 are provided corresponding to each prober 40 and the wafer handler 80 facing thereto,
It drives and controls the measurement operation of each prober 40 and the loading and unloading of wafers onto that prober 40. Maki leg prober control section 106. The VTH prober control section 108 and the repair device control section 110 are also designed to individually control the operation of each terminal processing section and the corresponding wafer handler 80.

Next, the effect will be explained.

Carrier movement control unit 102 receives instructions from CPU 100
Based on the control of the carrier stocker 30, the moving unit 10
Two carrier cassettes carrying wafers of the same type are mounted on the moving unit 10, and the moving unit 10 is first transported to a position corresponding to the VTH prober 60 and then stopped. and,
This VTH prober 60 tests the withstand voltage of chips at four to five predetermined points on all wafers in the carrier cassette. This measurement result is
For defective wafers, a system consisting of subsequent measurements is performed. Note that loading and unloading of the wafer at this time will be described later.

Next, the moving section 10 is transported to a position corresponding to one prober 40 and stopped. Thereafter, based on the corresponding control of the prober control section 104, the moving section 10
A wafer loading operation is performed from one of the carrier cassettes mounted on the carrier cassette. That is, the wafer handler 80 is moved up and down to set the Z-direction position, and then the motor 92 is driven to move the bin set 88 to the back surface of the wafer, and the wafer is taken out from the carrier cassette in a floating state. After that, the wafer handler 80 is
The loading operation is completed by rotating the wafer by 80'' and further driving the motor 92 to mount the wafer on the measurement stage 42.

After this, pre-align the wafer as described above.

Fine alignment is performed, then stage 4
A stylus is brought into contact with the wafer on 2, and various electrical characteristic tests are carried out using a tester (not shown).

At this time, the address of the defective chip and the details of the defect are determined by the CPU.
100 and will be stored.

In parallel with this, a similar wafer loading operation is performed for each of the second and subsequent probers 40, and each prober 4
Measurements are started sequentially at 0.

At this time, loading of a wafer determined to be defective in the previously performed withstand voltage measurement is prevented.

Since the measurement start timings of the probers 40 are different from each other, the inspection end times for one wafer, which are completed within a predetermined time, are also different from each other. Therefore, moving part 1
Under the control of the carrier movement control unit 102 which receives commands from the CPU 100, the prober 40 sequentially moves and stops at the position corresponding to the measured wafer, and moves the measured wafer to its original position in the carrier cassette. It will be unloaded to . At this time, since both ends of the bin set 88 are vacuum suction parts 33a and 88a, the next new wafer is supported by one vacuum suction part 88a, and the other vacuum suction part 88a is placed on the measurement stage. The measured wafer is received from 42, and this bin set 88 is transferred to 180.
By rotating, a new wafer can be loaded immediately, improving throughput. In addition, the moving unit 10
The prober 4 then transfers the wafer by
0 is known in advance by the CPU 100, the throughput can be further improved by waiting at that position and immediately transferring the wafer.

On the other hand, the wafer whose measurement has been completed is then transferred to the marking prober 50 by the movement of the moving unit 10, and the wafer is set in the prober 50 by performing a similar loading operation. In this marking prober 50, the CPU 10
Based on the defective chip position information stored in 0, the marking operation is executed only for this defective chip.

Further, for wafers having chips for which bit relief is determined by the CPU 100, the moving unit 10 is similarly transported to the repair device 70, where the above-described bit relief measures are performed.

In this embodiment, one marking prober 50 and one repair device 70 are arranged for each of the four probers 40, but this is due to the wafer yield (for example, 70 to 80%), marking processing time, and bit rate. This is because, considering the repair time and the probe test time for all chips, a ratio of 421 units will operate sufficiently efficiently.

In addition, although there is only one VTH prober 60, this inspection also requires 4 to 5 chips per wafer, so
This is because it is completed in a sufficiently short time compared to the probe time. In order to increase the operating rate of this moving unit 10,
The CPU 100 specifies the destination of the moving unit 10 and measures all the wafers in the carrier cassette;
Processing etc. will be carried out.

As described above, in the apparatus of this embodiment, since the moving unit 10 moves the wafer in each carrier cassette to the plurality of probers 40 and each processing unit required before and after measurement, the wafer is moved sequentially to each unit where measurement and processing are completed. On the other hand, it is possible to perform wafer supply and retrieval operations with high operating efficiency, and compared to a system with a loader section for each section, it is expensive and the installation area of the equipment in the lean room is significantly reduced. Since the total number of units may be small, it is possible to significantly reduce the cost of manufacturing equipment.

Note that the present invention is not limited to the above embodiments, and various modifications can be made within the scope of the gist of the present invention.

For example, in the above embodiment, only the carrier cassette is mounted in the moving unit 10, and a wafer handler 80 for loading and unloading is provided for each measurement unit, but in the embodiment, a transfer arm is built in the moving unit 10. Alternatively, as shown in FIG. 4, the wafer handler 80 may be movable over the placement positions of each part, and the loading and unloading operations of wafers to and from each part along the same line can be performed. The handler 80 may also be used for both purposes.

Furthermore, various modifications can be made to the number of probers 40 and their respective processing sections before and after the n1 constant that are included in one probe device system, and various combinations that can efficiently operate the moving section 10 are possible.

In addition, in the present invention, since it is necessary to move the carrier cassette,
There is a concern that dust will be generated due to this operation, but this can be solved by evacuating the moving parts and creating a structure that does not scatter dust into the space where the wafer is present. [Effects of the Invention] As explained above, according to the present invention, a plurality of measurement stages and the supply and collection of objects to be processed to the processing section performed before and/or after the 111J determination can be performed in a common manner. This can be carried out using a carrier, and therefore the operating rate of the carrier that performs one-time supply and recovery of objects to be processed can be greatly improved, and a probe device system particularly suitable for measuring a large quantity and small number of products can be provided.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a schematic explanatory diagram of an embodiment of a probe device system to which the present invention is applied; FIG. 2 is a schematic perspective view of the wafer handler in FIG. 1; FIG. 3 is a schematic perspective view of the wafer handler in FIG. , a control system block diagram of the embodiment apparatus shown in FIG. 1, and FIG. 4 is a schematic explanatory diagram for explaining a modification in which the wafer handler is movable. DESCRIPTION OF SYMBOLS 10... Moving part, 20... Rail, 30... Carrier stocker, 40... Prober 42... Measurement stage, 50
... Marking prober 60 ... TVH prober 70 ... Repair device, 80 ... Handler 100 ... Control means. Agent Patent attorney Inoue - (1 other person) A ＼ Figure Figure

Claims (1)

[Claims] (1) A moving path along which a carrier containing a plurality of objects to be processed moves; a plurality of measurement stages arranged along the moving path to test the electrical characteristics of the objects to be processed; and the moving path. at least one processing device disposed in the middle of the electrical characteristic test for performing processing to be performed before and/or after the electrical characteristic test; What is claimed is: 1. A probe device system comprising a control means for controlling the stop of the carrier and controlling the transfer operation of the object to be processed at this position.