JPH0226791B2 - - Google Patents

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to the control of a semiconductor device having a control electrode, particularly a thin film semiconductor device in which a current flowing through a gap between the control electrodes is controlled by an electric signal applied to the control electrode. Concerning structures for improving performance.

[Purpose of the invention]

Conventionally, several types of semiconductor devices have been proposed in which a current flowing through a gap between control electrodes embedded in a semiconductor is controlled by an electric signal applied to the control electrodes. FIG. 1 shows a typical cross-sectional structure, in which a current flowing from a source electrode 1 into a semiconductor 2 and flowing out from a drain electrode 3 is channeled through a gate electrode 4 embedded in the semiconductor 2. It is something to control. In this case, in order to make the action of the gate electrode 4 effective, it is necessary that the width d of the gap formed in the gate electrode 4 is less than or equal to the gap l between the source electrode 1 and the drain electrode 2. It is. In order to realize such a device, for example, a drain electrode film, a semiconductor film, a gate electrode film,
Sequentially forming a semiconductor film and a source electrode film,
A method is used in which a slit is formed in the gate electrode film in the middle of the process. For processing to form slits in the gate electrode film to form the gate electrode 4, microfabrication techniques such as photolithography and electron beam lithography are usually used. The accuracy of such lithography technology is currently limited to 500 nm to 1 μm, and in order to achieve higher precision processing than this, advanced processing technology such as X-ray lithography must be used. On the other hand, it has become possible to control the accuracy of forming semiconductor films and electrode films to about 1 nm or less by using molecular beam epitaxy technology. Therefore, in order to operate the semiconductor device at high speed, it is possible to shorten the distance l between the source electrode 1 and the drain electrode 3 to about 10 nm, but it is not possible to make the gap d of the gate electrode 4 sufficiently narrow. Therefore, the current control effect of the gate electrode 4 could not be exhibited, resulting in a drawback that it could not be used as a practical semiconductor device.

[Purpose of the invention]

An object of the present invention is to eliminate the above-mentioned drawbacks and to obtain a sufficient control effect even if the distance l between the source electrode 1 and the drain electrode 3 is much smaller than the width d of the gap in the gate electrode 4. Therefore, it is an object of the present invention to provide a semiconductor device that can operate at extremely high speed without using advanced lithography technology.

[Summary of the invention]

In order to achieve the above object, the thin film semiconductor device of the present invention includes a source electrode and a drain electrode formed opposite to each other, a semiconductor thin film formed between the source electrode and the drain electrode, and a material that makes a Schottky contact with the semiconductor. and a thin film gate electrode embedded in the semiconductor layer and having a current path consisting of a slit, the width of the slit being 1 to 100 times the distance between the source and drain electrodes. A thin film semiconductor device having a double width and controlling the magnitude of a current flowing in a direction substantially perpendicular to the surface of the thin film gate electrode by an electric signal applied to the thin film gate electrode, wherein the current flows through the narrow gap. has a thin layer of high conductivity extending in a direction substantially perpendicular to the direction of and having a thickness shorter than the mean free path of the carrier, and most of the current flows through the thin layer of high conductivity. It is characterized by FIG. 2 is a diagram showing the principle of the present invention. This thin layer 5 may be electrically connected to the gate electrode 4, but in order to achieve the object of the present invention, this thin layer is not necessarily electrically connected to the gate electrode. It doesn't require that. The source electrode 1 and the drain electrode 3 are usually formed of metal such as Al, Mo, W, Ni, etc., but since these electrodes and the semiconductor matrix 2 are in ohmic contact, the interface between the electrode and the semiconductor is highly Preferably, it is a doped n ⁺ layer or p ⁺ layer. In the present invention, these highly conductive layers are also considered to be part of the source or drain electrode. Also,
When the semiconductor is silicon, a highly conductive substance such as metal silicide is usually formed at the interface between the metal and the semiconductor due to the reaction between the metal and the semiconductor. Therefore, it goes without saying that the source electrode 1 and the drain electrode 3 do not necessarily have to be made of metal, and even if they are made of a highly conductive non-metallic substance or a composite film of these and a metal, they satisfy the requirements of the present invention. Nor.

It is desirable that electrons or holes travel in the semiconductor 2 as fast as possible. Therefore, it is desirable that the semiconductor contains as few impurities as possible that reduce carrier mobility due to impurity scattering. Therefore, it is desirable that the semiconductor 2 be an intrinsic semiconductor containing almost no impurities that serve as donors or acceptors, or an n-type or p-type semiconductor that is close to intrinsic and contains a small amount of these impurities. Therefore, the current between the source and drain is mainly carried by excess carriers injected into the semiconductor 2 from the source electrode 1 or the drain electrode 3.

Gate electrode 4 has source electrode 1 and drain electrode 3
It controls the magnitude of the current flowing through the slit formed there. What is important here is that most of the current flowing between the source electrode 1 and the drain electrode 3 must flow through the slit formed in the gate electrode 4 without flowing into the gate electrode 4. That is to say. Therefore, the material for the gate electrode 4 is a material that forms a Schottky junction with the semiconductor 2, such as a W alloy.
A metal material such as Al is used. More preferably, the gate electrode 4 is sandwiched between high-resistance materials such as insulators to prevent current from flowing directly between the gate electrode 4 and the source electrode 1 or between the gate electrode 4 and the drain electrode 3 as much as possible. It is valid. In addition, regarding the voltage application relationship for operating the device, the gate voltage is set so as to reverse bias the above-mentioned junction, and carriers flow into the gate electrode 4 from the semiconductor 2, or vice versa.
Prevents hecaria from leaking out.

Further, when it is desired to flow a relatively large current in the element having the structure of the present invention, a gate electrode having a plurality of gaps can be used for the pair of source/drain electrodes.

The conductive layer 5 introduced in the present invention may also be formed of a metal film, a highly conductive non-metallic material, or a composite thereof, like the other electrodes, but between the source and drain. This layer 5 needs to be thin enough to allow most of the current to pass through it. The role of this layer 5 is to reduce the potential difference within the layer 5 and effectively transmit the potential of the gate electrode 4 to the vicinity of the center of the gap formed in the gate electrode. This effect is great if the electrode 4 is electrically connected, but it is effective even if the electrode 4 is not necessarily connected. The base regions of bipolar transistors or metal base transistors that have been put into practical use or have been proposed have an effect similar to that of the conductive thin layer 5 of the present invention, and have the effect of reducing the potential difference within the base region. .

Figure 3a shows an npn type bipolar transistor.
b is the cross-sectional structure of each metal base transistor. In the bipolar transistor, 6 is an emitter electrode, 7 and 9 are n layers, 8 is a p-type base layer, and 10 is a collector electrode. In addition, in a metal base transistor, 11 is an emitter electrode;
12 and 14 are n-type semiconductor layers, 13 is a metal base layer, and 15 is a collector electrode. However, in these transistors, unlike the semiconductor device of the present invention, when the width of the base 8 or 13 is reduced in order to improve high frequency characteristics, that is, when the base layer is made thinner, the base resistance increases and the resistance between the emitter and base increases. There was a problem that the charging time of the capacitor became longer and the high frequency characteristics deteriorated. The transistor of the present invention has a different operating principle from these conventional transistors, and is essentially a field effect transistor, and its high frequency characteristics are determined by the series resistance of the gate electrode 4 and the source-gate connection. It is a time constant determined by the capacitance. Therefore, it is possible to improve the high frequency characteristics by reducing this time constant by a method such as reducing the series resistance of the gate electrode. The role of the conductive layer 5 on high frequency characteristics is different from that of the base 8 or 13 of a bipolar transistor or metal base transistor, and this means that if this conductive layer 5 were not present, the specific resistance of the conductive layer 5 would be It is clear from the fact that when the thickness becomes the same as that of the surrounding intrinsic semiconductor layer 2, the transistor shown in FIG. 2 becomes the same as the conventional buried gate type transistor shown in FIG. On the other hand, it is also clear that a bipolar transistor or a metal base transistor without the base region 8 or 13 no longer functions as a semiconductor active element.

The upper limit of the frequency band in which the presence of the conductive layer 5 is meaningful is determined by a time constant determined by the dielectric relaxation time of this layer. Therefore, regardless of the thickness of the conductive layer 5, the upper limit of the operating frequency is determined only by the dielectric constant and conductivity of this layer. This is also a major difference from bipolar transistors and metal-based transistors, and the thickness of conductive layer 5 can be selected independently of the operating band of this device. conductive layer 5
When carrier scattering occurs in the source and drain, the effective carrier travel time between the source and drain increases
It is convenient for high-speed operation to select the thickness of the conductive layer 5 to be shorter than the mean free path of the carrier.

As explained above, the conductive layer 5 forms an equipotential surface in the semiconductor 2 and has the function of effectively transmitting potential changes of the gate electrode 4 into the semiconductor 2. Furthermore, even if this layer 5 and the gate electrode are not necessarily electrically connected, their mere presence in the vicinity exhibits an effective effect. Further, the conductive layer 5 does not need to be a single layer, and may be composed of a plurality of independent layers.

The semiconductor 2 used in the present invention includes silicon, germanium, GaAs, Ga _x Al _1-x As,
- group semiconductors such as GaP and InP, CdS, CdSe,
Any - group semiconductor such as ZnTe may be used,
Moreover, these semiconductors are not limited to single crystal, but may be polycrystalline or amorphous. The thickness of the semiconductor excluding the electrode part and the highly doped part at the interface, that is, the source-drain distance is 10 nm to 10 μm.
The thickness of the conductive layer 5 is preferably 1 nm to 1 μm.
It is desirable that Originally, it is desirable that the width of the gap in the gate electrode 4 be approximately the same as the source-drain interval, but due to the presence of the conductive layer 5, the width of the gap in the gate electrode 4 is
As shown in the figure, the control effect is observed up to about 100 times the source-drain distance. Therefore, it is desirable that the width of the gap in the gate electrode 4 is 1 to 100 times the source-drain distance. The gate electrode 4 has a lower resistance than the conductive layer 5 and has a thickness of
It has a thickness of 1 nm to 10 μm and is usually larger than the conductive layer 5.

[Embodiments of the invention]

The present invention will be explained below using examples.

Example 1 As shown in FIG. 5, a semi-insulating GaAs substrate 16 is doped with S and has a carrier concentration of 10 ¹⁸ cm ^-3 n ⁺ -.
The GaAs layer 17 is 1 μm thick with a carrier concentration of 10 ¹⁶ cm ^-3
- Form a GaAs layer 18 with a thickness of 0.3 μm. On top of that
A striped electrode 19 of a metal such as a W alloy that forms a Schottky junction with GaAs is formed using lithography technology. The thickness of the electrode is
0.2 μm, and the stripe spacing is 1 μm. After that, a p ⁺ GaAs layer 20 doped with Zn and having a carrier concentration of 10 ¹⁸ cm ^-3 surrounds this striped electrode 19.
is 0.1 μm, and the n-GaAs layer 21 with a carrier concentration of 10 ¹⁶ cm ^-3 is 0.3 μm and n ⁺ − with a carrier concentration of 10 ¹⁸ cm ^-3 .
A GaAs layer 22 with a thickness of 0.2 μm is formed, and Au-Ge is formed on the top.
The ohmic electrode 23 is formed from an alloy. The striped electrode 19 and the p ⁺ -GaAs layer 20 are electrically connected. Each GaAs layer is grown by molecular beam epitaxy at a relatively low substrate temperature of around 600°C to prevent mutual thermal diffusion of impurities. The device having such a structure operates as a vertically structured field effect transistor in which the n ⁺ -GaAs layer 17 is the drain, the n ⁺ GaAs layer 22 is the source, and the striped electrode 19 is the gate. In this case, the source-drain distance is n-GaAs layer 18, p ⁺ -GaAs layer 20,
The sum of the thicknesses of the n-Ga-As layers 21 is 0.7 μm. Unlike the base of a bipolar transistor, the p ⁺ -GaAs layer 20 is a striped gate electrode 19.
It functions to effectively transmit the electrical potential of the carrier to the channel area where the carrier runs.

Example 2 As shown in Figure 6, n ⁺ -Si with a carrier concentration of 10 ¹⁸ cm ^-3
An n-Si layer 2 with a carrier concentration of 10 ¹⁵ cm ^-3 is formed on the substrate 24.
5 to a thickness of 0.3 μm. The surface of the n-Si layer 25 is oxidized by a method such as plasma oxidation to form an insulating SiO ₂ film 26. Furthermore, a metal film 27 is formed thereon, and the SiO ₂ film 26 and the metal film 2
7 is processed into a stripe shape by lithography. The carrier concentration is 10 ²⁰ cm ^-3 so as to wrap around this stripe electrode 27 where the gap between the stripes is 1.5 μm.
A p ⁺ -Si layer 28 is formed to a thickness of 0.1 μm. On top of that, an n-Si layer 29 with a carrier concentration of 10 ¹⁵ cm ^-3 is placed at 0.3 μm.
m, and on top of that, n ⁺ −Si with a carrier concentration of 10 ¹⁸ cm ^-3
A layer 30 with a thickness of 0.1 μm and a metal electrode layer 31 are formed. In this device, the n ⁺ -Si layer 30 serves as a source, the n ⁺ -Si substrate 24 serves as a drain, and the metal film 27 serves as a gate.
The source-drain distance is 0.7 μm. A highly conductive p ⁺ -Si layer 28 in contact with the gate electrode 27 serves to effectively transfer the gate potential to the carrier travel region.

Example 3 As shown in FIG. 7, an n ⁺ polycrystalline silicon film 33 with a thickness of 0.5 μm is formed on a quartz substrate 32 by a vapor phase reaction method. On top of that is an undoped polycrystalline silicon film 3.
4 to a thickness of 0.3 μm, and then a 0.1 μm Al ₂ O ₃
Membrane 35, 0.1 μm Al film 36, 0.1 μm Al ₂ O ₃ film 3
A three-layer structure of No. 7 is made, and these three layers are processed into a stripe shape using lithography. The spacing between the stripes is 2 μm.

A 20 μm thick Sb layer is placed around this stripe.
A film 38 is formed, and an undoped polycrystalline silicon film 39 with a thickness of 0.3 μm and an n ⁺ polycrystalline silicon film 40 are formed thereon.
Al electrodes 41 having a thickness of 0.1 μm are sequentially formed. The source-drain distance of this device is 0.6 μm,
Although the Sb film 38 is not necessarily in contact with the gate electrode 36, Sb acts as a donor in silicon,
Since a thin layer of high conductivity is formed, the gate electrode 36
is effectively transferred to the current path.

〔Effect of the invention〕

As is clear from the above embodiments, the present invention is extremely useful in that the mutual conductance does not decrease even if the source-drain interval of a vertically structured thin film semiconductor device having a control electrode with a narrow gap is narrowed, and the present invention can be used at high speeds. Great effects can be obtained when applied to semiconductor devices.

Although a single control electrode and a highly conductive thin film are shown in the examples, it is possible to use a plurality of control electrodes and corresponding highly conductive thin layers, similar to vacuum tubes such as tetrodes and pentodes. Not even.

[Brief explanation of drawings]

FIG. 1 shows a semiconductor device with a conventional structure in which a control electrode is embedded in the semiconductor, FIG. 2 shows the principle of the present invention, FIG. 3 shows a cross-sectional view of the conventional semiconductor device, and FIG.
The figure shows the effects of the present invention, and FIGS. 5 to 7 each show examples of the present invention. 1... Source electrode, 2... Semiconductor between the source electrode and the drain electrode, 3... Drain electrode,
4...Gate electrode, 5...Thin layer.

Claims (1)

[Claims] 1 A source electrode and a drain electrode formed opposite to each other, a semiconductor thin film formed between the source electrode and the drain electrode, and a material that forms a Schottky junction with the semiconductor, and is embedded in the semiconductor layer. and a thin film gate electrode having a current path consisting of a slit, the width of the slit being 1 to 100 times the distance between the source electrode and the drain electrode, and the width of the slit being 1 to 100 times the width of the gap between the source electrode and the drain electrode. A thin film semiconductor device that controls the magnitude of a current flowing in a direction substantially perpendicular to the plane of the thin film gate electrode by a signal, the thin film semiconductor device having a carrier extending in a direction substantially perpendicular to the direction of the current in the narrow gap. 1. A thin film semiconductor device comprising a highly conductive thin layer having a thickness shorter than a mean free path, wherein most of the current flows through the highly conductive thin layer.