JPH02275671A - Semiconductor device - Google Patents

Abstract

PURPOSE:To form wirings having small steps with low layer resistance and low wiring capacity by so forming a polycrystalline silicon layer of an electrode part as to be thicker than that of a wiring part. CONSTITUTION:An element isolating field oxide film 2, an oxide film 3 are provided on a silicon substrate 1, a contact opening 4 is opened, a first polycrystalline silicon film 5 is deposited on a whole surface, As ions 6 are then implanted, annealed and then patterned. In order to form wirings, a second polycrystalline silicon layer 7 is patterned. Here, the layer 5 of the electrode part is so formed as to be thicker than that 7 of a wiring part. Thus, it can prevent a PN junction formed shallowly in a semiconductor substrate from breaking down, the silicon film of the wiring part is formed to be thinner to reduce its layer resistance.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device having metal silicide electrode wiring.

[Conventional technology]

Conventionally, in semiconductor devices, metal silicides such as platinum silicide, titanium silicide, tungsten silicide, and molybdenum silicide have been used for leading out electrodes from semiconductor substrates, contacts for Schottky barrier diodes, interconnections between elements, and the like.

FIGS. 2(a) to 2(c) are cross-sectional views showing an example of a conventional method for manufacturing a semiconductor device in order of steps.

First, as shown in FIG. 2(a), a field oxide film 2 for element isolation is formed on a silicon substrate 1 by a conventional method.
Oxide 'fIIA3 is provided, and the oxide film 2 is selectively etched to provide an opening 4 for forming an emitter.

A polycrystalline silicon film 5 is deposited to form an emitter.
For example, As ions 6 are implanted.

Next, as shown in FIG. 2(b), the polycrystalline silicon film 5 is patterned using photolithography to form an electrode portion 5a and a wiring portion 5b.

Next, as shown in FIG. 2(c), a metal that forms silicide, such as platinum, is deposited on the entire surface and heat-treated.
Platinum silicide 18a, 8b on the surface of the polycrystalline silicon film
form. The thickness of the platinum silicide layer in the electrode portion 8a and the wiring portion 8b of the platinum silicide layer is the same.

According to the inventor's experiments, the layer resistance of the metal silicide layer basically decreases in inverse proportion to the thickness of the metal silicide layer, but when the thickness of the metal silicide layer exceeds a certain thickness, the resistance of the metal silicide layer decreases. It was found that this would destroy the PN junction provided. For example, when platinum is used as the metal for silicide, the layer resistance does not change much if the thickness of the wiring portion 5b of the polycrystalline silicon layer is equal to or greater than the thickness of the deposited platinum.

[Problem to be solved by the invention]

As mentioned above, metal silicide electrodes and wiring are required to have a low layer resistance in the interconnection parts between elements, and in order to lower the layer resistance, it is better to form a thick metal layer for silicide. However, if the metal layer is formed thickly, the metal layer at the electrode lead-out portion of the semiconductor substrate is also formed thickly, which has the disadvantage of destroying the PN junction shallowly provided in the semiconductor substrate. In particular, in bipolar integrated circuits, when the emitter electrode is drawn out using metal silicide, the thickness of the silicide metal layer must be adjusted to prevent the emitter-base junction from being destroyed if the silicide metal layer is made too thick. , it was necessary to limit the thickness to an extent that would not destroy the PN junction.

Another solution is to increase the overall thickness of the polycrystalline silicon film, or the metal silicide wiring becomes thicker than necessary, resulting in larger steps and miniaturization. The disadvantage is that it is difficult. Furthermore, as the film becomes thicker, there is a problem in that the capacitance between metal silicide interconnects also increases. In a semiconductor device configured with a double layer of a polycrystalline silicon layer and a metal silicide layer formed thereon, the polycrystalline silicon layer in the electrode portion is formed thicker than the polycrystalline silicon layer in other portions. It is characterized by the presence of

〔Example〕

Next, embodiments of the present invention will be described using the drawings.

FIGS. 1(a) to 1(d) are cross-sectional views shown in the order of steps for explaining one embodiment of the present invention.

First, as shown in FIG. 1(a), field oxide films 2 and 3 for element isolation are provided on a silicon substrate 1,
A contact opening 4 is formed, and a first polycrystalline silicon film 5 is deposited on the entire surface with a thickness of, for example, 400 nm by L P CV D method.
After being deposited to a thickness of 1.0 m, As ions 6 are deposited as impurities to form an emitter at an acceleration energy of 50 to 1.m. O
Ok e V, dose amount 3 x 1015 ~ 3 x
Implant at 1016 cm-2 and perform annealing.

Next, as shown in FIG. 1(b), the first polycrystalline silicon film 5 is patterned. Note that the above As ion implantation may be performed after this patterning.
A second polycrystalline silicon film 7 is deposited to a thickness of about 100 nm by a method such as LPCVD, vapor deposition, or sputtering.

Next, as shown in FIG. 1(c), the second polycrystalline silicon layer 7 is patterned to form wiring.

Before or after patterning for forming wiring, impurities of the same type as emitter forming impurities are introduced into the second polycrystalline silicon film 7 and annealing is performed. The impurities may be introduced in the same manner as the first polycrystalline silicon film 5, or the impurities already introduced into the first polycrystalline silicon film 5 may be introduced into the second polycrystalline silicon film 7 by heat treatment. A method of diffusion may also be used.

Next, a metal that generates silicide, such as platinum, is deposited over the entire surface to a thickness of 80 to 1100 nm to form a platinum layer 9.

Next, as shown in FIG. 1(d), a heat treatment is performed to form platinum silicide of a certain thickness on the surfaces of the first and second polycrystalline silicon films 5, 8. Thereafter, unnecessary unreacted platinum is removed, and platinum silicide electrodes 10a and wiring 10b are formed.

By the above method, it is possible to obtain a wiring having a polycrystalline silicon layer of a desired thickness in each of the electrode portion and the wiring portion, and having a sufficiently low layer resistance (in this case, about 5Ω/hole). In other words, the polycrystalline silicon film 5 in the electrode part is formed thickly to prevent destruction of the PN junction shallowly provided in the semiconductor substrate, and the polycrystalline silicon film 7 in the wiring part is formed thinly to lower the layer resistance. can.

〔Effect of the invention〕

As explained above, the present invention provides a semiconductor device in which a double layer of a metal silicide layer and a polycrystalline silicon layer is used for electrodes and interconnections, by forming a relatively thick polycrystalline silicon layer in the electrode portion. By preventing the destruction of the PN junction and forming the polycrystalline silicon layer in the interconnect portion relatively thin, it is possible to form interconnects with low layer resistance, low interconnect capacitance, and small step differences, and to manufacture semiconductor devices with high yield. It has the effect of being able to produce.

[Brief explanation of drawings]

1(a) to 1(d) are cross-sectional views shown in the order of steps for explaining an embodiment of the present invention, and FIG. 2(a) to 2(c) are sectional views showing an example of a conventional method for manufacturing a semiconductor device. It is sectional drawing shown in the order of a process for demonstrating. 1... Silicon substrate, 2... Field oxide film, 3
... Oxide film, 4... Opening, 5... Polycrystalline silicon film, 6... As ion, 7... Polycrystalline silicon film, 8a, 8b... Platinum silicide layer, 9 mountains Platinum layer, 1
0a, 10b...Platinum silinide layer.

Claims (1)

[Claims] In a semiconductor device in which electrodes and wiring provided in an active region formed on a semiconductor substrate are composed of a double layer of a polycrystalline silicon layer and a metal silicide layer formed thereon, the polycrystalline silicon layer of the electrode portion A semiconductor device characterized in that a polycrystalline silicon layer is formed thicker than other parts of the polycrystalline silicon layer.