JPH02276098A - 半導体メモリ装置 - Google Patents

半導体メモリ装置

Info

Publication number: JPH02276098A
Authority: JP; Japan
Prior art keywords: column; columns; column address; data lines; memory device
Prior art date: 1989-01-10
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Granted

Application number

JP1340737A

Other languages

English (en)

Japanese (ja)

Other versions

JPH0454319B2 (fr

Inventor

Minoru Hatta

実八田

Jiyunko Hatsuta

潤子八田

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Panasonic Holdings Corp

Original Assignee

Matsushita Electronics Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1989-01-10

Filing date

1989-12-29

Publication date

1990-11-09

1989-12-29 Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp

1989-12-29 Priority to JP1340737A priority Critical patent/JPH02276098A/ja

1990-11-09 Publication of JPH02276098A publication Critical patent/JPH02276098A/ja

1992-08-31 Publication of JPH0454319B2 publication Critical patent/JPH0454319B2/ja

Status Granted legal-status Critical Current

Links

239000004065 semiconductor Substances 0.000 title claims description 24
230000015654 memory Effects 0.000 claims abstract description 68
230000006870 function Effects 0.000 claims description 3
238000002955 isolation Methods 0.000 claims 6
238000007664 blowing Methods 0.000 claims 1
239000011159 matrix material Substances 0.000 claims 1
230000002950 deficient Effects 0.000 abstract description 29
230000007547 defect Effects 0.000 abstract description 19
230000007423 decrease Effects 0.000 abstract description 7
238000010586 diagram Methods 0.000 description 5
238000007796 conventional method Methods 0.000 description 3
238000004519 manufacturing process Methods 0.000 description 3
239000000945 filler Substances 0.000 description 2
238000007667 floating Methods 0.000 description 2
238000007689 inspection Methods 0.000 description 2
230000003213 activating effect Effects 0.000 description 1
230000002411 adverse Effects 0.000 description 1
230000000295 complement effect Effects 0.000 description 1
230000000694 effects Effects 0.000 description 1
238000005516 engineering process Methods 0.000 description 1
210000004907 gland Anatomy 0.000 description 1
230000010354 integration Effects 0.000 description 1
238000011084 recovery Methods 0.000 description 1
102220242571 rs771325698 Human genes 0.000 description 1
230000003068 static effect Effects 0.000 description 1

Landscapes

For Increasing The Reliability Of Semiconductor Memories (AREA)
Dram (AREA)

JP1340737A 1989-01-10 1989-12-29 半導体メモリ装置 Granted JPH02276098A (ja)

Priority Applications (1)

Application Number	Priority Date	Filing Date	Title
JP1340737A JPH02276098A (ja)	1989-01-10	1989-12-29	半導体メモリ装置

Applications Claiming Priority (3)

Application Number	Priority Date	Filing Date	Title
JP315989		1989-01-10
JP1-3159		1989-01-23
JP1340737A JPH02276098A (ja)	1989-01-10	1989-12-29	半導体メモリ装置

Publications (2)

Publication Number	Publication Date
JPH02276098A true JPH02276098A (ja)	1990-11-09
JPH0454319B2 JPH0454319B2 (fr)	1992-08-31

Family

ID=26336672

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
JP1340737A Granted JPH02276098A (ja)	1989-01-10	1989-12-29	半導体メモリ装置

Country Status (1)

Country	Link
JP (1)	JPH02276098A (fr)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS5841500A (ja) *	1981-08-24	1983-03-10	フエアチアイルド・カメラ・アンド・インストルメント・コ−ポレ−シヨン	欠陥分離用デコ−ダ
JPS59135700A (ja) *	1983-01-21	1984-08-03	Hitachi Micro Comput Eng Ltd	半導体記憶装置
JPS6425398A (en) *	1987-07-20	1989-01-27	Nec Corp	Semiconductor memory

1989
- 1989-12-29 JP JP1340737A patent/JPH02276098A/ja active Granted

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS5841500A (ja) *	1981-08-24	1983-03-10	フエアチアイルド・カメラ・アンド・インストルメント・コ−ポレ−シヨン	欠陥分離用デコ−ダ
JPS59135700A (ja) *	1983-01-21	1984-08-03	Hitachi Micro Comput Eng Ltd	半導体記憶装置
JPS6425398A (en) *	1987-07-20	1989-01-27	Nec Corp	Semiconductor memory

Also Published As

Publication number	Publication date
JPH0454319B2 (fr)	1992-08-31

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Legal Events

Date	Code	Title	Description
2007-08-31	LAPS	Cancellation because of no payment of annual fees