JPH02280346A - Manufacture of semiconductor element - Google Patents

Abstract

PURPOSE:To enable sharing of a package or a board by mounting various semiconductor chips on the package or the board through a middle board. CONSTITUTION:A semiconductor chip 3 is mounted on a middle board 5 where wiring patterns are formed, and the bonding pad 3a of the chip 3 and the pad 5a on the input side of the board 5 are connected, and the pad 5b on the output side and the lead frame 4 of a package 2 are connected. by this mounting through the middle board, various semiconductor chips can be mounted on a shared package or a shared board.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention mainly relates to a method of manufacturing a semiconductor device in which a semiconductor device is manufactured by mounting an ASIC chip on a common package or substrate.

[Conventional technology]

When ASIC chips, which are so-called custom-made products, are mounted on a common package or board, the bin arrangement differs for each IC chip, so conventionally, a dedicated package or board was prepared for each type of IC chip. Te, I
I am trying to mount a C chip.

[Problem to be solved by the invention]

By the way, preparing dedicated packages and substrates requires preparing expensive molds and the like for each type of semiconductor chip, especially for packages, and for substrates, it is necessary to prepare expensive molds for each type of semiconductor chip. The premise is that each chip is designed individually.

However, in the above conventional ones, various ASIC
A dedicated package or U-board must be prepared for each chip, resulting in a considerable increase in overall cost.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor element that enables sharing of a package or a substrate by mounting various semiconductor chips on a package or a substrate via an intermediate substrate.

[Means to solve the problem]

In order to achieve the above object, the present invention provides a manufacturing method for manufacturing a conductor element by mounting various semiconductor chips on a common package or substrate. The semiconductor chip and the package or the substrate are connected by using an intermediate substrate on which a wiring pattern is formed to match a predetermined terminal.

[Effect]

If you use an intermediate board on which a wiring pattern is formed to match the predetermined terminals of the semiconductor chip and the predetermined terminals of the package or board, even if the terminal arrangement of the semiconductor chip and the terminal arrangement of the package or board are different, this wiring The terminal arrangement can be switched depending on the pattern, and predetermined terminals of both can be matched with each other.

〔Example〕

With reference to FIGS. 1 to 4, a case will be described in which the present invention is applied to a method of manufacturing a semiconductor element in which a semiconductor chip is mounted in a semiconductor package.

As shown in FIGS. 1 and 2, this semiconductor element 1 is constructed by mounting a semiconductor chip 3, which is an ASIC chip, on a package 2, and a plurality of lead frames 4 are arranged on both sides of the package 2. A semiconductor chip 3 is die-bonded to the center of the interior via an intermediate substrate 5. The intermediate board 5 has an input pad 5a (
terminals) and output side pads 5b (terminals) are formed, each input end pad 5a is connected to each bonding pad 3a (terminal) of semiconductor chip 3, and each output side pad 5b is connected to each inner lead of each lead frame 4. 4a (terminals) via wires 6, respectively.

Further, the intermediate U plate 5 is composed of a multilayer ceramic substrate, and a wiring pattern 7 consisting of a conductor and a through hole is formed in each layer and between each layer therein. By means of this wiring pattern 7, a predetermined bonding pad 3a of the semiconductor chip 3 is made to match a predetermined inner lead 4a of the lead frame 4.

This will be explained below with reference to FIG. 3, which is schematically shown.

Bonding pads 3a denoted by symbols ASBSC and D are formed on the semiconductor chip 3, and the lead frame 4
Similarly, inner leads 4a denoted by symbols ASB, C, and "D" are formed, and B and D therein do not correspond to each other as shown in the figure.In this case, the intermediate substrate 5
Input side pads 5a represented by symbols A, B, C, and D are formed to correspond to the bonding pads 3a of the semiconductor chip 3, and to correspond to the inner leads 4a of the lead frame 4. Output side pads 5b denoted by symbols A, B, C and D are formed. Then, in order to connect the input side pad 5a and output side pad 5b with the same symbol,
A vertically intersecting wiring pattern 7 is formed in the intermediate substrate 5. That is, A and C are the nearest A and C, respectively.
Then, a wiring pattern 7 is formed so that B and D are respectively connected to B and D located on opposite sides.

In this way, it is not necessary to change the terminal arrangement of the lead frame 4 each time by simply preparing the intermediate substrate 5 corresponding to various semiconductor chips 3.

In the above embodiment, the 16-conductor chip 3 and the intermediate board 5 are connected by wire bonding, but as shown in FIG. It may also be bonded to the intermediate substrate 5 (flip chip method).

Next, a method for manufacturing a semiconductor element 1 in which a semiconductor chip 3 is mounted on a substrate 8 will be described as a second embodiment based on FIGS. 5 to 7.

As shown in FIGS. 5 and 6, in this embodiment, an intermediate substrate 5 is mounted on a substrate 8 by a so-called flip-chip method. Each bonding pad 3 of the semiconductor chip 3
A and each input side pad 5a of the intermediate board 5 are connected by a wire 6.
However, each output pad 5b of the intermediate substrate 5 and the metallized portion 8a of the substrate 8 are wirelessly bonded by solder bumps.

In the above embodiment, each bonding pad 3a of the semiconductor chip 3 and each input side butt 5a of the intermediate board 5 are wire bonded, but as shown in FIG. Bonding (flip chip method) is possible.

〔Effect of the invention〕

As described above, according to the present invention, as long as an intermediate board compatible with various semiconductor chips is prepared, various semiconductor chips can be connected to a package or a board through a wiring pattern formed on the intermediate board. Alternatively, the substrate can be shared, which has the effect of reducing costs.

[Brief explanation of drawings]

FIG. 1 is a perspective view of a first embodiment to which the present invention is applied, FIG. 2 is a simplified cut-away side view of the first embodiment, and FIG. 3 is a schematic diagram of a wiring pattern formed on an intermediate board. Fig. 4 is a cut side view of a modification of the first embodiment, Fig. 5 is a perspective view of the second embodiment to which the present invention is applied, and Fig. 6 is a cut side view showing a simplified version of the second embodiment. , FIG. 7 is a cut side view of a modification of the second embodiment. DESCRIPTION OF SYMBOLS 1... Semiconductor element, 2... Package, 3... Semiconductor chip, 3a... Bonding pad, 4...
Lead frame, 4a... Inner lead, 5... Intermediate board, 5a... Input side pad, 5b... Output side pad, 7... Wiring pattern, 8... Board.

Claims (1)

[Claims] A manufacturing method for manufacturing semiconductor elements by mounting various semiconductor chips on a common package or substrate, the wiring pattern matching predetermined terminals of the semiconductor chip with predetermined terminals of the package or substrate. 1. A method of manufacturing a semiconductor element, comprising connecting the semiconductor chip and the package or the substrate using the formed intermediate substrate.