JPS6028256A - Semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the abnormal stress applied to an element as well as to contrive an increase in housing capacity of the functional elements by a method wherein a pair of semiconductor elements are arranged in such a manner that their back sides are facing each other, and they are sealed by resin together with leads extending on to the circumference. CONSTITUTION:A semiconductor element 11 is joined to the die stage 13 of a lead frame 12, and they are connected 14 to each lead. Another semiconductor 21 is mounted on a lead frame 22 in the same manner as above, the back sides of die stages 13 and 23 are connected facing each other through an insulating spacer 6a, and a resin sealing 5a is performed thereon. As the resin 5a is formed thereon. As the resin 5a is formed symmetrical to the intermediate face of the elements 11 and 21, its stress distribution also becomes symmetrical, abnormal stress is reduced, the elements 11 and 21 can be made larger in size, and the function as a device can be increased, because two elements are housed.

Description

DETAILED DESCRIPTION OF THE INVENTION fa) Technical Field of the Invention The present invention relates to a semiconductor device, and particularly to a resin-sealed structure thereof.

(bl Background of the Technology) Because of their convenience, semiconductor devices are becoming more affordable and multifunctional as their use expands.

One of the reasons for lowering prices is that resin sealing is becoming more common instead of conventional ceramic sealing.

Further, in order to increase the number of functions, efforts are being made to increase the degree of integration of semiconductor integrated circuit devices, but at the same time, devices are also becoming larger. .

(C) Prior art and problems Figure 1 is a block diagram of an example of a conventional resin-sealed semiconductor device, in which 1 is a semiconductor element, 2 is a lead frame, 3 is a die stage, 4 is a connecting wire, and 5 is a resin. Each mold is shown.

The semiconductor element 1 is wire-bonded to the die stage 3 of the lead frame 2, wire-bonded to each lead of the lead frame 2 using connection wires 4, and then placed in a resin mold 5 (molded with resin) for sealing. .

This configuration has been adopted in many semiconductor devices, but since the shapes of the main surface and the back surface of the semiconductor element 1 in the resin mold 5 are different, the stress distribution is different. For example, when a semiconductor device becomes large in size, there is a problem that abnormal stress is applied to the semiconductor device 1. Therefore, the size of the semiconductor device 1 is limited, and the number of accommodation openings per function is limited. There is.

(dl Object of the Invention In view of the above-mentioned conventional drawbacks, an object of the present invention is to provide a semiconductor device having a resin-sealed structure capable of reducing abnormal stress applied to a semiconductor element and increasing the capacity of functions. It is in.

tel Structure of the Invention The above object is characterized in that a pair of semiconductor elements are arranged so that their back surfaces face each other, and the semiconductor elements are sealed with resin together with a plurality of leads extending around the semiconductor elements. This is achieved by the semiconductor device.

In this semiconductor device, since the two semiconductor elements are located approximately symmetrically with respect to the intermediate plane and are sealed with resin, the stress distribution of the resin is also approximately symmetrical, and the abnormal stress applied to the semiconductor elements is reduced. Not only can the size of the semiconductor device be increased by reducing the size, but also its functionality can be increased since it accommodates two semiconductor devices. Furthermore, freedom in combining two semiconductor elements is also an advantage in terms of functional configuration.

(fl　Embodiments of the invention Embodiments of the present invention will be described below with reference to the drawings.

Figure 2 (al) Figure 2 (bl is a configuration diagram of an embodiment of a semiconductor device according to the structure of the present invention, Figure 2 (cl is its
The frame diagram and FIG. 3 are also configuration diagrams of other embodiments,
5a and 5b are resin molds, 6a and 6b are spacers, 1
l-11b ・2l-21b is a semiconductor element, 12.12
a-12b 2222a and 22b indicate the Lee-1 frame, 13 and 23 the stage, and 14 and 24 the connection wires, respectively.

The semiconductor device shown in FIG. 1+a+ has semiconductor elements 11 and 2
10 sides are arranged perpendicularly to the mounting surface of the semiconductor device, and the lead terminals are led out to the outside in one direction, and
For example, this is an example in which it is inserted into a connection hole of a printed wiring board or the like.

The semiconductor element 11 is die-bonded to the guide stage 13 of the lead frame 12 shown in FIG. Further, a semiconductor element 21, which is another semiconductor integrated circuit element, is similarly mounted on the lead frame 22, and the back surfaces of both die stages 13 and 23 are joined to face each other via an insulating spacer 6a. Then, for sealing, it is molded with resin like a resin mold 5a.

In the semiconductor device shown in Fig. 2 (b1), the shape of the external lead-out portion of the G-1z frame is changed to 12a and 22a, and flow soldering (-1 digit, etc.) is applied to the connection land of a printed wiring board, etc. It is designed to be connected and mounted.

Here, the lead frame 12 shown in FIG.
3, the present invention includes the use of a lead frame with wire bonding pads at any periphery of the die stage.

In these configurations, since the resin mold 5a is configured approximately symmetrically with respect to the intermediate plane between the two semiconductor elements 11 and 21, the stress distribution thereof is also approximately symmetrical, and the semiconductor elements 11 and 21 are approximately symmetrical.
The abnormal stress applied to the semiconductor device 21 is reduced compared to the conventional one, and not only can the semiconductor elements 11 and 21 be made larger, but since two semiconductor elements 11 and 21 are accommodated, the function as a semiconductor device can be reduced by f%q. It can be done easily. Also,
The ability to freely combine the two semiconductors and body elements 11 and 21 is also an advantage in terms of functional configuration. These points also apply to other embodiments shown below.

The semiconductor device shown in FIG. 3 is another embodiment according to the structure of the present invention, and as in the conventional example, semiconductor elements 11b and 21
An example in which the surface b is arranged parallel to the mounting surface of the semiconductor device, and the lead terminal is led out to the outside and inserted in both directions and into a connection hole of a wiring board, etc. It is. In this way, the lead frames 12b and 22b are formed so that the lead terminals led out on both sides of the lead frames 12b and 22b do not interfere when joining the back sides of the die stages of the lead frames 12b and 22b via the spacer 6b. , a resin mold '5b is formed.

In addition, in the semiconductor device shown in FIG. 2 (al) and FIG. 2 (t), if there is no problem even if the two glue stages 13 and 23 of the IS frames 12 and 22 are electrically connected, the spacer 6 may be deleted and the guide stages 13 and 23 may be directly joined, and the same applies to the case shown in FIG.

(g+ Effects of the Invention As explained above, according to the configuration of the present invention, a semiconductor device having a resin-sealed configuration that can reduce abnormal stress applied to a semiconductor element and increase the capacity for functions) This has the effect of making it possible to expand the applications of semiconductor devices.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of an example of a conventional resin-encapsulated semiconductor device.
FIG. 2(al) and FIG. 2(b) are configuration diagrams of an embodiment of a semiconductor device according to the structure of the present invention, FIG. 2(C) is a diagram of its lead frame, and FIG. 3 is a diagram of another embodiment. In the drawing, 1, 11, Ilb, 21, 21b are semiconductor elements, 2, 1212a -12b, 22□22
a.22b is the lead frame, 3.13.23 is the die stage, 4.14.24 is the connection weight, 5.5a.
5b indicates a resin mold, and 6a and 6b indicate spacers. 243-

Claims (1)

[Claims] 1. A semiconductor device comprising a pair of semiconductor elements arranged so that their back surfaces face each other and sealed with a resin together with a plurality of leads extending around the semiconductor elements.