JPH02285662A - Resin sealed semiconductor and manufacture thereof - Google Patents

Abstract

PURPOSE:To increase the bond strength between a resin and a leadframe while avoiding any damage to a semiconductor chip by a method wherein a hard thin body is produced on the surface layer of the leadframe while the hard thin body is provided with multiple slits so as to form fine rugged parts. CONSTITUTION:Within the title resin sealed semiconductor comprising a semiconductor chip, a leadframe 2 and a resin part 22 covering them, a hard thin body 9 is produced and then the hard thin body is provided with multiple slits so as to form fine rugged parts. For example, the substrate 8 of the said leadframe 2 comprises an iron base material containing 30-60wt% of Ni or a copper base material containing at least 80wt% of Cu while the said hard thin body 9 comprises Sn, Ni, Cr, Cd, Zn, Pb and an alloy containing one of them subjected to at least 400 in Vickers hardness. Furthermore, the process of forming fine rugged parts by providing the said hard thin body 9 with multiple slits shall be the bending deformation process or the chemical processing of the leadframe 2.

Description

[Detailed Description of the Invention] [Industrial Field of Application] The present invention relates to the material and surface shape of lead frames for resin-sealed semiconductors, and particularly to materials for improving moisture resistance by increasing adhesive strength with resin. A suitable resin-sealed semiconductor and its manufacturing method.

[Conventional technology]

In conventional resin-encapsulated semiconductors and their manufacturing methods,
No special consideration was given to the surface shape of the lead frame, and lead frames were often used with a flat surface shape, and expensive materials were used that had no difference in thermal conductivity from resin and had good adhesive properties. Figure 1 of Japanese Patent Publication No. 62014, No. 744 (
As shown in (a) to (d), overhanging grooves have been formed by laser beam irradiation for the purpose of improving the adhesive strength between the resin and the lead frame. In addition, other common methods have been found in which the surface of the lead frame is made uneven by machining, punching, or the like.

Then, as described in Japanese Patent Publication No. 60-21237, a method in which a plating layer is generated on the surface of the material and cracks are generated by utilizing the internal stress of the plating layer or by performing bending, shot peening, or annealing. It has been known.

[Problem to be solved by the invention]

In conventional resin-sealed semiconductors and their manufacturing methods, the number and density of crack-like unevenness formed on the surface layer of the lead frame are insufficient, and the unevenness has a shape that does not overhang or is formed on the surface layer. No consideration was given to the material composition. Therefore, under harsh actual usage environments, there is a problem in that the resin and lead frame peel off, and the wiring on the semiconductor chip corrodes and breaks due to moisture absorption.

SUMMARY OF THE INVENTION An object of the present invention is to provide a resin-sealed semiconductor and a method for manufacturing the same, which have strong adhesive strength between a resin and a lead frame and prevent damage to semiconductor chips.

[Means to solve the problem]

In order to achieve the above object, a resin-sealed semiconductor and a method for manufacturing the same according to the present invention provide a resin-sealed semiconductor comprising a semiconductor chip frame and a resin portion covering them, in which a hard material is added to the surface layer of the lead frame. It is configured to generate a thin body and generate cracks in the hard thin body to form fine irregularities.

The lead frame substrate contains 30 to 60 wt% N.
The structure or lead frame substrate is made of an iron-based material containing i or a copper-based material containing at least 80 wt% Cu.
The hard thin body may be made of an alloy of ~52 wt % iron or at least 98 wt % pure copper, and the hard thin body may be an alloy of Sn and Ni.

Moreover, the hard thin body is Sn, Ni, Cr, or Cd.

It is made of Zn, Pb, and an alloy containing them, and has a Vickers hardness of at least 400.

Furthermore, a configuration may be adopted in which a diffusion alloy layer or a third soft material is formed between the substrate of the lead frame and the hard thin body.

For cracks generated in a hard thin body, the relationship between the average crack depth dm and the crack opening length a at the surface is d m
/ a > 1 and a < 10 μm, or the relationship between the pitch P between adjacent cracks and the crack opening length a is 50 <
A configuration in which P/a < 5 and a (10 μm,
The direction of cracks generated in a hard thin body is often almost perpendicular to the longitudinal direction of the leg of the lead frame that is not sealed with resin, and the projected length of the crack in the perpendicular direction Prt and the projected length of the crack in the longitudinal direction The ratio to Prl is P r t / p r Q
,) 5 large a < 10 μm or the ratio of the maximum crack depth dM among 100 cracks and the average crack depth dm at =8- in a given cross section is dM/d m on average
< 3, the crack generated in the hard thin body is the overhanging side wall length Woo of the crack and the total side wall length W
In a configuration where the ratio of Woo/W>0.1, the part where cracks occur in the hard thin body is at the interface between the resin part of the semiconductor chip and the lead frame, and at a predetermined depth on the semiconductor chip side from the interface. The part or the bent part of the leg of the lead frame, or the part where cracks occur in the hard thin body, may be in a plane perpendicular to the thinnest direction of the semiconductor chip and a flat part of the lead frame.

In a method for manufacturing a resin-sealed semiconductor consisting of a semiconductor chip, a lead frame, and a resin part covering them, a hard thin body is generated on the surface layer of the lead frame, and cracks are generated in the hard thin body to create fine irregularities. The step of forming the lead frame is a step of bending and deforming the lead frame or a process of chemical treatment.

In addition, in structures where a hard thin body is formed by a physicochemical method such as plating, thermal spraying, or diffusion penetration treatment, cracks in the hard thin body can be removed by deforming the lead frame to a predetermined curvature in the atmosphere, shot peening processing, or hydrogen absorption treatment. The irregularities on the hard thin body are formed by spraying molten metal generated on the hard thin body onto the lead frame substrate, and the irregularities on the hard thin body are formed by wire mesh-like The hard thin body is formed by firing, rolling, or pressure bonding to the lead frame substrate.
A structure may also be used in which the coated granules are bonded or fired to the substrate of the lead frame.

, [Function] According to the resin-encapsulated semiconductor and the manufacturing method thereof of the present invention,
By creating a hard thin body in the lead frame, generating cracks in the hard thin body, and selecting the respective materials and shapes of the cracks, residual stress generated at the interface between the lead frame and the resin and corrosion can be reduced. Stresses or corrosive effects on interfaces associated with practical use in a harsh environment are eliminated. In other words, by considering the type of each material and manufacturing process,
The cracks formed in the surface layer of the hard thin body have an overhanging shape, which provides the most effective anchoring effect and increases the adhesive strength at the interface.

〔Example〕

Embodiments of the present invention will be generally described with reference to FIGS. 1 to 11. As shown in FIGS. 10, 11, 1 and 2, the semiconductor chip 20 and the lead frame 2
and a resin part 22 covering them, a hard thin body 9 is generated on the surface layer part of the lead frame 2, and cracks 10 are generated in the hard thin body 9 to form fine irregularities. It is configured.

The substrate 8 of the lead frame 2 has a content of 30 to 60 wt%.
The structure or lead frame 2 is made of an iron-based material containing 42 wt% of Ni or a copper-based material containing at least 80 wt% of Cu.
The hard thin body 9 may be formed of an alloy of ~52 wt% balance iron or at least 98 wt% pure copper, and the hard thin body 9 may be an alloy of Sn and Ni. Cr, Cd.

It is made of Zn, Pb, and an alloy containing them, and has a Vickers hardness of at least 400.

Furthermore, a configuration may be adopted in which a diffusion alloy layer or a third soft material is formed between the substrate 8 and the hard thin body 9 of the lead frame 2.

The cracks generated in the hard thin body 9 are generated when the relationship between the average crack depth dm of the crack 16.17 shown in FIG. 8 and the crack opening length a at the surface is d m / a > 1 and a
< 10 μm or the relationship between the pitch P between adjacent cracks and the crack opening length a is 50 < P / a < 5 and a
<10 μm configuration, the direction of cracks generated in the hard thin body 9 is almost perpendicular to the longitudinal direction of the legs of the lead frame 2 not sealed with resin as shown in FIG. 14 projected length Prt and longitudinal crack 15
The ratio of the projection length PrQ to the projection length PrQ is P r t / p rn
:> 5 and a < 10 μm or the ratio of the maximum crack depth dM among 100 cracks 14.15 to the average crack depth dm in a given cross section is on average d M / d m <
3, hardness=12 The crack shown in FIG. 8 generated in the thin body 9 is 16°17
The configuration is such that the ratio of the overhanging sidewall length WOH of the crack 17 to the total sidewall length W is Woo/W>0.1, and the portion where the crack occurs in the hard thin body is shown in FIG. An interface 25 between the resin part 22 of the semiconductor chip 20 and the lead frame 2, a predetermined depth portion 24 on the side of the semiconductor chip from the interface 25, or a bent part 19 of the leg of the lead frame, and a crack in the hard thin body 9. The portion 10 generating the semiconductor chip 20 may be located within a plane C perpendicular to the thinnest direction B of the semiconductor chip 20 and may be a flat portion of the folded frame 2 .

In the method for manufacturing a resin-sealed semiconductor comprising a semiconductor chip 20, a lead frame 2, and a resin part 22 covering them, a hard thin body 9 is generated on the surface layer of the lead frame 2, and a crack is formed in the hard thin body 9. The step of generating and forming fine irregularities is a step of bending and deforming the lead frame 2 or a process of chemical treatment.

In addition, in a structure in which the hard thin body 9 is generated by a physicochemical method such as plating, thermal spraying, or diffusion penetration treatment, the cracks 10 in the hard thin body 9 can be formed by deforming the lead frame 2 to a predetermined curvature in the atmosphere, by shot peening processing, or by shot peening. The structure is formed by deformation after hydrogen absorption treatment, the shot peening process, and the unevenness of the hard thin body 9 is formed by spraying molten metal generated on the hard thin body 9 onto the substrate 8 of the lead frame 2, and the hard thin body The unevenness of the body 9 is caused by the wire mesh-like hard thin body 9 being connected to the substrate 8 of the lead frame 2.
The unevenness of the hard thin body 9 may be formed by pressing or baking a granular body of ceramic particles coated with AΩ onto the substrate 8 of the lead frame 2.

Next, experimental values of each example will be explained.

(Example 1) As shown in FIG. 1, a lead frame 2 made of a 300 pm thick 5ONi alloy plated with a 3 μm thick Sn/Ni alloy on both sides is sandwiched between a bending jig 3 and a bending jig 4.
A method to crack the Sn/Ni alloy layer by bending is outlined. FIG. 2 shows an example of the cross-sectional shape of the crack 10 obtained in this manner.

Moreover, FIG. 3 is an enlarged view of the surface. IMbit, DR using a lead frame made like this material.
I created AM. The resin material used was a novolac epoxy resin, which was molded at 200° C. using a transfer machine (injection molding machine).

The DRAM thus created was heated to 0121°C, PCT
Test (steam humidification test using pressure cooker), ■3% Na
A 65°C/85% RH test (relative humidity test) after lhr presoaking in CQ solution and a 65°C/85% RH test were conducted. As a result, the LSI after holding for 1000 hours
(Semiconductor) The percentage of products with operational failure is ■PCT
In the test, 1500 specimens were tested, and in the 65°C/85%RH test after pre-soaking with 3% NaCQ, 1 specimen/1000 specimens were tested.
- Test specimen and ■ 65℃/85%RH test: OK/1
There were 000 test specimens.

On the other hand, if the crack generation treatment described above is not performed, ■.

The operating failure rates for similar test methods of ■ and ■ are 12 cases, 1500 cases, 320 cases/1000 cases, and 3 cases, respectively.
The number of specimens was 1,000. In addition, when the products in this case were disassembled and inspected, all of the failed products and many of the non-faulty products were found to have peeled off between the lead frame and the resin, and moisture reached the semiconductor chip from this area and reached the A on the semiconductor chip.
The fl wiring was corroded and disconnected.

On the other hand, it was found that the peeling hardly occurred in the product based on the method of the present invention.

Based on the above, claim 1 is judged to be valid.

(Example 2) In some of the above methods, the materials, processing methods, cracks, surface conditions, etc. were changed as shown in Table 1. As a result, the failure rates in the above operational failure evaluation test methods (2) to (2) showed the values shown in the table. This will be explained in detail below.

Nα1 in Table 1 is for Example 1, and the values in parentheses in the evaluation test result (failure rate) column are the values when no processing or treatment is applied.

Nα2 is the case where the same material as in Example 1 was used and processed and treated in the same way, but at the time of processing, as shown in FIG. 1, the corrosive liquid 6 was a 0.1% H2SO4 solution and +3 mA/a to lead frame by power supply 5
A current of K was applied for a total of 2 minutes. As a result, the side wall of the microscopic crack shown in FIG. 3 was generated and the lower part thereof was corroded and eroded, and the cross-sectional shape shown in FIG. 5 was obtained. Note that FIG. 4 shows the case without the main corrosion treatment. As a result, it was confirmed that the adhesive strength with the resin increased more than in the case of Nα1.

This is reflected in the reduction in failure rate shown in the table.

From the above, it is determined that claim 11 is valid. It has been confirmed that when creating cracks in corrosive liquid in this way, uniform cracks can be obtained with lower bending deformation.
It is possible to reduce or eliminate the work of finally re-bending the plate into a flat plate.

Next, Nα3 in Table 1 is a case where the chemical composition of the material of the lead frame was changed, and the test was conducted in the same manner as in Example 1 except that materials within the range shown in the table were prepared. As a result, ■When the Ni content is 30 wt% or less and 60 wt% or more, and ■When the Cu content is 80 wt% or less, the failure rate by PCT test exceeds Nα1, and 0.
It showed 5-1.5%. On the other hand, the Ni content is 30-60
When the wt% balance is Fe and the Cu content is 80wt% or more, the failure rate is 0.2 to 0.3%, and when the Ni content is 42 to 52wt% and the Cu content is 98w
The failure rate in the case of t% was close to 0.15 to 0.2%. Therefore, claim 2 is judged to be valid. Furthermore, claim 3 is judged to be even more effective.

Here, the reason why the chemical composition is good is considered to be that the packaging stress is large due to the relationship between the thermal expansion coefficient of the material and the silicon chip and resin.

Next, in Table 1 Nα4, instead of the Sn/Ni alloy plating of Example 1, pure n, pure Ni, pure Cr, and pure Cd were used.

Pure Zn and pure PB their alloy plating, e.g. 30
Sn-7ONi, Pb-8b, N1-P, etc. were used. As a result, in all cases, an increase in adhesive strength was observed when cracks occurred in the plating layer. However, if the hardness of the hard thin body is Hv≦4°0, the amount of deformation of the lead frame will be large due to the cracking, and subsequent bending correction work will be laborious and inefficient. Therefore, it is effective to select a material whose hardness is Hv≧400.

Based on the above, claim 4 is judged to be valid.

Next, Nα6 in Table 1 is S n / N at Nα1
After applying the i-layer to a thickness of 5 μm by vapor deposition, heat at 350°C
5ONi alloy and Sn were annealed for 1/4 hr.
This is a case where a diffusion alloy layer is provided between the /Ni alloy layers.

Here, if these hard thin bodies are bent and deformed as they are, the sixth
As shown in the figure, a part of the rigid thin body fell off due to bending deformation, probably due to insufficient bonding with the lead frame.
However, when the above-mentioned annealing is applied, the cracks stop before or in the middle of the diffusion alloy layer, and the hard thin body does not fall off, as shown in Figure 7. Ta. These methods were also confirmed to be effective for claims 1, 3, and 4. Based on the above, claim 5 is also judged to be valid.

Next, Nα7 in Table 1 is S n / N at Nα1
Sn30/Ni7 instead of i alloy plating layer
8 after flame spraying of 0 alloy and Sn plating
This is a case where diffusion and infiltration treatment was performed at 00°C for 3/2 minutes.

The average film thickness of the former was 30 μm, the latter was 3 μm, and the rest was the same as in Example 1.

In this case, compared to Sn/Ni alloy plating, although there is greater variation in the density of crack occurrence and its distribution, there is clearly an effect of improving the failure rate.

Therefore, claim 12 is judged to be valid.

Next, Nα8 in Table 1 indicates the crack occurrence machining at Nα1.
) Deformation at a predetermined curvature, b) Wire peening process, C
) Shot peening was performed after hydrogen absorption treatment. In a), as shown in Fig. 1, the curvatures of the machined surfaces of bending jigs 3 and 4 are set so that they fit (adhere) to the top and bottom of the lead frame, and the bending jigs 3 and 4 are pressed firmly against the lead frame from above and below to create a predetermined shape. We adopted a method that gives a deformation of .

In b), while moving the lead frame, a leveler was used to violently hit a steel bar of φ3 x 1000Q against the machined surface using compressed air force.

In C), the deformation in the tank 7 in FIG.
SiN sand grains with a particle size of μm were blown onto the lead frame at high speed by a stream of compressed air.

As a result, in the case of a) above, the hard thin body hardly ever comes off accidentally or partially, which conventionally occurred. In addition, in b), there is no bending or deformation of the bent frame after processing, and subsequent rebending or decurving is not necessary. In addition, in C), hydrogen is absorbed into the hard thin body and it becomes brittle, making it possible to create cracks with a slight shot peening process. The failure rate of products made in this way was as good as that of conventional products. From the above, the processing according to the present processing method not only facilitates processing but also facilitates subsequent processing and treatment, and it is determined that claim 13 is valid.

Next, Nα9-1 to Nα9-4 in Table 1 are results of a study on a large number of test specimens prepared in Nα1, and the failure rate and form of cracking were studied. N
α9-1 is the average crack depth dm and the crack opening length a and a
Initially, it was thought that the larger a was, the better the resin adhesion properties were, but when a was 10 μm or more, the density and distribution of the number of cracks became rough, and the substantial effect decreased. Furthermore, regarding the depth dm or the pitch P, the failure rate tended to be lower when the relationships shown in the table were satisfied.

Similarly, in Nn 9-2, the planar form of the crack is the length Prl as seen from the total projected length plane of the crack perpendicular to the longitudinal direction of the leg of the lead frame (direction A of diffusion and intrusion of moisture into the resin). The total projected length PrQ of the lead frame leg in the longitudinal direction,
satisfied the relationship shown in the table, and the failure rate tended to be small when a<10 μm.

Similarly, from Nα9-3, the maximum crack depth d in any cross section
If the ratio of M and dm is 3 or less, in the crack generation treatment or bending process of the legs of the semiconductor lead frame,
Although many cracks appear homogeneously and it is possible to bend the lead frame smoothly, if dM/dm > 3, cracks with a homogeneous density distribution cannot be obtained, and at the same time, the above-mentioned lead frame leg bending process may cause the lead frame to bend smoothly. There was one that broke my leg.

Similarly, from Nα9-4, when the crack morphology in an arbitrary cross section is classified into the length W of the crack side wall 16 that does not overhang and the length WOH of the crack side wall 17 that overhangs as shown in FIG. .

The failure rate tended to be small when the proportion of the total sidewall W was 0.1 or more. Products that satisfied the relationships shown in Table 1 were certainly superior. On the other hand, many products that do not satisfy the relationships in the table have a failure rate of 3 to 3 of the values in the table.
There were scattered cases showing 8x.

Based on the above, claim 6 is judged to be valid.

(Example 3) As shown in FIGS. 10 and 11, the crack occurrence portion (shaded portion) 19 was identified as a part of the lead frame. That is, they are directly below the inner side and F directly below the outer side of the end face of the joint part with the sealing resin at the foot portion of the lead frame of the plane C perpendicular to the direction B, which is the thinnest part of the semiconductor shape.

Here, the part just below the inside is the part where the resin begins to peel off from the frame, and if the bonding in this part is sufficient, the other parts should become unnecessary.

Further, the thinnest plane C of the semiconductor shape, which is perpendicular to the direction B, is subjected to the greatest stress during packaging and is the part that is easily peeled off. Next, as is clear from Fig. 11, the area directly below the outer side F corresponds to the part where the legs of the lead frame are bent, and if this bending stress is small, the boundary surface with the resin frame will open or become mechanically damaged at point 24. It is expected that it will be difficult to receive. Based on these expectations, the above-mentioned surface crack treatment was applied only to the crack occurrence area 19 in FIG. As a result, as shown in Table 1, Nα10, it was found that there was no significant difference from the case where the entire surface was subjected to surface crack treatment.

Based on the above, claim 9 is judged to be valid.

By applying this method, the use of materials and the scope of processing in various processes are reduced, resulting in lower costs and
It also has the effect of saving labor.

〔Effect of the invention〕

According to the present invention, by creating a hard thin body in the lead frame of a resin-sealed semiconductor and causing cracks to occur in its surface layer, the adhesive strength of the resin to the lead frame is improved and a semiconductor with excellent moisture resistance is produced. As a result, semiconductors can be used even in harsh corrosive environments, and since they are less likely to fail, equipment reliability is improved, and the range of use and application of semiconductors is expanded.

On the other hand, the present invention has the effect of making it possible to manufacture inexpensive semiconductors because expensive materials, processing methods, and processes can be saved.

[Brief explanation of drawings]

FIG. 1 is a longitudinal sectional view showing a manufacturing method according to an embodiment of the present invention;
FIG. 2 is a vertical cross-sectional view of a portion of FIG. 1, FIG. 3 is a view showing the crack shape from the ■ direction in FIG. 2, and FIGS. 4 to 7 are vertical cross-sectional views showing the crack shape. Figures 8 and 9 are partially enlarged views of the crack shape, Figure 10 is a plan view showing the cracked part of the semiconductor lead frame, and Figure 11 is a partial vertical cross section illustrating the interface between the resin and the lead frame. It is a diagram. 2...Lead frame, 5...DC power supply, 6...Corrosion treatment liquid, 8...Substrate, 9...Hard thin plate, 10...Crack.

Claims (1)

[Claims] 1. In a resin-sealed semiconductor consisting of a semiconductor chip, a lead frame, and a resin part covering them, a hard thin body is formed on the surface layer of the lead frame, and cracks are generated in the hard thin body. A resin-sealed semiconductor characterized by having fine irregularities formed therein. 2. The lead frame substrate contains 30 to 60 wt% Ni
The resin-sealed semiconductor according to claim 1, wherein the resin-sealed semiconductor is an iron-based material containing Cu or a copper-based material containing at least 80 wt% of Cu. 3. The substrate of the lead frame is formed of an alloy with the balance being 42 to 52 wt% iron or at least 98 wt% pure copper, and the hard thin body is an alloy of Sn and Ni. The resin-encapsulated semiconductor described above. 4. Hard thin body is Sn, Ni, Cr, Cd, Zn, Pb
and an alloy containing them, and the Vickers hardness is at least 400.
Or the resin-sealed semiconductor according to 3. 5. The resin-sealed semiconductor according to claim 1, wherein a diffusion alloy layer or a third soft material is formed between the substrate of the lead frame and the hard thin body. 6. For cracks generated in a hard thin body, the relationship between the average crack depth dm and the crack opening length a at the surface is dm/a>
1 and a<10 μm, or the relationship between the pitch P between adjacent cracks and the crack opening length a is 50<P/a<5 and a<10 μm. The resin-sealed semiconductor according to any one of the items. 7. The direction of the cracks generated in the hard thin body is often almost perpendicular to the longitudinal direction of the leg of the lead frame that is not sealed with resin, and the projected length of the crack in the perpendicular direction Prt and the crack in the longitudinal direction The ratio of the projected length Prl of is Prt/prl>
5 and a<10 μm, or the ratio of the maximum crack depth dM among 100 cracks to the average crack depth dm in a predetermined cross section is dM/dm<3 on average. 7. The resin-sealed semiconductor according to any one of items 1 to 6. 8. A crack generated in a hard thin body has a ratio of the overhanging side wall length W_O_H of the crack to the total side wall length W.
Claim 1 characterized in that _O_H/W>0.1.
8. The resin-sealed semiconductor according to any one of items 1 to 7. 9. The part where cracks occur in the hard thin body is the interface between the resin part of the semiconductor chip and the lead frame, a predetermined depth part on the side of the semiconductor chip from the interface, or the bent part of the leg of the lead frame. The resin-sealed semiconductor according to any one of claims 1 to 8, characterized in that: 10. The thin hard body is characterized in that the portion where the crack occurs is within a plane orthogonal to the thinnest direction of the semiconductor chip and is a flat portion of the lead frame. Resin-encapsulated semiconductor. 11. A method for manufacturing a resin-sealed semiconductor comprising a semiconductor chip, a lead frame, and a resin part covering them,
The step of generating a hard thin body on the surface layer of the lead frame and generating cracks in the hard thin body to form fine irregularities is a process of bending and deforming the lead frame or chemical treatment. A method for manufacturing a resin-encapsulated semiconductor. 12. The method for manufacturing a resin-sealed semiconductor according to claim 11, wherein the hard thin body is produced by a physicochemical method such as plating, thermal spraying, or diffusion infiltration treatment. 13. The cracks in the hard thin body are formed by deforming the lead frame to a predetermined curvature in the atmosphere, by shot peening, or by the deformation after hydrogen absorption treatment, and by the shot peening. The method for manufacturing the resin-encapsulated semiconductor described above. 14. The resin according to any one of claims 11 to 13, wherein the unevenness of the hard thin body is formed by spraying molten metal generated on the hard thin body onto a substrate of a lead frame and adhering it. A method for manufacturing a sealed semiconductor. 15. The resin seal according to any one of claims 11 to 13, wherein the irregularities of the hard thin body are formed by firing, rolling, or press-bonding the hard thin body in the shape of a wire mesh to a substrate of a lead frame. A method for manufacturing a stop semiconductor. 16. The resin sealing according to any one of claims 11 to 13, wherein the unevenness of the hard thin body is formed by pressing or firing a granular body made of ceramic particles coated with Al on a substrate of a lead frame. Semiconductor manufacturing method.