JPH0233443U - - Google Patents

Info

Publication number
JPH0233443U
JPH0233443U JP1988110661U JP11066188U JPH0233443U JP H0233443 U JPH0233443 U JP H0233443U JP 1988110661 U JP1988110661 U JP 1988110661U JP 11066188 U JP11066188 U JP 11066188U JP H0233443 U JPH0233443 U JP H0233443U
Authority
JP
Japan
Prior art keywords
substrate
board
frame
notch
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1988110661U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988110661U priority Critical patent/JPH0233443U/ja
Publication of JPH0233443U publication Critical patent/JPH0233443U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Credit Cards Or The Like (AREA)

Description

【図面の簡単な説明】
第1図はこの考案の半導体装置の一実施例を示
す平面図および斜視図、第2図は従来の半導体装
置を示す斜視図である。 1……基板、2……半導体素子、3……金属細
線、4……枠板、5……切欠部、7……封止樹脂
、9……溝。

Claims (1)

  1. 【実用新案登録請求の範囲】 基板上に半導体素子が直接搭載され、その素子
    の電極部は基板上の配線パターンに金属細線によ
    り配線され、その配線部と素子部を囲むように枠
    板が基板表面に配置され、この枠板の一部には切
    欠部が設けられ、この切欠部から枠板内側に充填
    された封止樹脂により前記配線部および素子部が
    覆われる半導体装置において、 枠板内側から枠板外側に通じる空気抜き用の溝
    を基板表面に形成したことを特徴とする半導体装
    置。
JP1988110661U 1988-08-25 1988-08-25 Pending JPH0233443U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988110661U JPH0233443U (ja) 1988-08-25 1988-08-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988110661U JPH0233443U (ja) 1988-08-25 1988-08-25

Publications (1)

Publication Number Publication Date
JPH0233443U true JPH0233443U (ja) 1990-03-02

Family

ID=31348022

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988110661U Pending JPH0233443U (ja) 1988-08-25 1988-08-25

Country Status (1)

Country Link
JP (1) JPH0233443U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007149926A (ja) * 2005-11-28 2007-06-14 Matsushita Electric Ind Co Ltd 筐体構造とこれを用いた情報機器

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007149926A (ja) * 2005-11-28 2007-06-14 Matsushita Electric Ind Co Ltd 筐体構造とこれを用いた情報機器

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