JPH0235464B2 - - Google Patents

Info

Publication number
JPH0235464B2
JPH0235464B2 JP55152528A JP15252880A JPH0235464B2 JP H0235464 B2 JPH0235464 B2 JP H0235464B2 JP 55152528 A JP55152528 A JP 55152528A JP 15252880 A JP15252880 A JP 15252880A JP H0235464 B2 JPH0235464 B2 JP H0235464B2
Authority
JP
Japan
Prior art keywords
chip
hole
circuit board
wiring pattern
metal wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP55152528A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5776848A (en
Inventor
Akishi Shiraki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP55152528A priority Critical patent/JPS5776848A/ja
Publication of JPS5776848A publication Critical patent/JPS5776848A/ja
Publication of JPH0235464B2 publication Critical patent/JPH0235464B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07321Aligning
    • H10W72/07327Aligning involving guiding structures, e.g. spacers or supporting members
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07331Connecting techniques
    • H10W72/07337Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Die Bonding (AREA)
JP55152528A 1980-10-30 1980-10-30 Mounting method for integrated circuit chip Granted JPS5776848A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55152528A JPS5776848A (en) 1980-10-30 1980-10-30 Mounting method for integrated circuit chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55152528A JPS5776848A (en) 1980-10-30 1980-10-30 Mounting method for integrated circuit chip

Publications (2)

Publication Number Publication Date
JPS5776848A JPS5776848A (en) 1982-05-14
JPH0235464B2 true JPH0235464B2 (2) 1990-08-10

Family

ID=15542400

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55152528A Granted JPS5776848A (en) 1980-10-30 1980-10-30 Mounting method for integrated circuit chip

Country Status (1)

Country Link
JP (1) JPS5776848A (2)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6089948A (ja) * 1983-10-24 1985-05-20 Toshiba Corp リ−ドフレ−ム
JPS60181072U (ja) * 1984-05-12 1985-12-02 イビデン株式会社 チツプ搭載用プリント配線基板
JPS62134938A (ja) * 1985-12-04 1987-06-18 フアオ・デ−・オ−・ア−ドルフ・シントリング・アクチエンゲゼルシヤフト 支持プレ−ト

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5811736B2 (ja) * 1974-10-15 1983-03-04 日本電気株式会社 ハンドウタイソウチ
JPS51163867U (2) * 1975-06-19 1976-12-27

Also Published As

Publication number Publication date
JPS5776848A (en) 1982-05-14

Similar Documents

Publication Publication Date Title
US5563445A (en) Semiconductor device
KR19980070509A (ko) 반도체 장치 및 그 제조방법
KR100473464B1 (ko) 반도체장치
US4362902A (en) Ceramic chip carrier
KR950014677B1 (ko) Ic 실장장치
JPH0235464B2 (2)
JPS63310151A (ja) 集積回路電子部品のチップの支持パッド
KR0182506B1 (ko) 동시에 절단된 반도체 칩을 이용한 고밀도 실장형 패키지 및 그 제조 방법
JP3157249B2 (ja) 半導体装置実装体及び実装方法
JPS62134957A (ja) 半導体装置
JPH01120856A (ja) リードフレーム
JPH06236948A (ja) 電子部品搭載用基板及びその製造方法
JP2536568B2 (ja) リ―ドフレ―ム
KR100321149B1 (ko) 칩사이즈 패키지
JP2609663B2 (ja) テープキャリア
KR100340430B1 (ko) 볼그리드 어레이기판의 가공방법
KR200162021Y1 (ko) 칩 사이즈 반도체 장치
JP3314412B2 (ja) ボンディングツール
JPS61244052A (ja) 半導体装置
JPH08264707A (ja) 半導体集積回路用リードフレーム
KR950003074Y1 (ko) 트랜지스터(tr)의 알루미늄 와이어 본드패드(bond pad) 구조
US6425179B1 (en) Method for assembling tape ball grid arrays
JPS6386534A (ja) フイルムキヤリアおよびその製造方法
JPH06177226A (ja) 吸着コレット
JPH0368164A (ja) トランスファモールド型混成集積回路