JPH0241865Y2 - - Google Patents
Info
- Publication number
- JPH0241865Y2 JPH0241865Y2 JP1983094473U JP9447383U JPH0241865Y2 JP H0241865 Y2 JPH0241865 Y2 JP H0241865Y2 JP 1983094473 U JP1983094473 U JP 1983094473U JP 9447383 U JP9447383 U JP 9447383U JP H0241865 Y2 JPH0241865 Y2 JP H0241865Y2
- Authority
- JP
- Japan
- Prior art keywords
- thick film
- film substrate
- inclusion
- integrated element
- integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
【考案の詳細な説明】
（産業上の利用分野）
本考案は、厚膜基板に取付ける集積素子の疲労
防止装置に関するものである。[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a fatigue prevention device for an integrated device attached to a thick film substrate.
（従来技術）
集積素子を厚膜基板に載せて半田付けにより固
定する構造としたものでは、集積素子と厚膜基板
との間にシリコンゲル等を充填して、耐湿性向上
を図ることが行なわれる。この場合において従来
にあつては、集積素子（たとえばモノリシツク
IC）と厚膜基板との間に充填されたシリコンゲ
ル等の充填物が熱膨張して集積素子を押し上げ、
冷却時に元の状態に復帰するのを繰り返えし、接
続部の半田付部分等に疲労を与える問題点があつ
た。(Prior art) In a structure in which an integrated element is mounted on a thick film substrate and fixed by soldering, silicon gel or the like is filled between the integrated element and the thick film substrate to improve moisture resistance. It can be done. In this case, conventionally integrated devices (e.g. monolithic
A filler such as silicon gel filled between the IC) and the thick film substrate thermally expands and pushes up the integrated element.
There was a problem in that the product repeatedly returned to its original state upon cooling, causing fatigue to the soldered portions of the connections.
（考案の目的）
本考案はこの点に鑑みて成されたもので、簡単
な構造で、上記した従来のものが有する問題を解
決したものである。(Purpose of the invention) The present invention has been made in view of this point, and has a simple structure that solves the problems of the above-mentioned conventional devices.
（考案の構成）
本考案は上記目的を達成するため、厚膜基板に
集積素子を取付け、これを樹脂で封止するものに
おいて、前記集積素子と厚膜基板との間に介在物
を介装し、該介在物と前記集積素子または厚膜基
板との間に、集積素子、厚膜基板および介在物の
各々の熱膨張を吸収し、かつ、前記樹脂が浸入し
ない大きさのクリアランスを形成した構成とし、
これによつて集積素子と厚膜基板との間に樹脂の
浸入がないようにして、浸入があつたときに生ず
る、充填剤の収縮によるストレスをなくし、半田
付部分の劣化等の防止を図るようにしたものであ
る。(Structure of the invention) In order to achieve the above-mentioned object, the present invention is a device in which an integrated element is attached to a thick film substrate and sealed with a resin, in which an inclusion is inserted between the integrated element and the thick film substrate. A clearance is formed between the inclusion and the integrated element or the thick film substrate to absorb the thermal expansion of the integrated element, the thick film substrate, and the inclusion, and to prevent the resin from penetrating. The configuration is as follows:
This prevents the resin from entering between the integrated element and the thick film substrate, eliminates the stress caused by shrinkage of the filler that occurs when resin enters, and prevents deterioration of the soldered part. This is how it was done.
（実施例）
以下、本考案の一実施例を図について説明す
る。図示するものはハイブリツドICと称される
もので、１は厚膜基板、２はその上部に載置され
たモノリシツクICのチツプ（以下MICチツプと
いう）、３はこのMICチツプ２を厚膜基板１の表
面の導電膜４に電気的に接続すると共に、これら
を機械的に結合する半田付部である。厚膜基板１
とMICチツプ２の間には、シリコンゲル以外の
材質から成る介在物５が介装されている。これら
全体はケース６内に収容され、防湿を目的とした
シリコンゲル７で浸されている。ケース６の底部
は放熱板８になつており、この放熱板８と厚膜基
板１との間には接着剤９が介在している。(Example) Hereinafter, an example of the present invention will be described with reference to the drawings. The one shown in the figure is called a hybrid IC. 1 is a thick film substrate, 2 is a monolithic IC chip (hereinafter referred to as MIC chip) placed on top of the thick film substrate, and 3 is a monolithic IC chip (hereinafter referred to as MIC chip) mounted on the thick film substrate. This is a soldering portion that electrically connects to the conductive film 4 on the surface of the wafer and mechanically connects them. Thick film substrate 1
An inclusion 5 made of a material other than silicone gel is interposed between the MIC chip 2 and the MIC chip 2. The whole is housed in a case 6 and is soaked with silicone gel 7 for moisture proofing purposes. The bottom of the case 6 is a heat sink 8, and an adhesive 9 is interposed between the heat sink 8 and the thick film substrate 1.
以上の構成において、介在物５は厚膜基板（通
常はセラミツク）１側に一体成型しても良いし、
MICチツプ２側に一体成型しても良い。また、
このようにせず、別体で製作して、いずれかに貼
着するようにしても良い。なお、介在物５と
MICチツプ２または厚膜基板１との間に、MIC
チツプ２、厚膜基板１、および介在物５のそれぞ
れ熱膨張を吸収し、かつシリコンゲル７が浸入し
ない大きさ、すなわち、シリコンゲル７の液状時
の表面張力以下となるクリアランスを設けてあ
る。 In the above configuration, the inclusion 5 may be integrally molded on the thick film substrate (usually ceramic) 1 side, or
It may be integrally molded on the MIC chip 2 side. Also,
Instead of doing this, it is also possible to manufacture them separately and attach them to either of them. In addition, inclusion 5 and
Connect the MIC between the MIC chip 2 or the thick film substrate 1.
A clearance is provided to absorb the thermal expansion of the chip 2, the thick film substrate 1, and the inclusion 5, and to prevent the silicon gel 7 from penetrating, that is, the surface tension of the silicon gel 7 is equal to or lower than the surface tension of the silicon gel 7 when it is in a liquid state.
（考案の効果）
本考案は以上説明したように構成したものであ
るから、介在物５により、シリコンゲル７が
MICチツプ２と厚膜基板１の間に浸入すること
がないので、従来のものが、シリコンゲル等の樹
脂が集積素子と厚膜基板との間に浸入する可能性
があつたために生ずることがあつた半田付部３の
疲労を効果的に防止できることになる。(Effect of the invention) Since the present invention is constructed as explained above, the inclusions 5 cause the silicon gel 7 to
Since there is no possibility of infiltration between the MIC chip 2 and the thick film substrate 1, there is no possibility of resin such as silicon gel infiltrating between the integrated element and the thick film substrate in the conventional type. Fatigue of the hot soldering part 3 can be effectively prevented.
図は本考案の一実施例の縦断面図である。
１……厚膜基板、２……MICチツプ、３……
半田付部、５……介在物、７……シリコンゲル。
The figure is a longitudinal sectional view of an embodiment of the present invention. 1... Thick film substrate, 2... MIC chip, 3...
Soldered portion, 5...Inclusion, 7...Silicon gel.
Claims (1)
止するものにおいて、前記集積素子と厚膜基板と
の間に介在物を介装し、該介在物と前記集積素子
または厚膜基板との間に、集積素子、厚膜基板お
よび介在物の各々の熱膨張を吸収し、かつ、前記
樹脂が浸入しない大きさのクリアランスを形成し
たことを特徴とする集積素子の疲労防止装置。 In a device in which an integrated element is mounted on a thick film substrate and sealed with resin, an inclusion is interposed between the integrated element and the thick film substrate, and the interaction between the inclusion and the integrated element or the thick film substrate is 1. An apparatus for preventing fatigue of an integrated device, characterized in that a clearance is formed between the integrated device, the thick film substrate, and the inclusions, each of which absorbs thermal expansion and prevents the resin from penetrating.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9447383U JPS602851U (en) | 1983-06-20 | 1983-06-20 | Integrated device fatigue prevention device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9447383U JPS602851U (en) | 1983-06-20 | 1983-06-20 | Integrated device fatigue prevention device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS602851U JPS602851U (en) | 1985-01-10 |
| JPH0241865Y2 true JPH0241865Y2 (en) | 1990-11-08 |
Family
ID=30226127
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9447383U Granted JPS602851U (en) | 1983-06-20 | 1983-06-20 | Integrated device fatigue prevention device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS602851U (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07106169B2 (en) * | 1989-07-20 | 1995-11-15 | 三洋電機株式会社 | Showcase |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52104368U (en) * | 1976-02-04 | 1977-08-08 |
-
1983
- 1983-06-20 JP JP9447383U patent/JPS602851U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS602851U (en) | 1985-01-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2756597B2 (en) | Molded semiconductor package | |
| JPH10163386A5 (en) | ||
| KR20090056594A (en) | Semiconductor power module package with temperature sensing element and its manufacturing method | |
| KR930024140A (en) | Semiconductor device and manufacturing method | |
| US5874783A (en) | Semiconductor device having the inner end of connector leads displaced onto the surface of semiconductor chip | |
| JPH0241865Y2 (en) | ||
| JP2770947B2 (en) | Resin-sealed semiconductor device and method of manufacturing the same | |
| JPS6118164A (en) | Semiconductor device | |
| JPS5810840A (en) | Semiconductor device | |
| JP2554040Y2 (en) | Electronic component mounting structure | |
| JPS61147554A (en) | Hybrid ic module | |
| JPH01282846A (en) | Hybrid integrated circuit | |
| JPH10107086A (en) | Electronic circuit device including semiconductor element | |
| JP4589743B2 (en) | Semiconductor device | |
| JPS5837694B2 (en) | semiconductor equipment | |
| JP2605434Y2 (en) | Composite semiconductor device | |
| JPH0351299B2 (en) | ||
| JPS61148845A (en) | Semiconductor device | |
| JPH0530392Y2 (en) | ||
| JPH0864709A (en) | Semiconductor device and manufacturing method thereof | |
| JPS62252954A (en) | Semiconductor device | |
| JP2504465B2 (en) | Semiconductor device | |
| JP2571795Y2 (en) | Resin-sealed electronic components | |
| JPH03116859A (en) | Hybrid integrated circuit device | |
| JP2661230B2 (en) | Hybrid integrated circuit device |