JPH0242768A - Photodetector with built-in circuit - Google Patents

Abstract

PURPOSE:To make a high-speed and high-sensitivity photodetector with a built-in circuit by a method wherein a photodetector is formed in a part of a high- resistivity epitaxial layer corresponding to a recessed part and a circuit element is formed in a high-resistivity epitaxial layer corresponding to a flat part. CONSTITUTION:A photodetector 2 is formed in a part of a thick and high- resistivity epitaxial layer 3 corresponding to a recessed part; a layer of a second conductivity type is formed and a circuit element 7 is formed in a part of a thin and a high-resistivity epitaxial layer 3 corresponding to a flat part. Since the high-resistivity and thick epitaxial layer 3 is used for the photodetector, its response speed is fast and, in addition, its optical sensitivity can be enhanced. Since the thin layer 3 can be utilized for the part of the circuit element, semiconductor layers whose thickness are optimum can be utilized for the photodetector and the circuit element. Thereby, a high-speed and high-sensitivity photodetector with a built-in circuit can be manufactured.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a high-speed and highly sensitive light-receiving element with a built-in circuit.

(Prior Art) With the demand for higher functionality and smaller size of components, light-receiving elements are being integrated with peripheral signal processing circuits, and are becoming popular as light-receiving elements with a built-in circuit.

The light-receiving element with a built-in circuit is manufactured using the same process as a bipolar IC. That is, an N-type buried diffusion layer is formed on a P-type semiconductor substrate to reduce the series resistance of the device, an N-type epitaxial layer is formed after death, and then device separation and device formation are performed to create a photodetector with a built-in circuit. is formed. Therefore, the epitaxial layers of the photodiode section, which is a light receiving element, and the circuit section have the same thickness and the same specific resistance.

(Problem to be Solved by the Invention) In order to increase the speed of a light-receiving element with a built-in circuit, it is necessary to increase the specific resistance of the epitaxial layer in the photodiode part to lower the capacitance. There are problems in that the collector resistance of the transistor increases, the collector saturation voltage increases, and the circuit response speed decreases.

Furthermore, in order to increase the sensitivity of the photodiode of the photodetector with a built-in circuit, it is necessary to increase the thickness of the epitaxial layer. However, simply increasing the thickness reduces the response speed of the photodiode section.1. In addition to the same problems as described above, such as an increase in collector saturation voltage and a decrease in circuit response speed due to an increase in the collector resistance of the NPN transistor in the circuit section, there is also the problem of an increase in chip size due to an increase in isolation region.

As mentioned above, the high speed and high sensitivity of photodetectors with built-in circuits are
This has been difficult to achieve because the epitaxial layer conditions required for the photodiode section and the epitaxial layer conditions required for the circuit section are different.

In particular, as the performance of bipolar ICs has improved recently, epitaxial layers have become thinner, and the reduction in sensitivity of photodiodes, which are light-receiving elements with built-in circuits, has become a problem.

(Means for Solving the Problems) In the present invention, a flat high specific resistance epitaxial layer is provided on the surface of a first conductive type semiconductor substrate having a recessed portion and a flat portion, and A light-receiving element was formed in a portion of the thick epitaxial layer with high specific resistance, and a layer of the second conductivity type was provided in a portion of the thin epitaxial layer with high specific resistance corresponding to the flat portion to form a circuit element.

(Function) Since the present invention has the above-described configuration, the light receiving element includes:
Since a thick epitaxial layer with high specific resistance is used, the response speed is fast and the photosensitivity can be further improved. Further, since thin layers can be used in the circuit element portions, there is no need to increase the collector resistance of the circuit, increase the collector saturation voltage, or slow down the response speed of the circuit. That is, since semiconductor layers with optimal thicknesses can be used for each of the light-receiving element and the circuit element, the performance of both can be fully demonstrated. The separation area also does not increase.

(Embodiment) Figures 1 to 8 are cross-sectional views showing steps of an embodiment of the present invention.

First, as shown in Figure @1, a recess 1-1 is formed on the surface of a P-type semiconductor substrate 1 by anisotropic etching. The depth of the recess is determined so that the thickness of the epitaxial layer of the photodiode section, which is a light receiving element, is finally optimal for the required performance (photosensitivity, etc.). That is, the depth of the recess - (optimum epitaxial layer thickness for photodiode section) - (optimum epitaxial layer thickness for circuit section) may be used.

After that, an N+ type buried diffusion layer 2 is formed along the slope of the recess 1-1.
form. This portion becomes the planned area for the light receiving element. Furthermore, an N+ type buried diffusion layer 2 is also formed in a part of the flat portion at the same time. It is well known that these N+ type buried diffusion layers reduce the series resistance of the device. This flat part of the N+ type buried diffusion layer becomes a planned area for the circuit element.

Next, as shown in FIG. 2, an epitaxial layer 8 having a resistivity as high as possible is grown over the entire surface consisting of one concave portion 1-1 and a flat portion. If this epitaxial layer is one layer, the photodiode of the light receiving element becomes a PIN photodiode. At this time, irregularities are formed on the surface as shown in the figure.

The surface is then polished to make it flat, as shown in FIG. In this case, the thickness of the epitaxial layer 3 in each of the circuit intended area and the light receiving element intended area after polishing is optimized. The thickness of the epitaxial layer 3 in the photodiode section is set so that the epitaxial layer 3 is completely depleted in the depth direction when a reverse bias is applied to the photodiode, and the required photosensitivity is satisfied. . If a portion that is not depleted remains, the series resistance increases and the response speed decreases. For example, when the resistivity of the epitaxial layer 8 is 100 Ωm and the reverse bias applied to the photodiode is 5V, the depletion layer expands by 8.2 μm in the direction of the epitaxial layer 8 having high resistivity. At this time, the depth of the P-type diffusion layer of the photodiode was set to 1 μm, and N
Assuming that the creep-up of the +-type buried diffusion layer 2 into the epitaxial layer 3 is 2 μm, the maximum thickness at which the high resistivity epitaxial layer 3 is completely depleted is 8.2 + 1.0 + 2.0 = 11.2 pm
becomes.

Further, if the required photosensitivity is 0.4 A/W for light with a wavelength of 780 nm, a minimum thickness of 8.4 μm is required. Therefore, in this case, the thickness of the epitaxial layer 3 may be set between 8.4 and 11.2 μm.

FIG. 4 is a cross-sectional view of a completed product having photodiodes and circuit elements provided on the epitaxial layer 8 formed on the surface of the P-type semiconductor substrate 1 treated as described above. In this figure, oxide films, wiring, etc. are omitted for simplicity. First, an N-type well layer 5 suitable for the circuit portion is formed by ion implantation or the like in the thin epitaxial layer 3 above the N-type buried diffusion layer 2 in a flat portion where a circuit element is planned.

This NW well layer 5 can also be formed by burying impurities in a predetermined portion before forming the epitaxial layer 8 and utilizing the rise of the impurities.

Next, a thick epitaxial layer 3 is formed, which is the intended area of the light receiving element.
A KP+ type diffusion layer 7.7 is provided on a part of the surface of the well layer 5 and a part of the surface of the N type well layer 5, which is a region where a circuit element is planned. Next, an N+ type diffused layer 8 is provided on a part of the surface of the P+ type diffusion layer 7 in the circuit element planned area. P+ type diffusion layer 7 on the surface of the thick epitaxial layer 3 thus formed. The thick epitaxial layer 3 and the N++ buried diffusion layer 2 below it constitute a photodiode. On the other hand, an N-type well layer 5 which becomes a collector and a door-shaped diffusion layer 7 which becomes a pace on its surface.
and NPN by the N+ type scattering layer 8 which becomes the emitter)
A transistor is configured. P-type separation diffusion layers 4, 4.4 are provided at the boundaries between these light-receiving elements and circuit elements.

An N+ type scattering layer 66.6 is provided at the end of each element, and these are also used as electrodes to reduce the series resistance and improve response speed in photodiodes, and to improve response speed in NPN) transistors. In this case, the collector resistance is reduced. All of these steps are carried out by normal bipolar IC manufacturing processes, and the circuit-embedded light receiving element of the present invention is completed. The resistivity, thickness, and other conditions of the epitaxial layer are not limited to those described above, and various conditions can be used.

(Effects of the Invention) A comparison between an embodiment of the present invention and a conventional example results in the following results.

Example Conventional example Example: Specific resistance of epitaxial layer 3 100 Qc
m.

Photo-dipped to a thickness of 10 μm (see Figure 4). formed an iode.

Conventional example: Epitaxial layer resistivity 10m, thickness 3
A photodiode was formed on a μm IC substrate.

As described above, according to the present invention, the photosensitivity is greatly improved, and the response speed is also significantly improved by greatly reducing the capacity of the photodiode.

This effect becomes more pronounced in light-receiving elements that incorporate high-speed and highly integrated circuits (thin epitaxial layers).Furthermore, after flattening after epitaxial growth, N-type well layer formation is added to the manufacturing process optimal for ordinary ICs. Since it is only added, the high speed and high sensitivity of the light-receiving element with a built-in circuit can be achieved without substantially degrading the performance of the IC section.In addition, in the above embodiment,
Although the description has been made regarding a case where the circuit element is an NPN transistor, the present invention can also be applied to a PNP (MOS) transistor, etc.

[Brief explanation of the drawing]

FIG. 1, FIG. 2, and FIG. 8 show an initial stage of an embodiment of the present invention.
FIG. 4 is a cross-sectional view of the intermediate and final steps, and FIG. 4 is a schematic cross-sectional view of the finished product. 1... P-type semiconductor substrate, 2... N-type buried diffusion layer 8
...Epitaxial layer, 4...P-type isolation diffusion layer, 5
...N-type well layer, 6...N medium-sized diffusion layer, 7...
P ten type diffusion layer, 8...N ten type diffusion layer

Claims (1)

[Claims] 1. Consists of a semiconductor substrate of a first conductivity type having a recessed part and a flat part, and a flat high-resistivity epitaxial layer formed on the surface thereof, and a part of the high-resistivity epitaxial layer corresponding to the recessed part is A light receiving element is formed, a second conductivity type semiconductor layer is provided on the high resistivity epitaxial layer corresponding to the flat portion, and a circuit element is formed on the second conductivity type semiconductor layer. A photodetector with a built-in circuit.