JPH0247892B2 - - Google Patents
Info
- Publication number
- JPH0247892B2 JPH0247892B2 JP57011599A JP1159982A JPH0247892B2 JP H0247892 B2 JPH0247892 B2 JP H0247892B2 JP 57011599 A JP57011599 A JP 57011599A JP 1159982 A JP1159982 A JP 1159982A JP H0247892 B2 JPH0247892 B2 JP H0247892B2
- Authority
- JP
- Japan
- Prior art keywords
- pulse
- circuit
- time constant
- types
- waveform
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/04—Shaping pulses by increasing duration; by decreasing duration
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Pulse Circuits (AREA)
Description
【発明の詳細な説明】
本発明は１つの時定数回路から幅の異なる２種
のパルス信号を発生する回路に於けるパルスの切
換り時の動作に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an operation when switching pulses in a circuit that generates two types of pulse signals with different widths from one time constant circuit.
従来回路の例を第１図に示す。この図の回路は
第３図ａの様な動作である。すなわち、トリガ入
力としてａに示す様な負の信号が加えられると、
トランジスタ１３，１４が導通１、ｂ点は急激に
立ち上がる。トリガ入力がなくなるとトランジス
タ１３，１４は非導通となりｂ点の電位はコンデ
ンサ１２と、主に抵抗１１との時定数で下がる第
３図ａの波形、ｂの出力が得られる。２つのスレ
ツシユホールド電圧として第１図の１をVTH1、２
をVTH2、とし、トランジスタ４，５と６，７によ
つてｂ点の電位と比較することにより第３図ａの
波形ｅ及びｆの様な、開始がほぼ等しく、終了が
異なる２種のパルスを得ることが出来る。しかし
ながら、２種のパルスの幅の差を大きくする必要
がある場合には、波形ｂの時定数曲線の変化率の
違いから、２種のパルスの、特に終了時の切換り
時間に大きな差が現われる欠点が生じる。 An example of a conventional circuit is shown in FIG. The circuit shown in this figure operates as shown in FIG. 3a. That is, when a negative signal as shown in a is applied as a trigger input,
Transistors 13 and 14 are conductive 1, and point b rises rapidly. When the trigger input disappears, the transistors 13 and 14 become non-conductive, and the potential at point b decreases due to the time constant of the capacitor 12 and mainly the resistor 11, resulting in outputs with waveforms a and b shown in FIG. 3. 1 in Figure 1 as two threshold voltages, V TH1 and 2
By setting V TH2 to V TH2 and comparing it with the potential at point b through transistors 4, 5 and 6, 7, two types of waveforms, such as waveforms e and f in Fig. 3a, which have almost the same start and different ends, can be obtained. You can get a pulse. However, if it is necessary to increase the difference in width between the two types of pulses, the difference in the rate of change of the time constant curve of waveform b will cause a large difference in the switching time between the two types of pulses, especially at the end. There are defects that appear.
本発明の目的は、前記２種の幅の異なるパルス
の終了時の切換り時間の差を縮めること。特に幅
の広い方のパルスの終了時の切換り時間を充分に
小さくすることを目的とする。 An object of the present invention is to reduce the difference in switching time at the end of the two types of pulses having different widths. In particular, the purpose is to sufficiently reduce the switching time at the end of the wider pulse.
そこで、幅の広いパルスの終了の直前に、第１
図の容量１２にたくわえられた電荷を急速に放電
させる回路を設け、同図ｂ点の電位を急速に下げ
ることにより、幅の広いパルスを終了させること
にした。この結果、幅の広い方のパルスの切換り
時間を充分小さくすることが可能となつた。 Therefore, just before the end of the wide pulse, the first
We decided to provide a circuit that rapidly discharges the charge stored in the capacitor 12 shown in the figure, and by rapidly lowering the potential at point b in the figure, the wide pulse is terminated. As a result, it has become possible to sufficiently shorten the switching time of the wider pulse.
以下、本発明の実施例を第２図により説明す
る。本発明の実施の為に追加された部分は第２図
の破線内の部分である。この部分に於いて、トラ
ンジスタ２０がONすることによりb′点の電位を
急速に下げることができる。同トランジスタの駆
動は、幅の広いパルスの発生部分の基準電圧１０
よりやや高い基準電圧１５とb′点の電圧とを比較
するトランジスタ１７，１８の出力h′である。 Embodiments of the present invention will be described below with reference to FIG. The parts added for implementing the present invention are the parts within the broken lines in FIG. In this portion, the potential at point b' can be rapidly lowered by turning on the transistor 20. The transistor is driven by a reference voltage of 10
This is the output h' of the transistors 17 and 18 which compares the reference voltage 15, which is slightly higher, with the voltage at point b'.
この結果h′点の動作波形は第３図ｂの波形b′の
実線にて示すものとなり、幅の広いパルスの波形
も同図の波形f′に示す様に終了の切換り時間も従
来の波形ｆにて示す波形に比べ充分短いものとす
ることが出来る。 As a result, the operating waveform at point h' is as shown by the solid line of waveform b' in Figure 3b, and the waveform of the wide pulse is also the same as the conventional one, as shown in waveform f' in the same figure. It can be made sufficiently shorter than the waveform shown by waveform f.
幅の狭いパルスはパルス出力端子e′より、また
広いパルスはパルス出力端子f′より取り出すこと
が出来る。 A narrow pulse can be taken out from the pulse output terminal e', and a wide pulse can be taken out from the pulse output terminal f'.
以上述べた本発明によれば、特にモノリシツク
ICの様に、端子数の制約がある場合にて、一組
の時定数回路から幅の異なる２種のパルスを形成
する場合の切換り時間に対する時定数回路の特性
の影響を軽減することが可能となり、幅の広い側
のパルスの終了時の過渡時間を短かくしなければ
ならない場合に特に有効である。 According to the present invention described above, especially monolithic
When the number of terminals is limited, such as in an IC, it is possible to reduce the influence of the characteristics of the time constant circuit on the switching time when two types of pulses with different widths are formed from one set of time constant circuits. This is particularly effective when the transition time at the end of the pulse on the wide side must be shortened.
第１図に従来例を示す回路図、第２図は本発明
の実施例を示す回路例、従来回路例の各部の動作
を第３図ａに、ｂは本発明の実施例の説明に供す
る波形図である。
４，５，６，７，１３，１４，１７，１８，２
０……トランジスタ、１９，２１……抵抗、１２
……容量（コンデンサ）。
Fig. 1 is a circuit diagram showing a conventional example, Fig. 2 is a circuit example showing an embodiment of the present invention, Fig. 3 a shows the operation of each part of the conventional circuit example, and Fig. 3 b provides an explanation of the embodiment of the present invention. FIG. 4, 5, 6, 7, 13, 14, 17, 18, 2
0... Transistor, 19, 21... Resistor, 12
...capacitance (capacitor).
Claims (1)
１つの時定数によつて立ち下がる時定数回路を駆
動し、この時定数回路の出力を、ある一定の２種
のスレツシユホールド電圧と比較することによ
り、開始がほぼ同時で終了が異なる２種のパルス
を形成するパルス発生回路に於いて、上記２種の
スレツシユホールド電圧の間に位置する第３のス
レツシユホールド電圧と比較する回路を設け、こ
の出力により時定数回路を瞬時に立ち下げ、形成
する幅の広い方のパルスの終了を狭い方と同様急
峻なものとしたパルス発生回路。1 Instantly rises due to the trigger input signal,
By driving a time constant circuit that falls with one time constant and comparing the output of this time constant circuit with two constant threshold voltages, it is possible to detect two types of voltages that start almost at the same time but have different ends. In the pulse generation circuit that forms the pulse, a circuit is provided that compares it with a third threshold voltage located between the two types of threshold voltages mentioned above, and this output instantly stops the time constant circuit. , a pulse generation circuit in which the end of the wide pulse to be formed is as steep as that of the narrow pulse.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57011599A JPS58130615A (en) | 1982-01-29 | 1982-01-29 | Pulse generating circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57011599A JPS58130615A (en) | 1982-01-29 | 1982-01-29 | Pulse generating circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58130615A JPS58130615A (en) | 1983-08-04 |
| JPH0247892B2 true JPH0247892B2 (en) | 1990-10-23 |
Family
ID=11782363
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57011599A Granted JPS58130615A (en) | 1982-01-29 | 1982-01-29 | Pulse generating circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58130615A (en) |
-
1982
- 1982-01-29 JP JP57011599A patent/JPS58130615A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58130615A (en) | 1983-08-04 |
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